371 lines
9.6 KiB
C
371 lines
9.6 KiB
C
/* $NetBSD: i80312_pci_dma.c,v 1.2 2002/01/25 20:57:43 thorpej Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI DMA support for i80312 Companion I/O chip.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/mbuf.h>
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#include <uvm/uvm_extern.h>
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#define _ARM32_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <arm/xscale/i80312reg.h>
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#include <arm/xscale/i80312var.h>
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int i80312_pci_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int);
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int i80312_pci_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int);
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int i80312_pci_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int);
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int i80312_pci_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int);
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int i80312_pci_dmamem_alloc(bus_dma_tag_t, bus_size_t,
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bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, int);
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void
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i80312_pci_dma_init(bus_dma_tag_t dmat, void *cookie)
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{
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/*
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* XXX XXX XXX The arm32_bus_dma_tag really needs to
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* XXX XXX XXX be rototilled.
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*/
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dmat->_ranges = cookie;
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dmat->_nranges = 0;
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dmat->_dmamap_create = _bus_dmamap_create;
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dmat->_dmamap_destroy = _bus_dmamap_destroy;
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dmat->_dmamap_load = i80312_pci_dmamap_load;
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dmat->_dmamap_load_mbuf = i80312_pci_dmamap_load_mbuf;
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dmat->_dmamap_load_uio = i80312_pci_dmamap_load_uio;
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dmat->_dmamap_load_raw = i80312_pci_dmamap_load_raw;
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dmat->_dmamap_unload = _bus_dmamap_unload;
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dmat->_dmamap_sync = _bus_dmamap_sync;
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dmat->_dmamem_alloc = i80312_pci_dmamem_alloc;
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dmat->_dmamem_free = _bus_dmamem_free;
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dmat->_dmamem_map = _bus_dmamem_map;
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dmat->_dmamem_unmap = _bus_dmamem_unmap;
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dmat->_dmamem_mmap = _bus_dmamem_mmap;
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}
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/*
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* i80312_pci_dmamap_load_buffer:
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*
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* Utility function to load a linear buffer. lastaddrp holds state
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* between invocations (for multiple-buffer loads). segp contains
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* the starting segment on entry, and the ending segment on exit.
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* first indicates if this is the first invocation of this function.
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*/
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static int
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i80312_pci_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map,
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void *buf, bus_size_t buflen, struct proc *p, int flags,
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vaddr_t *lastaddrp, int *segp, int first)
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{
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struct i80312_softc *sc = (void *) t->_ranges; /* XXX XXX XXX */
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bus_size_t sgsize;
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bus_addr_t curaddr, lastaddr, baddr, bmask;
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vaddr_t vaddr = (vaddr_t) buf;
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int seg;
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struct pmap *pmap;
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if (p != NULL)
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pmap = p->p_vmspace->vm_map.pmap;
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else
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pmap = pmap_kernel();
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lastaddr = *lastaddrp;
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bmask = ~(map->_dm_boundary - 1);
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for (seg = *segp; buflen > 0; ) {
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/* Get the physical address for this segment. */
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(void) pmap_extract(pmap, (vaddr_t) vaddr, &curaddr);
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/*
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* Make sure we're in an allowed DMA range.
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* XXX Limited to Secondary bus for now.
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*/
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if (curaddr < sc->sc_sin_xlate ||
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curaddr >= (sc->sc_sin_xlate + sc->sc_sin_size))
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return (EINVAL);
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/*
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* Translate the physical memory address to an address
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* in the Secondary Inbound window.
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*/
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curaddr = (curaddr - sc->sc_sin_xlate) + sc->sc_sin_base;
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/* Compute the segment size, and adjust counts. */
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sgsize = PAGE_SIZE - (vaddr & PAGE_MASK);
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if (buflen < sgsize)
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sgsize = buflen;
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/* Make sure we don't cross any boundaries. */
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if (map->_dm_boundary > 0) {
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baddr = (curaddr + map->_dm_boundary) & bmask;
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if (sgsize > (baddr - curaddr))
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sgsize = (baddr - curaddr);
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}
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/*
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* Insert chunk into a segment, coalescing with
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* the previous segment if possible.
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*/
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if (first) {
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map->dm_segs[seg].ds_addr = curaddr;
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map->dm_segs[seg].ds_len = sgsize;
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map->dm_segs[seg]._ds_vaddr = vaddr;
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first = 0;
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} else {
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if (curaddr == lastaddr &&
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(map->dm_segs[seg].ds_len + sgsize) <=
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map->_dm_maxsegsz &&
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(map->_dm_boundary == 0 ||
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(map->dm_segs[seg].ds_addr & bmask) ==
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(curaddr & bmask)))
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map->dm_segs[seg].ds_len += sgsize;
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else {
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if (++seg >= map->_dm_segcnt)
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break;
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map->dm_segs[seg].ds_addr = curaddr;
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map->dm_segs[seg].ds_len = sgsize;
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map->dm_segs[seg]._ds_vaddr = vaddr;
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}
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}
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lastaddr = curaddr + sgsize;
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vaddr += sgsize;
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buflen -= sgsize;
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}
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*segp = seg;
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*lastaddrp = lastaddr;
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/* Did we fit? */
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if (buflen != 0)
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return (EFBIG); /* XXX better return value here? */
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return (0);
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}
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/*
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* bus_dmamap_load:
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*
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* Load a DMA map with a linear buffer.
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*/
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int
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i80312_pci_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
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bus_size_t buflen, struct proc *p, int flags)
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{
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vaddr_t lastaddr;
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int seg, error;
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/*
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* Make sure that on error condition we return "no valid mappings".
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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if (buflen > map->_dm_size)
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return (EINVAL);
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seg = 0;
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error = i80312_pci_dmamap_load_buffer(t, map, buf, buflen, p,
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flags, &lastaddr, &seg, 1);
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if (error == 0) {
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map->dm_mapsize = buflen;
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map->dm_nsegs = seg + 1;
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map->_dm_proc = p;
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}
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return (error);
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}
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/*
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* bus_dmamap_load_mbuf:
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*
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* Load a DMA map with an mbuf chain.
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*/
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int
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i80312_pci_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map,
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struct mbuf *m0, int flags)
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{
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vaddr_t lastaddr;
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int seg, error, first;
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struct mbuf *m;
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/*
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* Make sure that on error condition we return "no valid mappings".
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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#ifdef DIAGNOSTIC
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if ((m0->m_flags & M_PKTHDR) == 0)
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panic("i80312_pci_bus_dmamap_load_mbuf: no packet header");
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#endif
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if (m0->m_pkthdr.len > map->_dm_size)
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return (EINVAL);
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first = 1;
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seg = 0;
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error = 0;
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for (m = m0; m != NULL && error == 0; m = m->m_next) {
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error = i80312_pci_dmamap_load_buffer(t, map, m->m_data,
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m->m_len, NULL, flags, &lastaddr, &seg, first);
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first = 0;
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}
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if (error == 0) {
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map->dm_mapsize = m0->m_pkthdr.len;
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map->dm_nsegs = seg + 1;
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map->_dm_proc = NULL; /* always kernel */
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}
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return (0);
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}
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/*
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* bus_dmamap_load_uio:
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*
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* Load a DMA map with a uio.
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*/
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int
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i80312_pci_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map,
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struct uio *uio, int flags)
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{
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vaddr_t lastaddr;
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int seg, i, error, first;
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bus_size_t minlen, resid;
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struct proc *p = NULL;
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struct iovec *iov;
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caddr_t addr;
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/*
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* Make sure that on error condition we return "no valid mappings".
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*/
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map->dm_mapsize = 0;
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map->dm_nsegs = 0;
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resid = uio->uio_resid;
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iov = uio->uio_iov;
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if (uio->uio_segflg == UIO_USERSPACE) {
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p = uio->uio_procp;
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#ifdef DIAGNOSTIC
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if (p == NULL)
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panic("i80312_pci_dmamap_load_uio: USERSPACE but "
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"no proc");
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#endif
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}
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first = 1;
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seg = 0;
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error = 0;
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for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
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/*
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* Now at the first iovec to load. Load each iovec
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* until we have exhausted the residual count.
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*/
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minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
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addr = (caddr_t)iov[i].iov_base;
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error = i80312_pci_dmamap_load_buffer(t, map, addr, minlen,
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p, flags, &lastaddr, &seg, first);
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first = 0;
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resid -= minlen;
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}
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if (error == 0) {
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map->dm_mapsize = uio->uio_resid;
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map->dm_nsegs = seg + 1;
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map->_dm_proc = p;
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}
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return (error);
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}
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/*
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* bus_dmamap_load_raw:
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*
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* Load a DMA map with raw memory allocated with
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* bus_dmamem_alloc().
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*/
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int
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i80312_pci_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
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bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
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{
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panic("i80312_pci_dmamap_load_raw: not implemented");
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}
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/*
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* bus_dmamem_alloc:
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*
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* Allocate DMA-safe memory.
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*/
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int
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i80312_pci_dmamem_alloc(bus_dma_tag_t t, bus_size_t size,
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bus_size_t alignment, bus_size_t boundary,
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bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)
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{
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struct i80312_softc *sc = (void *) t->_ranges;
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int error;
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/*
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* XXX Allocate memory in the range of the Secondary
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* bus only, for now.
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*/
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if (sc->sc_sin_size == 0)
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return (ENOMEM);
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error = _bus_dmamem_alloc_range(t, size, alignment, boundary,
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segs, nsegs, rsegs, flags, trunc_page(sc->sc_sin_xlate),
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trunc_page(sc->sc_sin_xlate + sc->sc_sin_size - 1));
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return (error);
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}
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