474 lines
14 KiB
C
474 lines
14 KiB
C
/* $NetBSD: uda.c,v 1.60 2009/05/12 14:08:35 cegger Exp $ */
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/*
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* Copyright (c) 1988 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Chris Torek.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)uda.c 7.32 (Berkeley) 2/13/91
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*/
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/*
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* Copyright (c) 1996 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Chris Torek.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)uda.c 7.32 (Berkeley) 2/13/91
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*/
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/*
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* UDA50 disk device driver
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: uda.c,v 1.60 2009/05/12 14:08:35 cegger Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <sys/bufq.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <machine/sid.h>
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#include <dev/qbus/ubavar.h>
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#include <dev/mscp/mscp.h>
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#include <dev/mscp/mscpreg.h>
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#include <dev/mscp/mscpvar.h>
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#include "ioconf.h"
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/*
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* Software status, per controller.
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*/
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struct uda_softc {
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device_t sc_dev; /* Autoconfig info */
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struct uba_softc *sc_uh;
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struct evcnt sc_intrcnt; /* Interrupt counting */
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struct uba_unit sc_unit; /* Struct common for UBA to communicate */
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struct ubinfo sc_ui;
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bus_dma_tag_t sc_dmat;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_iph;
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bus_space_handle_t sc_sah;
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struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */
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int sc_inq;
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};
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static int udamatch(device_t, cfdata_t, void *);
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static void udaattach(device_t, device_t, void *);
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static void udareset(device_t);
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static void udaintr(void *);
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static int udaready(struct uba_unit *);
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static void udactlrdone(device_t);
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static int udaprint(void *, const char *);
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static void udasaerror(device_t, int);
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static void udago(device_t, struct mscp_xi *);
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CFATTACH_DECL_NEW(mtc, sizeof(struct uda_softc),
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udamatch, udaattach, NULL, NULL);
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CFATTACH_DECL_NEW(uda, sizeof(struct uda_softc),
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udamatch, udaattach, NULL, NULL);
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/*
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* More driver definitions, for generic MSCP code.
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*/
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struct mscp_ctlr uda_mscp_ctlr = {
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udactlrdone,
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udago,
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udasaerror,
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};
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int
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udaprint(void *aux, const char *name)
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{
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if (name)
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aprint_normal("%s: mscpbus", name);
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return UNCONF;
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}
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/*
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* Poke at a supposed UDA50 to see if it is there.
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*/
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int
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udamatch(device_t parent, cfdata_t cf, void *aux)
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{
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struct uba_attach_args *ua = aux;
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struct uba_softc *uh = device_private(parent);
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struct mscp_softc mi; /* Nice hack */
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int tries;
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/* Get an interrupt vector. */
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mi.mi_iot = ua->ua_iot;
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mi.mi_iph = ua->ua_ioh;
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mi.mi_sah = ua->ua_ioh + 2;
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mi.mi_swh = ua->ua_ioh + 2;
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/*
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* Initialise the controller (partially). The UDA50 programmer's
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* manual states that if initialisation fails, it should be retried
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* at least once, but after a second failure the port should be
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* considered `down'; it also mentions that the controller should
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* initialise within ten seconds. Or so I hear; I have not seen
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* this manual myself.
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*/
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tries = 0;
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again:
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bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */
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if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0)
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return 0; /* Nothing here... */
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bus_space_write_2(mi.mi_iot, mi.mi_sah, 0,
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MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE |
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((uh->uh_lastiv - 4) >> 2));
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if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) {
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printf("udaprobe: init step2 no change. sa=%x\n",
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bus_space_read_2(mi.mi_iot, mi.mi_sah, 0));
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goto bad;
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}
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/* should have interrupted by now */
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return 1;
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bad:
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if (++tries < 2)
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goto again;
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return 0;
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}
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void
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udaattach(device_t parent, device_t self, void *aux)
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{
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struct uda_softc *sc = device_private(self);
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struct uba_attach_args *ua = aux;
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struct mscp_attach_args ma;
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int error;
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printf("\n");
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sc->sc_dev = self;
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sc->sc_uh = device_private(parent);
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sc->sc_uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */
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uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
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udaintr, sc, &sc->sc_intrcnt);
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uba_reset_establish(udareset, sc->sc_dev);
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evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
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device_xname(sc->sc_dev), "intr");
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sc->sc_iot = ua->ua_iot;
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sc->sc_iph = ua->ua_ioh;
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sc->sc_sah = ua->ua_ioh + 2;
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sc->sc_dmat = ua->ua_dmat;
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/*
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* Fill in the uba_unit struct, so we can communicate with the uba.
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*/
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sc->sc_unit.uu_dev = self; /* Backpointer to softc */
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sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */
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sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0;
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/*
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* Map the communication area and command and
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* response packets into Unibus space.
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*/
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sc->sc_ui.ui_size = sizeof(struct mscp_pack);
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if ((error = ubmemalloc(sc->sc_uh, &sc->sc_ui, UBA_CANTWAIT)))
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return printf("ubmemalloc failed: %d\n", error);
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memset(sc->sc_ui.ui_vaddr, 0, sizeof (struct mscp_pack));
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/*
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* The only thing that differ UDA's and Tape ctlr's is
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* their vcid. Beacuse there are no way to determine which
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* ctlr type it is, we check what is generated and later
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* set the correct vcid.
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*/
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ma.ma_type = (device_is_a(self, "mtc") ? MSCPBUS_TAPE : MSCPBUS_DISK);
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ma.ma_mc = &uda_mscp_ctlr;
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ma.ma_type |= MSCPBUS_UDA;
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ma.ma_uda = (struct mscp_pack *)sc->sc_ui.ui_vaddr;
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ma.ma_softc = &sc->sc_softc;
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ma.ma_iot = sc->sc_iot;
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ma.ma_iph = sc->sc_iph;
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ma.ma_sah = sc->sc_sah;
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ma.ma_swh = sc->sc_sah;
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ma.ma_dmat = sc->sc_dmat;
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ma.ma_dmam = sc->sc_ui.ui_dmam;
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ma.ma_ivec = sc->sc_uh->uh_lastiv;
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ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */
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ma.ma_adapnr = sc->sc_uh->uh_nr;
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config_found(sc->sc_dev, &ma, udaprint);
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}
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/*
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* Start a transfer if there are free resources available, otherwise
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* let it go in udaready, forget it for now.
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* Called from mscp routines.
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*/
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void
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udago(device_t dv, struct mscp_xi *mxi)
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{
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struct uda_softc *sc = device_private(dv);
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struct uba_unit *uu;
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struct buf *bp = mxi->mxi_bp;
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int err;
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/*
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* If we already have transfers queued, don't try to load
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* the map again.
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*/
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if (sc->sc_inq == 0) {
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err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam,
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bp->b_data, bp->b_bcount,
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(bp->b_flags & B_PHYS ? bp->b_proc : 0), BUS_DMA_NOWAIT);
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if (err == 0) {
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mscp_dgo(sc->sc_softc, mxi);
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return;
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}
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}
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uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT|M_ZERO);
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if (uu == NULL)
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panic("udago: no mem");
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uu->uu_ready = udaready;
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uu->uu_dev = dv;
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uu->uu_ref = mxi;
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uba_enqueue(uu);
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sc->sc_inq++;
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}
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/*
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* Called if we have been blocked for resources, and resources
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* have been freed again. Return 1 if we could start all
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* transfers again, 0 if we still are waiting.
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* Called from uba resource free routines.
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*/
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int
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udaready(struct uba_unit *uu)
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{
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struct uda_softc *sc = device_private(uu->uu_dev);
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struct mscp_xi *mxi = uu->uu_ref;
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struct buf *bp = mxi->mxi_bp;
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int err;
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err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_data,
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bp->b_bcount, (bp->b_flags & B_PHYS ? bp->b_proc : 0),
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BUS_DMA_NOWAIT);
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if (err)
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return 0;
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mscp_dgo(sc->sc_softc, mxi);
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sc->sc_inq--;
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free(uu, M_DEVBUF);
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return 1;
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}
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static const struct saerr {
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int code; /* error code (including UDA_ERR) */
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const char *desc; /* what it means: Efoo => foo error */
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} saerr[] = {
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{ 0100001, "Eunibus packet read" },
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{ 0100002, "Eunibus packet write" },
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{ 0100003, "EUDA ROM and RAM parity" },
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{ 0100004, "EUDA RAM parity" },
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{ 0100005, "EUDA ROM parity" },
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{ 0100006, "Eunibus ring read" },
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{ 0100007, "Eunibus ring write" },
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{ 0100010, " unibus interrupt master failure" },
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{ 0100011, "Ehost access timeout" },
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{ 0100012, " host exceeded command limit" },
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{ 0100013, " unibus bus master failure" },
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{ 0100014, " DM XFC fatal error" },
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{ 0100015, " hardware timeout of instruction loop" },
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{ 0100016, " invalid virtual circuit id" },
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{ 0100017, "Eunibus interrupt write" },
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{ 0104000, "Efatal sequence" },
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{ 0104040, " D proc ALU" },
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{ 0104041, "ED proc control ROM parity" },
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{ 0105102, "ED proc w/no BD#2 or RAM parity" },
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{ 0105105, "ED proc RAM buffer" },
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{ 0105152, "ED proc SDI" },
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{ 0105153, "ED proc write mode wrap serdes" },
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{ 0105154, "ED proc read mode serdes, RSGEN & ECC" },
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{ 0106040, "EU proc ALU" },
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{ 0106041, "EU proc control reg" },
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{ 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" },
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{ 0106047, " U proc const PROM err w/D proc running SDI test" },
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{ 0106055, " unexpected trap" },
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{ 0106071, "EU proc const PROM" },
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{ 0106072, "EU proc control ROM parity" },
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{ 0106200, "Estep 1 data" },
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{ 0107103, "EU proc RAM parity" },
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{ 0107107, "EU proc RAM buffer" },
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{ 0107115, " test count wrong (BD 12)" },
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{ 0112300, "Estep 2" },
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{ 0122240, "ENPR" },
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{ 0122300, "Estep 3" },
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{ 0142300, "Estep 4" },
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{ 0, " unknown error code" }
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};
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/*
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* If the error bit was set in the controller status register, gripe,
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* then (optionally) reset the controller and requeue pending transfers.
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*/
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void
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udasaerror(device_t dev, int doreset)
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{
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struct uda_softc *sc = device_private(dev);
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int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0);
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const struct saerr *e;
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if ((code & MP_ERR) == 0)
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return;
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for (e = saerr; e->code; e++)
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if (e->code == code)
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break;
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aprint_error_dev(sc->sc_dev, "controller error, sa=0%o (%s%s)\n",
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code, e->desc + 1, *e->desc == 'E' ? " error" : "");
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#if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */
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if (doreset) {
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mscp_requeue(sc->sc_softc);
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/* (void) udainit(sc); XXX */
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}
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#endif
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}
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/*
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* Interrupt routine. Depending on the state of the controller,
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* continue initialisation, or acknowledge command and response
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* interrupts, and process responses.
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*/
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static void
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udaintr(void *arg)
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{
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struct uda_softc *sc = arg;
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/* ctlr fatal error */
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if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) {
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udasaerror(sc->sc_dev, 1);
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return;
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}
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/*
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* Handle buffer purge requests.
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* XXX - should be done in bus_dma_sync().
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*/
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#ifdef notyet
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if (ud->mp_ca.ca_bdp) {
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if (sc->sc_uh->uh_ubapurge)
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(*sc->sc_uh->uh_ubapurge)(sc->sc_uh,
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ud->mp_ca.ca_bdp);
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/* signal purge complete */
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bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0);
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}
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#endif
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mscp_intr(sc->sc_softc);
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}
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/*
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* A Unibus reset has occurred on UBA uban. Reinitialise the controller(s)
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* on that Unibus, and requeue outstanding I/O.
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*/
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static void
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udareset(device_t dev)
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{
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struct uda_softc *sc = device_private(dev);
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/*
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* Our BDP (if any) is gone; our command (if any) is
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* flushed; the device is no longer mapped; and the
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* UDA50 is not yet initialised.
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*/
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if (sc->sc_unit.uu_bdp) {
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/* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */
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sc->sc_unit.uu_bdp = 0;
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}
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/* reset queues and requeue pending transfers */
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mscp_requeue(sc->sc_softc);
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/*
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* If it fails to initialise we will notice later and
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* try again (and again...). Do not call udastart()
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* here; it will be done after the controller finishes
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* initialisation.
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*/
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/* XXX if (udainit(sc)) */
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printf(" (hung)");
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}
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void
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udactlrdone(device_t dev)
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{
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struct uda_softc *sc = device_private(dev);
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int s;
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s = spluba();
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uba_done(sc->sc_uh);
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|
splx(s);
|
|
}
|