874 lines
31 KiB
C
874 lines
31 KiB
C
/* Header file for targets using CGEN: Cpu tools GENerator.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of GDB, the GNU debugger, and the GNU Binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef CGEN_H
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#define CGEN_H
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/* Prepend the cpu name, defined in cpu-opc.h, and _cgen_ to symbol S.
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The lack of spaces in the arg list is important for non-stdc systems.
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This file is included by <cpu>-opc.h.
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It can be included independently of cpu-opc.h, in which case the cpu
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dependent portions will be declared as "unknown_cgen_foo". */
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#ifndef CGEN_SYM
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#define CGEN_SYM(s) CONCAT3 (unknown,_cgen_,s)
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#endif
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/* This file contains the static (unchanging) pieces and as much other stuff
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as we can reasonably put here. It's generally cleaner to put stuff here
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rather than having it machine generated if possible. */
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/* The assembler syntax is made up of expressions (duh...).
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At the lowest level the values are mnemonics, register names, numbers, etc.
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Above that are subexpressions, if any (an example might be the
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"effective address" in m68k cpus). At the second highest level are the
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insns themselves. Above that are pseudo-insns, synthetic insns, and macros,
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if any.
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*/
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/* Lots of cpu's have a fixed insn size, or one which rarely changes,
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and it's generally easier to handle these by treating the insn as an
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integer type, rather than an array of characters. So we allow targets
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to control this. */
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#ifdef CGEN_INT_INSN
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typedef unsigned int cgen_insn_t;
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#else
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typedef char * cgen_insn_t;
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#endif
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#ifdef __GNUC__
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#define CGEN_INLINE inline
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#else
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#define CGEN_INLINE
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#endif
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/* Perhaps we should just use bfd.h, but it's not clear
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one would want to require that yet. */
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enum cgen_endian
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{
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CGEN_ENDIAN_UNKNOWN,
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CGEN_ENDIAN_LITTLE,
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CGEN_ENDIAN_BIG
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};
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/* Attributes.
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Attributes are used to describe various random things. */
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/* Struct to record attribute information. */
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typedef struct
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{
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unsigned char num_nonbools;
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unsigned int bool;
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unsigned int nonbool[1];
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} CGEN_ATTR;
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/* Define a structure member for attributes with N non-boolean entries.
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The attributes are sorted so that the non-boolean ones come first.
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num_nonbools: count of nonboolean attributes
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bool: values of boolean attributes
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nonbool: values of non-boolean attributes
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There is a maximum of 32 attributes total. */
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#define CGEN_ATTR_TYPE(n) \
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const struct { unsigned char num_nonbools; \
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unsigned int bool; \
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unsigned int nonbool[(n) ? (n) : 1]; }
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/* Given an attribute number, return its mask. */
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#define CGEN_ATTR_MASK(attr) (1 << (attr))
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/* Return the value of boolean attribute ATTR in ATTRS. */
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#define CGEN_BOOL_ATTR(attrs, attr) \
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((CGEN_ATTR_MASK (attr) & (attrs)) != 0)
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/* Return value of attribute ATTR in ATTR_TABLE for OBJ.
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OBJ is a pointer to the entity that has the attributes.
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It's not used at present but is reserved for future purposes. */
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#define CGEN_ATTR_VALUE(obj, attr_table, attr) \
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((unsigned int) (attr) < (attr_table)->num_nonbools \
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? ((attr_table)->nonbool[attr]) \
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: (((attr_table)->bool & (1 << (attr))) != 0))
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/* Attribute name/value tables.
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These are used to assist parsing of descriptions at runtime. */
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typedef struct
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{
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const char * name;
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int value;
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} CGEN_ATTR_ENTRY;
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/* For each domain (fld,operand,insn), list of attributes. */
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typedef struct
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{
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const char * name;
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/* NULL for boolean attributes. */
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const CGEN_ATTR_ENTRY * vals;
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} CGEN_ATTR_TABLE;
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/* Parse result (also extraction result).
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The result of parsing an insn is stored here.
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To generate the actual insn, this is passed to the insert handler.
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When printing an insn, the result of extraction is stored here.
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To print the insn, this is passed to the print handler.
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It is machine generated so we don't define it here,
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but we do need a forward decl for the handler fns.
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There is one member for each possible field in the insn.
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The type depends on the field.
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Also recorded here is the computed length of the insn for architectures
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where it varies.
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*/
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typedef struct cgen_fields CGEN_FIELDS;
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/* Total length of the insn, as recorded in the `fields' struct. */
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/* ??? The field insert handler has lots of opportunities for optimization
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if it ever gets inlined. On architectures where insns all have the same
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size, may wish to detect that and make this macro a constant - to allow
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further optimizations. */
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#define CGEN_FIELDS_BITSIZE(fields) ((fields)->length)
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/* Associated with each insn or expression is a set of "handlers" for
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performing operations like parsing, printing, etc. */
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/* Forward decl. */
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typedef struct cgen_insn CGEN_INSN;
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/* Parse handler.
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The first argument is a pointer to a struct describing the insn being
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parsed.
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The second argument is a pointer to a pointer to the text being parsed.
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The third argument is a pointer to a cgen_fields struct
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in which the results are placed.
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If the expression is successfully parsed, the pointer to the text is
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updated. If not it is left alone.
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The result is NULL if success or an error message. */
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typedef const char * (cgen_parse_fn) PARAMS ((const struct cgen_insn *,
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const char **,
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CGEN_FIELDS *));
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/* Print handler.
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The first argument is a pointer to the disassembly info.
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Eg: disassemble_info. It's defined as `PTR' so this file can be included
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without dis-asm.h.
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The second argument is a pointer to a struct describing the insn being
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printed.
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The third argument is a pointer to a cgen_fields struct.
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The fourth argument is the pc value of the insn.
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The fifth argument is the length of the insn, in bytes. */
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/* Don't require bfd.h unnecessarily. */
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#ifdef BFD_VERSION
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typedef void (cgen_print_fn) PARAMS ((PTR, const struct cgen_insn *,
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CGEN_FIELDS *, bfd_vma, int));
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#else
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typedef void (cgen_print_fn) ();
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#endif
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/* Insert handler.
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The first argument is a pointer to a struct describing the insn being
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parsed.
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The second argument is a pointer to a cgen_fields struct
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from which the values are fetched.
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The third argument is a pointer to a buffer in which to place the insn.
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The result is an error message or NULL if success. */
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typedef const char * (cgen_insert_fn) PARAMS ((const struct cgen_insn *,
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CGEN_FIELDS *, cgen_insn_t *));
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/* Extract handler.
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The first argument is a pointer to a struct describing the insn being
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parsed.
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The second argument is a pointer to a struct controlling extraction
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(only used for variable length insns).
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The third argument is the first CGEN_BASE_INSN_SIZE bytes.
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The fourth argument is a pointer to a cgen_fields struct
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in which the results are placed.
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The result is the length of the insn or zero if not recognized. */
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typedef int (cgen_extract_fn) PARAMS ((const struct cgen_insn *,
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void *, cgen_insn_t,
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CGEN_FIELDS *));
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/* The `parse' and `insert' fields are indices into these tables.
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The elements are pointer to specialized handler functions.
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Element 0 is special, it means use the default handler. */
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extern cgen_parse_fn * CGEN_SYM (parse_handlers) [];
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#define CGEN_PARSE_FN(x) (CGEN_SYM (parse_handlers)[(x)->base.parse])
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extern cgen_insert_fn * CGEN_SYM (insert_handlers) [];
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#define CGEN_INSERT_FN(x) (CGEN_SYM (insert_handlers)[(x)->base.insert])
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/* Likewise for the `extract' and `print' fields. */
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extern cgen_extract_fn * CGEN_SYM (extract_handlers) [];
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#define CGEN_EXTRACT_FN(x) (CGEN_SYM (extract_handlers)[(x)->base.extract])
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extern cgen_print_fn * CGEN_SYM (print_handlers) [];
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#define CGEN_PRINT_FN(x) (CGEN_SYM (print_handlers)[(x)->base.print])
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/* Base class of parser/printer.
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(Don't read too much into the use of the phrase "base class".
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It's a name I'm using to organize my thoughts.)
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Instructions and expressions all share this data in common.
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It's a collection of the common elements needed to parse, insert, extract,
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and print each of them. */
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struct cgen_base
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{
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/* Indices into the handler tables.
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We could use pointers here instead, but in the case of the insn table,
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90% of them would be identical and that's a lot of redundant data.
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0 means use the default (what the default is is up to the code). */
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unsigned char parse, insert, extract, print;
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};
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/* Assembler interface.
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The interface to the assembler is intended to be clean in the sense that
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libopcodes.a is a standalone entity and could be used with any assembler.
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Not that one would necessarily want to do that but rather that it helps
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keep a clean interface. The interface will obviously be slanted towards
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GAS, but at least it's a start.
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Parsing is controlled by the assembler which calls
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CGEN_SYM (assemble_insn). If it can parse and build the entire insn
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it doesn't call back to the assembler. If it needs/wants to call back
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to the assembler, (*cgen_parse_operand_fn) is called which can either
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- return a number to be inserted in the insn
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- return a "register" value to be inserted
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(the register might not be a register per pe)
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- queue the argument and return a marker saying the expression has been
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queued (eg: a fix-up)
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- return an error message indicating the expression wasn't recognizable
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The result is an error message or NULL for success.
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The parsed value is stored in the bfd_vma *. */
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/* Values for indicating what the caller wants. */
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enum cgen_parse_operand_type
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{
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CGEN_PARSE_OPERAND_INIT,
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CGEN_PARSE_OPERAND_INTEGER,
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CGEN_PARSE_OPERAND_ADDRESS
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};
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/* Values for indicating what was parsed.
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??? Not too useful at present but in time. */
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enum cgen_parse_operand_result
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{
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CGEN_PARSE_OPERAND_RESULT_NUMBER,
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CGEN_PARSE_OPERAND_RESULT_REGISTER,
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CGEN_PARSE_OPERAND_RESULT_QUEUED,
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CGEN_PARSE_OPERAND_RESULT_ERROR
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};
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/* Don't require bfd.h unnecessarily. */
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#ifdef BFD_VERSION
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extern const char * (*cgen_parse_operand_fn)
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PARAMS ((enum cgen_parse_operand_type, const char **, int, int,
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enum cgen_parse_operand_result *, bfd_vma *));
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#endif
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/* Called before trying to match a table entry with the insn. */
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void cgen_init_parse_operand PARAMS ((void));
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/* Called from <cpu>-asm.c to initialize operand parsing. */
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/* These are GAS specific. They're not here as part of the interface,
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but rather that we need to put them somewhere. */
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/* Call this from md_assemble to initialize the assembler callback. */
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void cgen_asm_init_parse PARAMS ((void));
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/* Don't require bfd.h unnecessarily. */
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#ifdef BFD_VERSION
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/* The result is an error message or NULL for success.
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The parsed value is stored in the bfd_vma *. */
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const char * cgen_parse_operand PARAMS ((enum cgen_parse_operand_type,
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const char **, int, int,
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enum cgen_parse_operand_result *,
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bfd_vma *));
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#endif
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void cgen_save_fixups PARAMS ((void));
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void cgen_restore_fixups PARAMS ((void));
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void cgen_swap_fixups PARAMS ((void));
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/* Add a register to the assembler's hash table.
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This makes lets GAS parse registers for us.
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??? This isn't currently used, but it could be in the future. */
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void cgen_asm_record_register PARAMS ((char *, int));
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/* After CGEN_SYM (assemble_insn) is done, this is called to
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output the insn and record any fixups. The address of the
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assembled instruction is returned in case it is needed by
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the caller. */
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char * cgen_asm_finish_insn PARAMS ((const struct cgen_insn *, cgen_insn_t *,
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unsigned int));
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/* Operand values (keywords, integers, symbols, etc.) */
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/* Types of assembler elements. */
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enum cgen_asm_type
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{
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CGEN_ASM_KEYWORD, CGEN_ASM_MAX
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};
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/* List of hardware elements. */
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typedef struct cgen_hw_entry
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{
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/* The type of this entry, one of `enum hw_type'.
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This is an int and not the enum as the latter may not be declared yet. */
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int type;
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const struct cgen_hw_entry * next;
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char * name;
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enum cgen_asm_type asm_type;
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PTR asm_data;
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} CGEN_HW_ENTRY;
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const CGEN_HW_ENTRY * cgen_hw_lookup PARAMS ((const char *));
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/* This struct is used to describe things like register names, etc. */
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typedef struct cgen_keyword_entry
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{
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/* Name (as in register name). */
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char * name;
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/* Value (as in register number).
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The value cannot be -1 as that is used to indicate "not found".
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IDEA: Have "FUNCTION" attribute? [function is called to fetch value]. */
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int value;
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/* Attributes.
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This should, but technically needn't, appear last. It is a variable sized
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array in that one architecture may have 1 nonbool attribute and another
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may have more. Having this last means the non-architecture specific code
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needn't care. */
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/* ??? Moving this last should be done by treating keywords like insn lists
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and moving the `next' fields into a CGEN_KEYWORD_LIST struct. */
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/* FIXME: Not used yet. */
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#ifndef CGEN_KEYWORD_NBOOL_ATTRS
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#define CGEN_KEYWORD_NBOOL_ATTRS 1
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#endif
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CGEN_ATTR_TYPE (CGEN_KEYWORD_NBOOL_ATTRS) attrs;
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/* Next name hash table entry. */
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struct cgen_keyword_entry *next_name;
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/* Next value hash table entry. */
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struct cgen_keyword_entry *next_value;
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} CGEN_KEYWORD_ENTRY;
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/* Top level struct for describing a set of related keywords
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(e.g. register names).
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This struct supports runtime entry of new values, and hashed lookups. */
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typedef struct cgen_keyword
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{
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/* Pointer to initial [compiled in] values. */
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CGEN_KEYWORD_ENTRY * init_entries;
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/* Number of entries in `init_entries'. */
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unsigned int num_init_entries;
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/* Hash table used for name lookup. */
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CGEN_KEYWORD_ENTRY ** name_hash_table;
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/* Hash table used for value lookup. */
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CGEN_KEYWORD_ENTRY ** value_hash_table;
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/* Number of entries in the hash_tables. */
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unsigned int hash_table_size;
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/* Pointer to null keyword "" entry if present. */
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const CGEN_KEYWORD_ENTRY * null_entry;
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} CGEN_KEYWORD;
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/* Structure used for searching. */
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typedef struct
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{
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/* Table being searched. */
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const CGEN_KEYWORD * table;
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/* Specification of what is being searched for. */
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const char * spec;
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/* Current index in hash table. */
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unsigned int current_hash;
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/* Current element in current hash chain. */
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CGEN_KEYWORD_ENTRY * current_entry;
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} CGEN_KEYWORD_SEARCH;
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/* Lookup a keyword from its name. */
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const CGEN_KEYWORD_ENTRY * cgen_keyword_lookup_name
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PARAMS ((CGEN_KEYWORD *, const char *));
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/* Lookup a keyword from its value. */
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const CGEN_KEYWORD_ENTRY * cgen_keyword_lookup_value
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PARAMS ((CGEN_KEYWORD *, int));
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/* Add a keyword. */
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void cgen_keyword_add PARAMS ((CGEN_KEYWORD *, CGEN_KEYWORD_ENTRY *));
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/* Keyword searching.
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This can be used to retrieve every keyword, or a subset. */
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CGEN_KEYWORD_SEARCH cgen_keyword_search_init
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PARAMS ((CGEN_KEYWORD *, const char *));
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const CGEN_KEYWORD_ENTRY *cgen_keyword_search_next
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PARAMS ((CGEN_KEYWORD_SEARCH *));
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/* Operand value support routines. */
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/* FIXME: some of the long's here will need to be bfd_vma or some such. */
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const char * cgen_parse_keyword PARAMS ((const char **,
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CGEN_KEYWORD *,
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long *));
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const char * cgen_parse_signed_integer PARAMS ((const char **, int, long *));
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const char * cgen_parse_unsigned_integer PARAMS ((const char **, int,
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unsigned long *));
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const char * cgen_parse_address PARAMS ((const char **, int, int,
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enum cgen_parse_operand_result *,
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long *));
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const char * cgen_validate_signed_integer PARAMS ((long, long, long));
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const char * cgen_validate_unsigned_integer PARAMS ((unsigned long,
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unsigned long,
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unsigned long));
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/* Operand modes. */
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/* ??? This duplicates the values in arch.h. Revisit.
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These however need the CGEN_ prefix [as does everything in this file]. */
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/* ??? Targets may need to add their own modes so we may wish to move this
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to <arch>-opc.h, or add a hook. */
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enum cgen_mode {
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CGEN_MODE_VOID, /* FIXME: rename simulator's VM to VOID */
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CGEN_MODE_BI, CGEN_MODE_QI, CGEN_MODE_HI, CGEN_MODE_SI, CGEN_MODE_DI,
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CGEN_MODE_UBI, CGEN_MODE_UQI, CGEN_MODE_UHI, CGEN_MODE_USI, CGEN_MODE_UDI,
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CGEN_MODE_SF, CGEN_MODE_DF, CGEN_MODE_XF, CGEN_MODE_TF,
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CGEN_MODE_MAX
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};
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/* FIXME: Until simulator is updated. */
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#define CGEN_MODE_VM CGEN_MODE_VOID
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/* This struct defines each entry in the operand table. */
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typedef struct cgen_operand
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{
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/* Name as it appears in the syntax string. */
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char * name;
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/* The hardware element associated with this operand. */
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const CGEN_HW_ENTRY *hw;
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/* FIXME: We don't yet record ifield definitions, which we should.
|
||
When we do it might make sense to delete start/length (since they will
|
||
be duplicated in the ifield's definition) and replace them with a
|
||
pointer to the ifield entry. Note that as more complicated situations
|
||
need to be handled, going more and more with an OOP paradigm will help
|
||
keep the complication under control. Of course, this was the goal from
|
||
the start, but getting there in one step was too much too soon. */
|
||
|
||
/* Bit position (msb of first byte = bit 0).
|
||
This is just a hint, and may be unused in more complex operands.
|
||
May be unused for a modifier. */
|
||
unsigned char start;
|
||
|
||
/* The number of bits in the operand.
|
||
This is just a hint, and may be unused in more complex operands.
|
||
May be unused for a modifier. */
|
||
unsigned char length;
|
||
|
||
#if 0 /* ??? Interesting idea but relocs tend to get too complicated,
|
||
and ABI dependent, for simple table lookups to work. */
|
||
/* Ideally this would be the internal (external?) reloc type. */
|
||
int reloc_type;
|
||
#endif
|
||
|
||
/* Attributes.
|
||
This should, but technically needn't, appear last. It is a variable sized
|
||
array in that one architecture may have 1 nonbool attribute and another
|
||
may have more. Having this last means the non-architecture specific code
|
||
needn't care, now or tomorrow. */
|
||
#ifndef CGEN_OPERAND_NBOOL_ATTRS
|
||
#define CGEN_OPERAND_NBOOL_ATTRS 1
|
||
#endif
|
||
CGEN_ATTR_TYPE (CGEN_OPERAND_NBOOL_ATTRS) attrs;
|
||
#define CGEN_OPERAND_ATTRS(operand) (&(operand)->attrs)
|
||
} CGEN_OPERAND;
|
||
|
||
/* Return value of attribute ATTR in OPERAND. */
|
||
#define CGEN_OPERAND_ATTR(operand, attr) \
|
||
CGEN_ATTR_VALUE (operand, CGEN_OPERAND_ATTRS (operand), attr)
|
||
|
||
/* The operand table is currently a very static entity. */
|
||
extern const CGEN_OPERAND CGEN_SYM (operand_table)[];
|
||
|
||
enum cgen_operand_type;
|
||
|
||
#define CGEN_OPERAND_INDEX(operand) ((int) ((operand) - CGEN_SYM (operand_table)))
|
||
/* FIXME: Rename, cpu-opc.h defines this as the typedef of the enum. */
|
||
#define CGEN_OPERAND_TYPE(operand) ((enum cgen_operand_type) CGEN_OPERAND_INDEX (operand))
|
||
#define CGEN_OPERAND_ENTRY(n) (& CGEN_SYM (operand_table) [n])
|
||
|
||
/* Types of parse/insert/extract/print cover-fn handlers. */
|
||
/* FIXME: move opindex first to match caller. */
|
||
/* FIXME: also need types of insert/extract/print fns. */
|
||
/* FIXME: not currently used as type of 3rd arg varies. */
|
||
typedef const char * (CGEN_PARSE_OPERAND_FN) PARAMS ((const char **, int,
|
||
long *));
|
||
|
||
/* Instruction operand instances.
|
||
|
||
For each instruction, a list of the hardware elements that are read and
|
||
written are recorded. */
|
||
|
||
/* The type of the instance. */
|
||
enum cgen_operand_instance_type {
|
||
/* End of table marker. */
|
||
CGEN_OPERAND_INSTANCE_END = 0,
|
||
CGEN_OPERAND_INSTANCE_INPUT, CGEN_OPERAND_INSTANCE_OUTPUT
|
||
};
|
||
|
||
typedef struct
|
||
{
|
||
/* The type of this operand. */
|
||
enum cgen_operand_instance_type type;
|
||
#define CGEN_OPERAND_INSTANCE_TYPE(opinst) ((opinst)->type)
|
||
|
||
/* The hardware element referenced. */
|
||
const CGEN_HW_ENTRY *hw;
|
||
#define CGEN_OPERAND_INSTANCE_HW(opinst) ((opinst)->hw)
|
||
|
||
/* The mode in which the operand is being used. */
|
||
enum cgen_mode mode;
|
||
#define CGEN_OPERAND_INSTANCE_MODE(opinst) ((opinst)->mode)
|
||
|
||
/* The operand table entry or NULL if there is none (i.e. an explicit
|
||
hardware reference). */
|
||
const CGEN_OPERAND *operand;
|
||
#define CGEN_OPERAND_INSTANCE_OPERAND(opinst) ((opinst)->operand)
|
||
|
||
/* If `operand' is NULL, the index (e.g. into array of registers). */
|
||
int index;
|
||
#define CGEN_OPERAND_INSTANCE_INDEX(opinst) ((opinst)->index)
|
||
} CGEN_OPERAND_INSTANCE;
|
||
|
||
/* Syntax string.
|
||
|
||
Each insn format and subexpression has one of these.
|
||
|
||
The syntax "string" consists of characters (n > 0 && n < 128), and operand
|
||
values (n >= 128), and is terminated by 0. Operand values are 128 + index
|
||
into the operand table. The operand table doesn't exist in C, per se, as
|
||
the data is recorded in the parse/insert/extract/print switch statements. */
|
||
|
||
#ifndef CGEN_MAX_SYNTAX_BYTES
|
||
#define CGEN_MAX_SYNTAX_BYTES 16
|
||
#endif
|
||
|
||
typedef struct
|
||
{
|
||
unsigned char syntax[CGEN_MAX_SYNTAX_BYTES];
|
||
} CGEN_SYNTAX;
|
||
|
||
#define CGEN_SYNTAX_STRING(syn) (syn->syntax)
|
||
#define CGEN_SYNTAX_CHAR_P(c) ((c) < 128)
|
||
#define CGEN_SYNTAX_CHAR(c) (c)
|
||
#define CGEN_SYNTAX_FIELD(c) ((c) - 128)
|
||
#define CGEN_SYNTAX_MAKE_FIELD(c) ((c) + 128)
|
||
|
||
/* ??? I can't currently think of any case where the mnemonic doesn't come
|
||
first [and if one ever doesn't building the hash tables will be tricky].
|
||
However, we treat mnemonics as just another operand of the instruction.
|
||
A value of 1 means "this is where the mnemonic appears". 1 isn't
|
||
special other than it's a non-printable ASCII char. */
|
||
#define CGEN_SYNTAX_MNEMONIC 1
|
||
#define CGEN_SYNTAX_MNEMONIC_P(ch) ((ch) == CGEN_SYNTAX_MNEMONIC)
|
||
|
||
/* Instruction formats.
|
||
|
||
Instructions are grouped by format. Associated with an instruction is its
|
||
format. Each opcode table entry contains a format table entry.
|
||
??? There is usually very few formats compared with the number of insns,
|
||
so one can reduce the size of the opcode table by recording the format table
|
||
as a separate entity. Given that we currently don't, format table entries
|
||
are also distinguished by their operands. This increases the size of the
|
||
table, but reduces the number of tables. It's all minutiae anyway so it
|
||
doesn't really matter [at this point in time].
|
||
|
||
??? Support for variable length ISA's is wip. */
|
||
|
||
typedef struct
|
||
{
|
||
/* Length that MASK and VALUE have been calculated to
|
||
[VALUE is recorded elsewhere].
|
||
Normally it is CGEN_BASE_INSN_BITSIZE. On [V]LIW architectures where
|
||
the base insn size may be larger than the size of an insn, this field is
|
||
less than CGEN_BASE_INSN_BITSIZE. */
|
||
unsigned char mask_length;
|
||
|
||
/* Total length of instruction, in bits. */
|
||
unsigned char length;
|
||
|
||
/* Mask to apply to the first MASK_LENGTH bits.
|
||
Each insn's value is stored with the insn.
|
||
The first step in recognizing an insn for disassembly is
|
||
(opcode & mask) == value. */
|
||
unsigned int mask;
|
||
} CGEN_FORMAT;
|
||
|
||
/* This struct defines each entry in the instruction table. */
|
||
|
||
struct cgen_insn
|
||
{
|
||
/* ??? Further table size reductions can be had by moving this element
|
||
either to the format table or to a separate table of its own. Not
|
||
sure this is desirable yet. */
|
||
struct cgen_base base;
|
||
|
||
/* Given a pointer to a cgen_insn struct, return a pointer to `base'. */
|
||
#define CGEN_INSN_BASE(insn) (&(insn)->base)
|
||
|
||
/* Name of entry (that distinguishes it from all other entries).
|
||
This is used, for example, in simulator profiling results. */
|
||
/* ??? If mnemonics have operands, try to print full mnemonic. */
|
||
const char * name;
|
||
#define CGEN_INSN_NAME(insn) ((insn)->name)
|
||
|
||
/* Mnemonic. This is used when parsing and printing the insn.
|
||
In the case of insns that have operands on the mnemonics, this is
|
||
only the constant part. E.g. for conditional execution of an `add' insn,
|
||
where the full mnemonic is addeq, addne, etc., this is only "add". */
|
||
const char * mnemonic;
|
||
#define CGEN_INSN_MNEMONIC(insn) ((insn)->mnemonic)
|
||
|
||
/* Syntax string. */
|
||
const CGEN_SYNTAX syntax;
|
||
#define CGEN_INSN_SYNTAX(insn) (& (insn)->syntax)
|
||
|
||
/* Format entry. */
|
||
const CGEN_FORMAT format;
|
||
#define CGEN_INSN_MASK_BITSIZE(insn) ((insn)->format.mask_length)
|
||
#define CGEN_INSN_BITSIZE(insn) ((insn)->format.length)
|
||
|
||
/* Instruction opcode value. */
|
||
unsigned int value;
|
||
#define CGEN_INSN_VALUE(insn) ((insn)->value)
|
||
#define CGEN_INSN_MASK(insn) ((insn)->format.mask)
|
||
|
||
/* Pointer to NULL entry terminated table of operands used,
|
||
or NULL if none. */
|
||
const CGEN_OPERAND_INSTANCE *operands;
|
||
#define CGEN_INSN_OPERANDS(insn) ((insn)->operands)
|
||
|
||
/* Attributes.
|
||
This must appear last. It is a variable sized array in that one
|
||
architecture may have 1 nonbool attribute and another may have more.
|
||
Having this last means the non-architecture specific code needn't
|
||
care. */
|
||
#ifndef CGEN_INSN_NBOOL_ATTRS
|
||
#define CGEN_INSN_NBOOL_ATTRS 1
|
||
#endif
|
||
CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS) attrs;
|
||
#define CGEN_INSN_ATTRS(insn) (&(insn)->attrs)
|
||
/* Return value of attribute ATTR in INSN. */
|
||
#define CGEN_INSN_ATTR(insn, attr) \
|
||
CGEN_ATTR_VALUE (insn, CGEN_INSN_ATTRS (insn), attr)
|
||
};
|
||
|
||
/* Instruction lists.
|
||
This is used for adding new entries and for creating the hash lists. */
|
||
|
||
typedef struct cgen_insn_list
|
||
{
|
||
struct cgen_insn_list * next;
|
||
const CGEN_INSN * insn;
|
||
} CGEN_INSN_LIST;
|
||
|
||
/* The table of instructions. */
|
||
|
||
typedef struct
|
||
{
|
||
/* Pointer to initial [compiled in] entries. */
|
||
const CGEN_INSN * init_entries;
|
||
|
||
/* Size of an entry (since the attribute member is variable sized). */
|
||
unsigned int entry_size;
|
||
|
||
/* Number of entries in `init_entries', including trailing NULL entry. */
|
||
unsigned int num_init_entries;
|
||
|
||
/* Values added at runtime. */
|
||
CGEN_INSN_LIST * new_entries;
|
||
|
||
/* Assembler hash function. */
|
||
unsigned int (* asm_hash) PARAMS ((const char *));
|
||
|
||
/* Number of entries in assembler hash table. */
|
||
unsigned int asm_hash_table_size;
|
||
|
||
/* Disassembler hash function. */
|
||
unsigned int (* dis_hash) PARAMS ((const char *, unsigned long));
|
||
|
||
/* Number of entries in disassembler hash table. */
|
||
unsigned int dis_hash_table_size;
|
||
} CGEN_INSN_TABLE;
|
||
|
||
/* ??? This is currently used by the simulator.
|
||
We want this to be fast and the simulator currently doesn't handle
|
||
runtime added instructions so this is ok. An alternative would be to
|
||
store the index in the table. */
|
||
extern const CGEN_INSN CGEN_SYM (insn_table_entries)[];
|
||
#define CGEN_INSN_INDEX(insn) ((int) ((insn) - CGEN_SYM (insn_table_entries)))
|
||
#define CGEN_INSN_ENTRY(n) (& CGEN_SYM (insn_table_entries) [n])
|
||
|
||
/* Return number of instructions. This includes any added at runtime. */
|
||
|
||
int cgen_insn_count PARAMS ((void));
|
||
|
||
/* The assembler insn table is hashed based on some function of the mnemonic
|
||
(the actually hashing done is up to the target, but we provide a few
|
||
examples like the first letter or a function of the entire mnemonic).
|
||
The index of each entry is the index of the corresponding table entry.
|
||
The value of each entry is the index of the next entry, with a 0
|
||
terminating (thus the first entry is reserved). */
|
||
|
||
#ifndef CGEN_ASM_HASH
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
#define CGEN_ASM_HASH_SIZE 127
|
||
#define CGEN_ASM_HASH(string) (*(unsigned char *) (string) % CGEN_ASM_HASH_SIZE)
|
||
#else
|
||
#define CGEN_ASM_HASH_SIZE 128
|
||
#define CGEN_ASM_HASH(string) (*(unsigned char *) (string) % CGEN_ASM_HASH_SIZE) /*FIXME*/
|
||
#endif
|
||
#endif
|
||
|
||
unsigned int CGEN_SYM (asm_hash_insn) PARAMS ((const char *));
|
||
CGEN_INSN_LIST * cgen_asm_lookup_insn PARAMS ((const char *));
|
||
#define CGEN_ASM_LOOKUP_INSN(insn) cgen_asm_lookup_insn (insn)
|
||
#define CGEN_ASM_NEXT_INSN(insn) ((insn)->next)
|
||
|
||
/* The disassembler insn table is hashed based on some function of machine
|
||
instruction (the actually hashing done is up to the target). */
|
||
|
||
/* It doesn't make much sense to provide a default here,
|
||
but while this is under development we do.
|
||
BUFFER is a pointer to the bytes of the insn.
|
||
INSN is the first CGEN_BASE_INSN_SIZE bytes as an int in host order. */
|
||
#ifndef CGEN_DIS_HASH
|
||
#define CGEN_DIS_HASH_SIZE 256
|
||
#define CGEN_DIS_HASH(buffer, insn) (*(unsigned char *) (buffer))
|
||
#endif
|
||
|
||
unsigned int CGEN_SYM (dis_hash_insn) PARAMS ((const char *, unsigned long));
|
||
CGEN_INSN_LIST * cgen_dis_lookup_insn PARAMS ((const char *, unsigned long));
|
||
#define CGEN_DIS_LOOKUP_INSN(buf, insn) cgen_dis_lookup_insn (buf, insn)
|
||
#define CGEN_DIS_NEXT_INSN(insn) ((insn)->next)
|
||
|
||
/* Top level structures and functions. */
|
||
|
||
typedef struct
|
||
{
|
||
const CGEN_HW_ENTRY * hw_list;
|
||
/*CGEN_OPERAND_TABLE * operand_table; - FIXME:wip */
|
||
CGEN_INSN_TABLE * insn_table;
|
||
} CGEN_OPCODE_DATA;
|
||
|
||
/* Each CPU has one of these. */
|
||
extern CGEN_OPCODE_DATA CGEN_SYM (opcode_data);
|
||
|
||
/* Global state access macros.
|
||
Some of these are tucked away and accessed with cover fns.
|
||
Simpler things like the current machine and endian are not. */
|
||
|
||
extern int cgen_current_machine;
|
||
#define CGEN_CURRENT_MACHINE cgen_current_machine
|
||
|
||
extern enum cgen_endian cgen_current_endian;
|
||
#define CGEN_CURRENT_ENDIAN cgen_current_endian
|
||
|
||
/* Prototypes of major functions. */
|
||
|
||
/* Set the current cpu (+ mach number, endian, etc.). */
|
||
void cgen_set_cpu PARAMS ((CGEN_OPCODE_DATA *, int, enum cgen_endian));
|
||
|
||
/* Initialize the assembler, disassembler. */
|
||
void cgen_asm_init PARAMS ((void));
|
||
void cgen_dis_init PARAMS ((void));
|
||
|
||
/* `init_tables' must be called before `xxx_supported'. */
|
||
void CGEN_SYM (init_tables) PARAMS ((int));
|
||
void CGEN_SYM (init_asm) PARAMS ((int, enum cgen_endian));
|
||
void CGEN_SYM (init_dis) PARAMS ((int, enum cgen_endian));
|
||
void CGEN_SYM (init_parse) PARAMS ((void));
|
||
void CGEN_SYM (init_print) PARAMS ((void));
|
||
void CGEN_SYM (init_insert) PARAMS ((void));
|
||
void CGEN_SYM (init_extract) PARAMS ((void));
|
||
|
||
/* FIXME: This prototype is wrong ifndef CGEN_INT_INSN.
|
||
Furthermore, ifdef CGEN_INT_INSN, the insn is created in
|
||
target byte order (in which case why use int's at all).
|
||
Perhaps replace cgen_insn_t * with char *? */
|
||
const struct cgen_insn *
|
||
CGEN_SYM (assemble_insn) PARAMS ((const char *, CGEN_FIELDS *,
|
||
cgen_insn_t *, char **));
|
||
#if 0 /* old */
|
||
int CGEN_SYM (insn_supported) PARAMS ((const struct cgen_insn *));
|
||
int CGEN_SYM (opval_supported) PARAMS ((const struct cgen_opval *));
|
||
#endif
|
||
|
||
extern const CGEN_KEYWORD CGEN_SYM (operand_mach);
|
||
int CGEN_SYM (get_mach) PARAMS ((const char *));
|
||
|
||
const CGEN_INSN *
|
||
CGEN_SYM (get_insn_operands) PARAMS ((const CGEN_INSN *, cgen_insn_t,
|
||
int, int *));
|
||
const CGEN_INSN *
|
||
CGEN_SYM (lookup_insn) PARAMS ((const CGEN_INSN *, cgen_insn_t,
|
||
int, CGEN_FIELDS *, int));
|
||
|
||
CGEN_INLINE void
|
||
CGEN_SYM (put_operand) PARAMS ((int, const long *,
|
||
CGEN_FIELDS *));
|
||
CGEN_INLINE long
|
||
CGEN_SYM (get_operand) PARAMS ((int, const CGEN_FIELDS *));
|
||
|
||
const char *
|
||
CGEN_SYM (parse_operand) PARAMS ((int, const char **, CGEN_FIELDS *));
|
||
|
||
const char *
|
||
CGEN_SYM (insert_operand) PARAMS ((int, CGEN_FIELDS *, char *));
|
||
|
||
/* Default insn parser, printer. */
|
||
extern cgen_parse_fn CGEN_SYM (parse_insn);
|
||
extern cgen_insert_fn CGEN_SYM (insert_insn);
|
||
extern cgen_extract_fn CGEN_SYM (extract_insn);
|
||
extern cgen_print_fn CGEN_SYM (print_insn);
|
||
|
||
/* Read in a cpu description file. */
|
||
const char * cgen_read_cpu_file PARAMS ((const char *));
|
||
|
||
#endif /* CGEN_H */
|