159 lines
4.8 KiB
C
159 lines
4.8 KiB
C
/* $NetBSD: pciide_pnpbios.c,v 1.2 1999/11/14 02:15:51 thorpej Exp $ */
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/*
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* Copyright (c) 1999 Soren S. Jorvang. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Handle the weird "almost PCI" IDE on Toshiba Porteges.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <i386/pnpbios/pnpbiosvar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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static int pciide_pnpbios_match(struct device *, struct cfdata *, void *);
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static void pciide_pnpbios_attach(struct device *, struct device *, void *);
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extern void pciide_channel_dma_setup(struct pciide_channel *);
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extern int pciide_dma_init(void *, int, int, void *, size_t, int);
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extern void pciide_dma_start(void *, int, int, int);
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extern int pciide_dma_finish(void *, int, int, int);
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extern int pciide_compat_intr (void *);
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struct cfattach pciide_pnpbios_ca = {
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sizeof(struct pciide_softc),
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pciide_pnpbios_match,
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pciide_pnpbios_attach
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};
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int
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pciide_pnpbios_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pnpbiosdev_attach_args *aa = aux;
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if (strcmp(aa->idstr, "TOS7300") == 0)
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return 1;
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return 0;
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}
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void
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pciide_pnpbios_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pciide_softc *sc = (void *)self;
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struct pnpbiosdev_attach_args *aa = aux;
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struct pciide_channel *cp;
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struct channel_softc *wdc_cp;
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bus_space_tag_t compat_iot;
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bus_space_handle_t cmd_ioh, ctl_ioh;
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printf("\n");
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pnpbios_print_devres(self, aa);
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printf("%s: Toshiba Extended IDE Controller\n", self->dv_xname);
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if (pnpbios_io_map(aa->pbt, aa->resc, 2, &sc->sc_dma_iot,
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&sc->sc_dma_ioh) != 0) {
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printf("%s: unable to map DMA registers\n", self->dv_xname);
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return;
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}
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if (pnpbios_io_map(aa->pbt, aa->resc, 0, &compat_iot,
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&cmd_ioh) != 0) {
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printf("%s: unable to map command registers\n", self->dv_xname);
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return;
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}
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if (pnpbios_io_map(aa->pbt, aa->resc, 1, &compat_iot,
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&ctl_ioh) != 0) {
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printf("%s: unable to map control register\n", self->dv_xname);
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return;
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}
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sc->sc_dmat = &pci_bus_dma_tag;
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sc->sc_dma_ok = 1;
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sc->sc_wdcdev.dma_arg = sc;
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sc->sc_wdcdev.dma_init = pciide_dma_init;
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sc->sc_wdcdev.dma_start = pciide_dma_start;
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sc->sc_wdcdev.dma_finish = pciide_dma_finish;
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sc->sc_wdcdev.channels = sc->wdc_chanarray;
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sc->sc_wdcdev.nchannels = 1;
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
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#if 0 /* Need documentation. */
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sc->sc_wdcdev.cap |= WDC_CAPABILITY_MODE;
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#endif
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sc->sc_wdcdev.PIO_cap = 4;
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sc->sc_wdcdev.DMA_cap = 2; /* XXX */
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sc->sc_wdcdev.UDMA_cap = 2; /* XXX */
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cp = &sc->pciide_channels[0];
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sc->wdc_chanarray[0] = &cp->wdc_channel;
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cp->wdc_channel.channel = 0;
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cp->wdc_channel.wdc = &sc->sc_wdcdev;
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cp->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue),
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M_DEVBUF, M_NOWAIT);
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if (cp->wdc_channel.ch_queue == NULL) {
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printf("%s: unable to allocate memory for command queue\n",
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self->dv_xname);
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return;
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}
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wdc_cp = &cp->wdc_channel;
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wdc_cp->cmd_iot = compat_iot;
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wdc_cp->cmd_ioh = cmd_ioh;
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wdc_cp->ctl_iot = wdc_cp->data32iot = compat_iot;
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wdc_cp->ctl_ioh = wdc_cp->data32ioh = ctl_ioh;
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cp->hw_ok = 1; /* XXX */
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cp->compat = 1;
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cp->ih = pnpbios_intr_establish(aa->pbt, aa->resc, 0, IPL_BIO,
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pciide_compat_intr, cp);
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wdcattach(wdc_cp);
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pciide_channel_dma_setup(cp);
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}
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