581 lines
20 KiB
C
581 lines
20 KiB
C
/* $NetBSD: atavar.h,v 1.97 2018/06/01 18:13:30 macallan Exp $ */
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/*
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* Copyright (c) 1998, 2001 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_ATA_ATAVAR_H_
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#define _DEV_ATA_ATAVAR_H_
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#include <sys/lock.h>
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#include <sys/queue.h>
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#include <dev/ata/ataconf.h>
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/* XXX For scsipi_adapter and scsipi_channel. */
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/atapiconf.h>
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/*
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* Parameters/state needed by the controller to perform an ATA bio.
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*/
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struct ata_bio {
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volatile uint16_t flags;/* cmd flags */
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/* 0x0001 free, was ATA_NOSLEEP */
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#define ATA_POLL 0x0002 /* poll for completion */
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#define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */
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#define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */
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#define ATA_LBA 0x0010 /* transfer uses LBA addressing */
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#define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */
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#define ATA_CORR 0x0040 /* transfer had a corrected error */
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#define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */
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#define ATA_FUA 0x0100 /* transfer uses FUA */
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#define ATA_PRIO_HIGH 0x0200 /* transfer has high priority */
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daddr_t blkno; /* block addr */
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daddr_t blkdone;/* number of blks transferred */
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daddr_t nblks; /* number of block currently transferring */
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int nbytes; /* number of bytes currently transferring */
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long bcount; /* total number of bytes */
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char *databuf;/* data buffer address */
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volatile int error;
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#define NOERROR 0 /* There was no error (r_error invalid) */
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#define ERROR 1 /* check r_error */
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#define ERR_DF 2 /* Drive fault */
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#define ERR_DMA 3 /* DMA error */
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#define TIMEOUT 4 /* device timed out */
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#define ERR_NODEV 5 /* device has been gone */
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#define ERR_RESET 6 /* command was terminated by channel reset */
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#define REQUEUE 7 /* different xfer failed, requeue command */
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uint8_t r_error;/* copy of error register */
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struct buf *bp;
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};
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/*
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* ATA/ATAPI commands description
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*
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* This structure defines the interface between the ATA/ATAPI device driver
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* and the controller for short commands. It contains the command's parameter,
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* the length of data to read/write (if any), and a function to call upon
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* completion.
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* If no sleep is allowed, the driver can poll for command completion.
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* Once the command completed, if the error registered is valid, the flag
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* AT_ERROR is set and the error register value is copied to r_error .
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* A separate interface is needed for read/write or ATAPI packet commands
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* (which need multiple interrupts per commands).
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*/
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struct ata_command {
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/* ATA parameters */
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uint64_t r_lba; /* before & after */
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uint16_t r_count; /* before & after */
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union {
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uint16_t r_features; /* before */
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uint8_t r_error; /* after */
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};
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union {
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uint8_t r_command; /* before */
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uint8_t r_status; /* after */
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};
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uint8_t r_device; /* before & after */
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uint8_t r_st_bmask; /* status register mask to wait for before
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command */
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uint8_t r_st_pmask; /* status register mask to wait for after
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command */
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volatile uint16_t flags;
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#define AT_READ 0x0001 /* There is data to read */
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#define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */
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#define AT_WAIT 0x0008 /* wait in controller code for command completion */
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#define AT_POLL 0x0010 /* poll for command completion (no interrupts) */
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#define AT_DONE 0x0020 /* command is done */
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#define AT_XFDONE 0x0040 /* data xfer is done */
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#define AT_ERROR 0x0080 /* command is done with error */
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#define AT_TIMEOU 0x0100 /* command timed out */
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#define AT_DF 0x0200 /* Drive fault */
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#define AT_RESET 0x0400 /* command terminated by channel reset */
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#define AT_GONE 0x0800 /* command terminated because device is gone */
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#define AT_READREG 0x1000 /* Read registers on completion */
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#define AT_LBA 0x2000 /* LBA28 */
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#define AT_LBA48 0x4000 /* LBA48 */
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int timeout; /* timeout (in ms) */
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void *data; /* Data buffer address */
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int bcount; /* number of bytes to transfer */
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};
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/* Forward declaration for ata_xfer */
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struct scsipi_xfer;
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/*
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* Description of a command to be handled by an ATA controller. These
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* commands are queued in a list.
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*/
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struct ata_xfer {
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struct callout c_timo_callout; /* timeout callout handle */
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struct callout c_retry_callout; /* retry callout handle */
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kcondvar_t c_active; /* somebody actively waiting for xfer */
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kcondvar_t c_finish; /* somebody waiting for xfer finish */
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int8_t c_slot; /* queue slot # */
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#define c_startzero c_chp
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/* Channel and drive that are to process the request. */
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struct ata_channel *c_chp;
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uint16_t c_drive;
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uint16_t c_retries; /* number of xfer retry */
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volatile u_int c_flags; /* command state flags */
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void *c_databuf; /* pointer to data buffer */
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int c_bcount; /* byte count left */
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int c_skip; /* bytes already transferred */
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int c_dscpoll; /* counter for dsc polling (ATAPI) */
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int c_lenoff; /* offset to c_bcount (ATAPI) */
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#define ATACH_ERR_ST(error, status) ((error) << 8 | (status))
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#define ATACH_ERR(val) (((val) >> 8) & 0xff)
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#define ATACH_ST(val) (((val) >> 0) & 0xff)
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union {
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struct ata_bio c_bio; /* ATA transfer */
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struct ata_command c_ata_c; /* ATA command */
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struct scsipi_xfer *c_scsipi; /* SCSI transfer */
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} u;
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#define c_bio u.c_bio
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#define c_ata_c u.c_ata_c
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#define c_scsipi u.c_scsipi
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/* Link on the command queue. */
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TAILQ_ENTRY(ata_xfer) c_xferchain;
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TAILQ_ENTRY(ata_xfer) c_activechain;
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/* Low-level protocol handlers. */
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int (*c_start)(struct ata_channel *, struct ata_xfer *);
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#define ATASTART_STARTED 0 /* xfer started, waiting for intr */
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#define ATASTART_TH 1 /* xfer needs to be run in thread */
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#define ATASTART_POLL 2 /* xfer needs to be polled */
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#define ATASTART_ABORT 3 /* error occurred, abort xfer */
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void (*c_poll)(struct ata_channel *, struct ata_xfer *);
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void (*c_abort)(struct ata_channel *, struct ata_xfer *);
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int (*c_intr)(struct ata_channel *, struct ata_xfer *, int);
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void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int);
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};
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/* flags in c_flags */
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#define C_ATAPI 0x0001 /* xfer is ATAPI request */
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#define C_TIMEOU 0x0002 /* xfer processing timed out */
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#define C_POLL 0x0004 /* command is polled */
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#define C_DMA 0x0008 /* command uses DMA */
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#define C_WAIT 0x0010 /* can use kpause */
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#define C_WAITACT 0x0020 /* wakeup when active */
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#define C_FREE 0x0040 /* call ata_free_xfer() asap */
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#define C_PIOBM 0x0080 /* command uses busmastering PIO */
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#define C_NCQ 0x0100 /* command is queued */
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#define C_RECOVERY 0x0200 /* executed as part of recovery */
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#define C_WAITTIMO 0x0400 /* race vs. timeout */
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#define C_CHAOS 0x0800 /* forced error xfer */
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#define C_RECOVERED 0x1000 /* error recovered, no need for reset */
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/* reasons for c_kill_xfer() */
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#define KILL_GONE 1 /* device is gone while xfer was active */
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#define KILL_RESET 2 /* xfer was reset */
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#define KILL_GONE_INACTIVE 3 /* device is gone while xfer was pending */
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#define KILL_REQUEUE 4 /* xfer must be reissued to device, no err */
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/*
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* While hw supports up to 32 tags, in practice we must never
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* allow 32 active commands, since that would signal same as
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* channel error. We use slot 32 only for error recovery if available.
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*/
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#define ATA_MAX_OPENINGS 32
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#define ATA_REAL_OPENINGS(op) ((op) > 1 ? (op) - 1 : 1)
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#define ATA_BSIZE 512 /* Standard ATA block size (bytes) */
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/* Per-channel queue of ata_xfers */
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#ifndef ATABUS_PRIVATE
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struct ata_queue;
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#else
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struct ata_queue {
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int8_t queue_flags; /* flags for this queue */
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#define QF_IDLE_WAIT 0x01 /* someone wants the controller idle */
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#define QF_NEED_XFER 0x02 /* someone wants xfer */
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int8_t queue_active; /* number of active transfers */
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uint8_t queue_openings; /* max number of active xfers */
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TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */
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int queue_freeze; /* freeze count for the queue */
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kcondvar_t queue_busy; /* c: waiting of xfer */
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kcondvar_t queue_drain; /* c: waiting of queue drain */
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kcondvar_t queue_idle; /* c: waiting of queue idle */
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TAILQ_HEAD(, ata_xfer) active_xfers; /* active commands */
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uint32_t active_xfers_used; /* mask of active commands */
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uint32_t queue_xfers_avail; /* available xfers mask */
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struct ata_xfer queue_xfers[0]; /* xfers */
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};
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#endif
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/* ATA bus instance state information. */
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struct atabus_softc {
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device_t sc_dev;
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struct ata_channel *sc_chan;
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int sc_flags;
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#define ATABUSCF_OPEN 0x01
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};
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/*
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* A queue of atabus instances, used to ensure the same bus probe order
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* for a given hardware configuration at each boot.
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*/
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struct atabus_initq {
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TAILQ_ENTRY(atabus_initq) atabus_initq;
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struct atabus_softc *atabus_sc;
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};
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/* High-level functions and structures used by both ATA and ATAPI devices */
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struct ataparams;
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/* Datas common to drives and controller drivers */
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struct ata_drive_datas {
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uint8_t drive; /* drive number */
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int8_t ata_vers; /* ATA version supported */
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uint16_t drive_flags; /* bitmask for drives present/absent and cap */
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#define ATA_DRIVE_CAP32 0x0001 /* 32-bit transfer capable */
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#define ATA_DRIVE_DMA 0x0002
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#define ATA_DRIVE_UDMA 0x0004
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#define ATA_DRIVE_MODE 0x0008 /* the drive reported its mode */
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#define ATA_DRIVE_RESET 0x0010 /* reset the drive state at next xfer */
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#define ATA_DRIVE_WAITDRAIN 0x0020 /* device is waiting for the queue to drain */
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#define ATA_DRIVE_NOSTREAM 0x0040 /* no stream methods on this drive */
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#define ATA_DRIVE_ATAPIDSCW 0x0080 /* needs to wait for DSC in phase_complete */
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#define ATA_DRIVE_WFUA 0x0100 /* drive supports WRITE DMA FUA EXT */
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#define ATA_DRIVE_NCQ 0x0200 /* drive supports NCQ feature set */
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#define ATA_DRIVE_NCQ_PRIO 0x0400 /* drive supports NCQ PRIO field */
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uint8_t drive_type;
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#define ATA_DRIVET_NONE 0
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#define ATA_DRIVET_ATA 1
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#define ATA_DRIVET_ATAPI 2
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#define ATA_DRIVET_OLD 3
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#define ATA_DRIVET_PM 4
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/*
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* Current setting of drive's PIO, DMA and UDMA modes.
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* Is initialised by the disks drivers at attach time, and may be
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* changed later by the controller's code if needed
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*/
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uint8_t PIO_mode; /* Current setting of drive's PIO mode */
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#if NATA_DMA
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uint8_t DMA_mode; /* Current setting of drive's DMA mode */
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#if NATA_UDMA
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uint8_t UDMA_mode; /* Current setting of drive's UDMA mode */
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#endif
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#endif
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/* Supported modes for this drive */
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uint8_t PIO_cap; /* supported drive's PIO mode */
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#if NATA_DMA
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uint8_t DMA_cap; /* supported drive's DMA mode */
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#if NATA_UDMA
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uint8_t UDMA_cap; /* supported drive's UDMA mode */
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#endif
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#endif
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/*
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* Drive state.
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* This is reset to 0 after a channel reset.
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*/
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uint8_t state;
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#define RESET 0
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#define READY 1
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uint8_t drv_openings; /* # of command tags */
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#if NATA_DMA
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/* numbers of xfers and DMA errs. Used by ata_dmaerr() */
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uint8_t n_dmaerrs;
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uint32_t n_xfers;
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/* Downgrade after NERRS_MAX errors in at most NXFER xfers */
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#define NERRS_MAX 4
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#define NXFER 4000
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#endif
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/* Callbacks into the drive's driver. */
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void (*drv_done)(device_t, struct ata_xfer *); /* xfer is done */
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void (*drv_start)(device_t); /* start queue */
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device_t drv_softc; /* ATA drives softc, if any */
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struct ata_channel *chnl_softc; /* channel softc */
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/* Context used for I/O */
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struct disklabel *lp; /* pointer to drive's label info */
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uint8_t multi; /* # of blocks to transfer in multi-mode */
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daddr_t badsect[127]; /* 126 plus trailing -1 marker */
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/* Recovery buffer */
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uint8_t recovery_blk[ATA_BSIZE];
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};
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/* User config flags that force (or disable) the use of a mode */
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#define ATA_CONFIG_PIO_MODES 0x0007
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#define ATA_CONFIG_PIO_SET 0x0008
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#define ATA_CONFIG_PIO_OFF 0
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#define ATA_CONFIG_DMA_MODES 0x0070
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#define ATA_CONFIG_DMA_SET 0x0080
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#define ATA_CONFIG_DMA_DISABLE 0x0070
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#define ATA_CONFIG_DMA_OFF 4
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#define ATA_CONFIG_UDMA_MODES 0x0700
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#define ATA_CONFIG_UDMA_SET 0x0800
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#define ATA_CONFIG_UDMA_DISABLE 0x0700
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#define ATA_CONFIG_UDMA_OFF 8
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/*
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* ata_bustype. The first field must be compatible with scsipi_bustype,
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* as it's used for autoconfig by both ata and atapi drivers.
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*/
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struct ata_bustype {
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int bustype_type; /* symbolic name of type */
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int (*ata_bio)(struct ata_drive_datas *, struct ata_xfer *);
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void (*ata_reset_drive)(struct ata_drive_datas *, int, uint32_t *);
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void (*ata_reset_channel)(struct ata_channel *, int);
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/* extra flags for ata_reset_*(), in addition to AT_* */
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#define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */
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int (*ata_exec_command)(struct ata_drive_datas *,
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struct ata_xfer *);
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#define ATACMD_COMPLETE 0x01
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#define ATACMD_QUEUED 0x02
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#define ATACMD_TRY_AGAIN 0x03
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int (*ata_get_params)(struct ata_drive_datas *, uint8_t,
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struct ataparams *);
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int (*ata_addref)(struct ata_drive_datas *);
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void (*ata_delref)(struct ata_drive_datas *);
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void (*ata_killpending)(struct ata_drive_datas *);
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};
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/* bustype_type */ /* XXX XXX XXX */
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/* #define SCSIPI_BUSTYPE_SCSI 0 */
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/* #define SCSIPI_BUSTYPE_ATAPI 1 */
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#define SCSIPI_BUSTYPE_ATA 2
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/*
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* Describe an ATA device. Has to be compatible with scsipi_channel, so
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* start with a pointer to ata_bustype.
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*/
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struct ata_device {
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const struct ata_bustype *adev_bustype;
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int adev_channel;
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struct ata_drive_datas *adev_drv_data;
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};
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/*
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* Per-channel data
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*/
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struct ata_channel {
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int ch_channel; /* location */
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struct atac_softc *ch_atac; /* ATA controller softc */
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kmutex_t ch_lock; /* channel lock - queue */
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/* Our state */
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volatile int ch_flags;
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#define ATACH_SHUTDOWN 0x02 /* channel is shutting down */
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#define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */
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#define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */
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#define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */
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#define ATACH_DISABLED 0x80 /* channel is disabled */
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#define ATACH_TH_RUN 0x100 /* the kernel thread is working */
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#define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */
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#define ATACH_TH_RESCAN 0x400 /* rescan requested */
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#define ATACH_NCQ 0x800 /* channel executing NCQ commands */
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#define ATACH_DMA_BEFORE_CMD 0x1000 /* start DMA first */
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/* for the reset callback */
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int ch_reset_flags;
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/* per-drive info */
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int ch_ndrives; /* number of entries in ch_drive[] */
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struct ata_drive_datas *ch_drive; /* array of ata_drive_datas */
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device_t atabus; /* self */
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/* ATAPI children */
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device_t atapibus;
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struct scsipi_channel ch_atapi_channel;
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/*
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* Channel queues. May be the same for all channels, if hw
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* channels are not independent.
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*/
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struct ata_queue *ch_queue;
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/* The channel kernel thread */
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struct lwp *ch_thread;
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kcondvar_t ch_thr_idle; /* thread waiting for work */
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/* Number of sata PMP ports, if any */
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int ch_satapmp_nports;
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};
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/*
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* ATA controller softc.
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*
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* This contains a bunch of generic info that all ATA controllers need
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* to have.
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*
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* XXX There is still some lingering wdc-centricity here.
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*/
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struct atac_softc {
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device_t atac_dev; /* generic device info */
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int atac_cap; /* controller capabilities */
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#define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */
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#define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */
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#define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */
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#define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */
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#define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */
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#define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */
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#define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */
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#define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */
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#define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */
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#define ATAC_CAP_NCQ 0x8000 /* controller supports NCQ */
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uint8_t atac_pio_cap; /* highest PIO mode supported */
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#if NATA_DMA
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uint8_t atac_dma_cap; /* highest DMA mode supported */
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#if NATA_UDMA
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uint8_t atac_udma_cap; /* highest UDMA mode supported */
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#endif
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#endif
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|
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/* Array of pointers to channel-specific data. */
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struct ata_channel **atac_channels;
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int atac_nchannels;
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const struct ata_bustype *atac_bustype_ata;
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|
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/*
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* Glue between ATA and SCSIPI for the benefit of ATAPI.
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|
*
|
|
* Note: The reference count here is used for both ATA and ATAPI
|
|
* devices.
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|
*/
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struct atapi_adapter atac_atapi_adapter;
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void (*atac_atapibus_attach)(struct atabus_softc *);
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|
|
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/* Driver callback to probe for drives. */
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|
void (*atac_probe)(struct ata_channel *);
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|
|
|
/*
|
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* Optional callbacks to lock/unlock hardware.
|
|
* Called with channel mutex held.
|
|
*/
|
|
int (*atac_claim_hw)(struct ata_channel *, int);
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|
void (*atac_free_hw)(struct ata_channel *);
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|
|
|
/*
|
|
* Optional callbacks to set drive mode. Required for anything
|
|
* but basic PIO operation.
|
|
*/
|
|
void (*atac_set_modes)(struct ata_channel *);
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|
};
|
|
|
|
#ifdef _KERNEL
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|
void ata_channel_attach(struct ata_channel *);
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|
void ata_channel_init(struct ata_channel *);
|
|
void ata_channel_detach(struct ata_channel *);
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|
void ata_channel_destroy(struct ata_channel *);
|
|
int atabusprint(void *aux, const char *);
|
|
int ataprint(void *aux, const char *);
|
|
|
|
int atabus_alloc_drives(struct ata_channel *, int);
|
|
void atabus_free_drives(struct ata_channel *);
|
|
|
|
struct ataparams;
|
|
int ata_get_params(struct ata_drive_datas *, uint8_t, struct ataparams *);
|
|
int ata_set_mode(struct ata_drive_datas *, uint8_t, uint8_t);
|
|
int ata_read_log_ext_ncq(struct ata_drive_datas *, uint8_t, uint8_t *,
|
|
uint8_t *, uint8_t *);
|
|
|
|
/* return code for these cmds */
|
|
#define CMD_OK 0
|
|
#define CMD_ERR 1
|
|
#define CMD_AGAIN 2
|
|
|
|
struct ata_xfer *ata_get_xfer_ext(struct ata_channel *, int, uint8_t);
|
|
#define ata_get_xfer(chp) ata_get_xfer_ext((chp), C_WAIT, 0)
|
|
void ata_free_xfer(struct ata_channel *, struct ata_xfer *);
|
|
void ata_deactivate_xfer(struct ata_channel *, struct ata_xfer *);
|
|
void ata_exec_xfer(struct ata_channel *, struct ata_xfer *);
|
|
int ata_xfer_start(struct ata_xfer *xfer);
|
|
void ata_wait_xfer(struct ata_channel *, struct ata_xfer *xfer);
|
|
void ata_wake_xfer(struct ata_channel *, struct ata_xfer *xfer);
|
|
|
|
void ata_timeout(void *);
|
|
bool ata_timo_xfer_check(struct ata_xfer *);
|
|
void ata_kill_pending(struct ata_drive_datas *);
|
|
void ata_kill_active(struct ata_channel *, int, int);
|
|
void ata_reset_channel(struct ata_channel *, int);
|
|
void ata_channel_freeze(struct ata_channel *);
|
|
void ata_channel_thaw(struct ata_channel *);
|
|
void ata_channel_start(struct ata_channel *, int);
|
|
void ata_channel_lock(struct ata_channel *);
|
|
void ata_channel_unlock(struct ata_channel *);
|
|
void ata_channel_lock_owned(struct ata_channel *);
|
|
|
|
int ata_addref(struct ata_channel *);
|
|
void ata_delref(struct ata_channel *);
|
|
void atastart(struct ata_channel *);
|
|
void ata_print_modes(struct ata_channel *);
|
|
#if NATA_DMA
|
|
int ata_downgrade_mode(struct ata_drive_datas *, int);
|
|
#endif
|
|
void ata_probe_caps(struct ata_drive_datas *);
|
|
|
|
#if NATA_DMA
|
|
void ata_dmaerr(struct ata_drive_datas *, int);
|
|
#endif
|
|
struct ata_queue *
|
|
ata_queue_alloc(uint8_t openings);
|
|
void ata_queue_free(struct ata_queue *);
|
|
void ata_queue_reset(struct ata_queue *);
|
|
struct ata_xfer *
|
|
ata_queue_hwslot_to_xfer(struct ata_channel *, int);
|
|
struct ata_xfer *
|
|
ata_queue_get_active_xfer(struct ata_channel *);
|
|
struct ata_xfer *
|
|
ata_queue_get_active_xfer_locked(struct ata_channel *);
|
|
struct ata_xfer *
|
|
ata_queue_drive_active_xfer(struct ata_channel *, int);
|
|
|
|
void ata_delay(struct ata_channel *, int, const char *, int);
|
|
|
|
bool ata_waitdrain_xfer_check(struct ata_channel *, struct ata_xfer *);
|
|
|
|
void atacmd_toncq(struct ata_xfer *, uint8_t *, uint16_t *, uint16_t *,
|
|
uint8_t *);
|
|
|
|
#endif /* _KERNEL */
|
|
|
|
#endif /* _DEV_ATA_ATAVAR_H_ */
|