ba52409a2e
behind custom PCI<->GIO bridges: - Set Engineering GIO Fast Ethernet (TI ThunderLAN) - Phobos G100 (DEC 21140?) - Phobos G130 (DEC 21143) - Phobos G160 (DEC 21143) All boards present the chipsets' pci configuration registers at some defined offset in their slots' address space as well as device registers. We simply allow the MI pci subsystem to attach the devices. This has been tested with a G130 board (DEC 21143) and works well on IP20 and IP24. The Set Engineering board attaches, works fine when receiving and lightly transmitting, but chokes for unknown reasons on heavy transmits. The tl(4) driver may need some fixing. |
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.. | ||
devlist2h.awk | ||
files.gio | ||
gio.c | ||
giodevs | ||
giodevs_data.h | ||
giodevs.h | ||
gioreg.h | ||
giovar.h | ||
grtwo.c | ||
grtworeg.h | ||
grtwovar.h | ||
Makefile.giodevs | ||
newport.c | ||
newportreg.h | ||
newportvar.h | ||
pci_gio.c |