456 lines
13 KiB
C
456 lines
13 KiB
C
/* $NetBSD: if_ex_pci.c,v 1.35 2003/06/05 22:11:22 dogcow Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Frank van der Linden; Jason R. Thorpe of the Numerical Aerospace
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* Simulation Facility, NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_ex_pci.c,v 1.35 2003/06/05 22:11:22 dogcow Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/syslog.h>
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#include <sys/select.h>
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#include <sys/device.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/mii.h>
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#include <dev/ic/elink3var.h>
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#include <dev/ic/elink3reg.h>
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#include <dev/ic/elinkxlreg.h>
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#include <dev/ic/elinkxlvar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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struct ex_pci_softc {
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struct ex_softc sc_ex;
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/* PCI function status space. 556,556B requests it. */
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bus_space_tag_t sc_funct;
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bus_space_handle_t sc_funch;
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pci_chipset_tag_t psc_pc; /* pci chipset tag */
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pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */
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pcitag_t psc_tag; /* pci device tag */
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int psc_pwrmgmt_csr_reg; /* ACPI power management register */
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pcireg_t psc_pwrmgmt_csr; /* ...and the contents at D0 */
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};
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/*
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* PCI constants.
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* XXX These should be in a common file!
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*/
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#define PCI_CONN 0x48 /* Connector type */
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#define PCI_CBIO 0x10 /* Configuration Base IO Address */
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#define PCI_POWERCTL 0xe0
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#define PCI_FUNCMEM 0x18
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#define PCI_INTR 4
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#define PCI_INTRACK 0x00008000
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int ex_pci_match __P((struct device *, struct cfdata *, void *));
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void ex_pci_attach __P((struct device *, struct device *, void *));
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void ex_pci_intr_ack __P((struct ex_softc *));
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int ex_pci_enable __P((struct ex_softc *));
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void ex_pci_disable __P((struct ex_softc *));
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void ex_pci_confreg_restore __P((struct ex_pci_softc *));
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void ex_d3tod0 __P(( struct ex_softc *, struct pci_attach_args *));
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CFATTACH_DECL(ex_pci, sizeof(struct ex_pci_softc),
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ex_pci_match, ex_pci_attach, NULL, NULL);
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const struct ex_pci_product {
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u_int32_t epp_prodid; /* PCI product ID */
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int epp_flags; /* initial softc flags */
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const char *epp_name; /* device name */
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} ex_pci_products[] = {
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{ PCI_PRODUCT_3COM_3C900TPO, 0,
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"3c900-TPO Ethernet" },
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{ PCI_PRODUCT_3COM_3C900COMBO, 0,
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"3c900-COMBO Ethernet" },
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{ PCI_PRODUCT_3COM_3C905TX, EX_CONF_MII,
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"3c905-TX 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C905T4, EX_CONF_MII,
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"3c905-T4 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C900BTPO, EX_CONF_90XB,
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"3c900B-TPO Ethernet" },
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{ PCI_PRODUCT_3COM_3C900BCOMBO, EX_CONF_90XB,
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"3c900B-COMBO Ethernet" },
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{ PCI_PRODUCT_3COM_3C900BTPC, EX_CONF_90XB,
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"3c900B-TPC Ethernet" },
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{ PCI_PRODUCT_3COM_3C905BTX, EX_CONF_90XB|EX_CONF_MII|EX_CONF_INTPHY,
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"3c905B-TX 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C905BT4, EX_CONF_90XB|EX_CONF_MII,
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"3c905B-T4 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C905BCOMBO, EX_CONF_90XB/*|EX_CONF_MII|EX_CONF_INTPHY*/,
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"3c905B-COMBO 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C905BFX, EX_CONF_90XB,
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"3c905B-FX 10/100 Ethernet" },
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/* XXX Internal PHY? */
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{ PCI_PRODUCT_3COM_3C980SRV, EX_CONF_90XB,
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"3c980 Server Adapter 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C980CTXM, EX_CONF_90XB|EX_CONF_MII,
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"3c980C-TXM 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C905CTX, EX_CONF_90XB|EX_CONF_MII,
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"3c905C-TX 10/100 Ethernet with mngmt" },
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{ PCI_PRODUCT_3COM_3C450TX, EX_CONF_90XB,
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"3c450-TX 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3CSOHO100TX, EX_CONF_90XB,
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"3cSOHO100-TX 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C555,
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EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
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EX_CONF_EEPROM_8BIT,
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"3c555 MiniPCI 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C556,
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EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
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EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
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EX_CONF_PHY_POWER | EX_CONF_EEPROM_8BIT,
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"3c556 MiniPCI 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C556B,
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EX_CONF_90XB | EX_CONF_MII | EX_CONF_EEPROM_OFF |
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EX_CONF_PCI_FUNCREG | EX_CONF_RESETHACK | EX_CONF_INV_LED_POLARITY |
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EX_CONF_PHY_POWER | EX_CONF_NO_XCVR_PWR,
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"3c556B MiniPCI 10/100 Ethernet" },
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{ PCI_PRODUCT_3COM_3C905CXTX, EX_CONF_90XB|EX_CONF_MII,
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"3c905CX-TX 10/100 Ethernet with mngmt" },
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{ 0, 0,
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NULL },
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};
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const struct ex_pci_product *ex_pci_lookup
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__P((const struct pci_attach_args *));
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const struct ex_pci_product *
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ex_pci_lookup(pa)
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const struct pci_attach_args *pa;
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{
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const struct ex_pci_product *epp;
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3COM)
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return (NULL);
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for (epp = ex_pci_products; epp->epp_name != NULL; epp++)
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if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid)
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return (epp);
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return (NULL);
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}
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int
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ex_pci_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = (struct pci_attach_args *) aux;
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if (ex_pci_lookup(pa) != NULL)
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return (2); /* beat ep_pci */
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return (0);
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}
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void
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ex_pci_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct ex_softc *sc = (void *)self;
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struct ex_pci_softc *psc = (void *)self;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pci_intr_handle_t ih;
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const struct ex_pci_product *epp;
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const char *intrstr = NULL;
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int rev, pmreg;
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pcireg_t reg;
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aprint_naive(": Ethernet controller\n");
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if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
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&sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
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aprint_error(": can't map i/o space\n");
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return;
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}
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epp = ex_pci_lookup(pa);
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if (epp == NULL) {
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printf("\n");
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panic("ex_pci_attach: impossible");
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}
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rev = PCI_REVISION(pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG));
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aprint_normal(": 3Com %s (rev. 0x%x)\n", epp->epp_name, rev);
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sc->sc_dmat = pa->pa_dmat;
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sc->ex_bustype = EX_BUS_PCI;
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sc->ex_conf = epp->epp_flags;
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/* Enable the card. */
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pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
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PCI_COMMAND_MASTER_ENABLE);
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psc->psc_pc = pc;
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psc->psc_tag = pa->pa_tag;
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psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] =
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pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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psc->psc_regs[PCI_BHLC_REG>>2] =
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pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
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psc->psc_regs[PCI_CBIO>>2] =
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pci_conf_read(pc, pa->pa_tag, PCI_CBIO);
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if (sc->ex_conf & EX_CONF_PCI_FUNCREG) {
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/* Map PCI function status window. */
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if (pci_mapreg_map(pa, PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0,
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&psc->sc_funct, &psc->sc_funch, NULL, NULL)) {
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aprint_error(
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"%s: unable to map function status window\n",
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sc->sc_dev.dv_xname);
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return;
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}
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sc->intr_ack = ex_pci_intr_ack;
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psc->psc_regs[PCI_FUNCMEM>>2] =
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pci_conf_read(pc, pa->pa_tag, PCI_FUNCMEM);
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}
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psc->psc_regs[PCI_INTERRUPT_REG>>2] =
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pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
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/* Get it out of power save mode if needed (BIOS bugs) */
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if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
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sc->enable = ex_pci_enable;
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sc->disable = ex_pci_disable;
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psc->psc_pwrmgmt_csr_reg = pmreg + PCI_PMCSR;
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reg = pci_conf_read(pc, pa->pa_tag, psc->psc_pwrmgmt_csr_reg);
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psc->psc_pwrmgmt_csr = (reg & ~PCI_PMCSR_STATE_MASK) |
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PCI_PMCSR_STATE_D0;
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switch (reg & PCI_PMCSR_STATE_MASK) {
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case PCI_PMCSR_STATE_D3:
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aprint_normal("%s: found in power state D3, "
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"attempting to recover.\n", sc->sc_dev.dv_xname);
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ex_d3tod0(sc, pa);
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aprint_normal("%s: changed power state to D0.\n",
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sc->sc_dev.dv_xname);
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break;
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case PCI_PMCSR_STATE_D1:
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case PCI_PMCSR_STATE_D2:
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aprint_normal("%s: waking up from power state D%d\n",
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sc->sc_dev.dv_xname, reg);
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pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
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(reg & ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D0);
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break;
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}
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}
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sc->enabled = 1;
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/* Map and establish the interrupt. */
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if (pci_intr_map(pa, &ih)) {
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aprint_error("%s: couldn't map interrupt\n",
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sc->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pc, ih);
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sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ex_intr, sc);
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if (sc->sc_ih == NULL) {
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aprint_error("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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aprint_normal(" at %s", intrstr);
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aprint_normal("\n");
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return;
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}
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aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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ex_config(sc);
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if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
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bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
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PCI_INTRACK);
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if (sc->disable != NULL)
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ex_disable(sc);
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}
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void
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ex_pci_intr_ack(sc)
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struct ex_softc *sc;
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{
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struct ex_pci_softc *psc = (struct ex_pci_softc *)sc;
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bus_space_write_4(psc->sc_funct, psc->sc_funch, PCI_INTR,
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PCI_INTRACK);
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}
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void
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ex_d3tod0(sc, pa)
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struct ex_softc *sc;
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struct pci_attach_args *pa;
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{
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#define PCI_CACHE_LAT_BIST 0x0c
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#define PCI_BAR0 0x10
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#define PCI_BAR1 0x14
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#define PCI_BAR2 0x18
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#define PCI_BAR3 0x1C
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#define PCI_BAR4 0x20
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#define PCI_BAR5 0x24
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#define PCI_EXP_ROM_BAR 0x30
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#define PCI_INT_GNT_LAT 0x3c
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pci_chipset_tag_t pc = pa->pa_pc;
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u_int32_t base0;
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u_int32_t base1;
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u_int32_t romaddr;
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u_int32_t pci_command;
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u_int32_t pci_int_lat;
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u_int32_t pci_cache_lat;
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pci_command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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base0 = pci_conf_read(pc, pa->pa_tag, PCI_BAR0);
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base1 = pci_conf_read(pc, pa->pa_tag, PCI_BAR1);
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romaddr = pci_conf_read(pc, pa->pa_tag, PCI_EXP_ROM_BAR);
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pci_cache_lat= pci_conf_read(pc, pa->pa_tag, PCI_CACHE_LAT_BIST);
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pci_int_lat = pci_conf_read(pc, pa->pa_tag, PCI_INT_GNT_LAT);
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pci_conf_write(pc, pa->pa_tag, PCI_POWERCTL, 0);
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pci_conf_write(pc, pa->pa_tag, PCI_BAR0, base0);
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pci_conf_write(pc, pa->pa_tag, PCI_BAR1, base1);
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pci_conf_write(pc, pa->pa_tag, PCI_EXP_ROM_BAR, romaddr);
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pci_conf_write(pc, pa->pa_tag, PCI_INT_GNT_LAT, pci_int_lat);
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pci_conf_write(pc, pa->pa_tag, PCI_CACHE_LAT_BIST, pci_cache_lat);
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pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
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(PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE));
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}
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void
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ex_pci_confreg_restore(psc)
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struct ex_pci_softc *psc;
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{
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struct ex_softc *sc = (void *) psc;
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pcireg_t reg;
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reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(psc->psc_pc, psc->psc_tag,
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PCI_COMMAND_STATUS_REG,
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(reg & 0xffff0000) |
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(psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff));
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pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG,
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psc->psc_regs[PCI_BHLC_REG>>2]);
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pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_CBIO,
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psc->psc_regs[PCI_CBIO>>2]);
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if (sc->ex_conf & EX_CONF_PCI_FUNCREG)
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pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_FUNCMEM,
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psc->psc_regs[PCI_FUNCMEM>>2]);
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pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_INTERRUPT_REG,
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psc->psc_regs[PCI_INTERRUPT_REG>>2]);
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}
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int
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ex_pci_enable(sc)
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struct ex_softc *sc;
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{
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struct ex_pci_softc *psc = (void *) sc;
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#if 0
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printf("%s: going to power state D0\n", sc->sc_dev.dv_xname);
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#endif
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/* Bring the device into D0 power state. */
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|
pci_conf_write(psc->psc_pc, psc->psc_tag,
|
|
psc->psc_pwrmgmt_csr_reg, psc->psc_pwrmgmt_csr);
|
|
|
|
/* Now restore the configuration registers. */
|
|
ex_pci_confreg_restore(psc);
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
ex_pci_disable(sc)
|
|
struct ex_softc *sc;
|
|
{
|
|
struct ex_pci_softc *psc = (void *) sc;
|
|
|
|
#if 0
|
|
printf("%s: going to power state D3\n", sc->sc_dev.dv_xname);
|
|
#endif
|
|
|
|
/* Put the device into D3 state. */
|
|
pci_conf_write(psc->psc_pc, psc->psc_tag,
|
|
psc->psc_pwrmgmt_csr_reg, (psc->psc_pwrmgmt_csr &
|
|
~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_STATE_D3);
|
|
}
|