424 lines
9.7 KiB
C
424 lines
9.7 KiB
C
/* $NetBSD: dma.c,v 1.13 2000/03/03 12:50:20 soda Exp $ */
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/* $OpenBSD: dma.c,v 1.5 1998/03/01 16:49:57 niklas Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)rz.c 8.1 (Berkeley) 7/29/93
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*/
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/*
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* PICA system dma driver. Handles resource allocation and
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* logical (viritual) address remaping.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_page.h>
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#include <mips/locore.h>
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#include <machine/cpu.h>
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#include <machine/cpuregs.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <machine/pio.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <arc/pica/pica.h>
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#include <arc/pica/rd94.h>
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#include <arc/arc/arctype.h>
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#include <arc/dev/dma.h>
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void picaDmaReset __P((dma_softc_t *sc));
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void picaDmaEnd __P((dma_softc_t *sc));
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void picaDmaNull __P((dma_softc_t *sc));
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extern vm_map_t phys_map;
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#define dma_pte_to_pa(x) (((x) - first_dma_pte) * R4030_DMA_PAGE_SIZE)
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dma_pte_t *free_dma_pte; /* Pointer to free dma pte list */
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dma_pte_t *first_dma_pte; /* Pointer to first dma pte */
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static vaddr_t ivalid_reg;
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/*
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* Initialize the dma mapping register area and pool.
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*/
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void
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picaDmaInit()
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{
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int map = PICA_TL_BASE;
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mips3_FlushCache(); /* Make sure no map entries are cached */
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bzero((char *)map, PICA_TL_SIZE);
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free_dma_pte = (dma_pte_t *)map;
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first_dma_pte = (dma_pte_t *)map;
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free_dma_pte->queue.next = NULL;
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free_dma_pte->queue.size = PICA_TL_SIZE / sizeof(dma_pte_t);
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switch (cputype) {
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case ACER_PICA_61:
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case MAGNUM:
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out32(R4030_SYS_TL_BASE, MIPS_KSEG1_TO_PHYS(map));
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out32(R4030_SYS_TL_LIMIT, PICA_TL_SIZE);
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out32(R4030_SYS_TL_IVALID, 0);
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ivalid_reg = R4030_SYS_TL_IVALID;
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break;
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case NEC_RD94:
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out32(RD94_SYS_TL_BASE, MIPS_KSEG1_TO_PHYS(map));
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out32(RD94_SYS_TL_LIMIT, PICA_TL_SIZE);
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out32(RD94_SYS_TL_IVALID, 0);
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ivalid_reg = RD94_SYS_TL_IVALID;
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break;
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}
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}
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/*
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* Allocate an array of 'size' dma pte entrys.
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* Return address to first pte.
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*/
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void
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picaDmaTLBAlloc(dma_softc_t *dma)
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{
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dma_pte_t *list;
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dma_pte_t *found;
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int size;
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int s;
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found = NULL;
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size = dma->pte_size;
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do {
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list = (dma_pte_t *)&free_dma_pte;
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s = splhigh();
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while(list) {
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if(list->queue.next->queue.size >= size) {
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found = list->queue.next;
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break;
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}
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}
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/*XXX Wait for release wakeup */
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} while(found == NULL);
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if(found->queue.size == size) {
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list->queue.next = found->queue.next;
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}
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else {
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list->queue.next = found + size;
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list = found + size;
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list->queue.next = found->queue.next;
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list->queue.size = found->queue.size - size;
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}
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splx(s);
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dma->pte_base = found;
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dma->dma_va = dma_pte_to_pa(found);
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}
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/*
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* Free an array of dma pte entrys.
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*/
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void
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picaDmaTLBFree(dma_softc_t *dma)
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{
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dma_pte_t *list;
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dma_pte_t *entry;
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int size;
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int s;
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s = splhigh();
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entry = dma->pte_base;
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size = dma->pte_size;
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entry->queue.next = NULL;
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entry->queue.size = size;
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if(free_dma_pte == NULL || entry < free_dma_pte) {
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list = entry;
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list->queue.next = free_dma_pte;
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free_dma_pte = entry;
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}
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else {
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list = free_dma_pte;
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while(list < entry && list->queue.next != NULL) {
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if(list + list->queue.size == entry) {
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list->queue.size += size;
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break;
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}
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else if(list->queue.next == NULL) {
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list->queue.next = entry;
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break;
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}
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else
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list = list->queue.next;
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}
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}
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if(list->queue.next != NULL) {
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if(list + list->queue.size == list->queue.next) {
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list->queue.size += list->queue.next->queue.size;
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list->queue.next = list->queue.next->queue.next;
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}
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}
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splx(s);
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/*XXX Wakeup waiting */
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}
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/*
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* Map up a viritual address space in dma space given by
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* the dma control structure and invalidate dma TLB cache.
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*/
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void
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picaDmaTLBMap(dma_softc_t *sc)
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{
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paddr_t pa;
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vaddr_t va;
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dma_pte_t *dma_pte;
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int nbytes;
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va = sc->next_va - sc->dma_va;
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dma_pte = sc->pte_base + (va / R4030_DMA_PAGE_SIZE);
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nbytes = dma_page_round(sc->next_size + dma_page_offs(va));
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va = sc->req_va;
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while(nbytes > 0) {
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if(va < VM_MIN_KERNEL_ADDRESS) {
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pa = MIPS_KSEG0_TO_PHYS(va);
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}
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else {
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if (!pmap_extract(vm_map_pmap(phys_map), va, &pa))
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panic("picaDmaTLBMap: pmap_extract %p", va);
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}
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pa &= R4030_DMA_PAGE_NUM;
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if(pa == 0)
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panic("picaDmaTLBMap: null page frame");
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dma_pte->entry.lo_addr = pa;
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dma_pte->entry.hi_addr = 0;
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dma_pte++;
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va += R4030_DMA_PAGE_SIZE;
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nbytes -= R4030_DMA_PAGE_SIZE;
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}
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}
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/*
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* Start local dma channel.
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*/
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void
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picaDmaStart(sc, addr, size, datain)
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struct dma_softc *sc;
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char *addr;
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size_t size;
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int datain;
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{
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pDmaReg regs = sc->dma_reg;
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/* Halt DMA */
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regs->dma_enab = 0;
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regs->dma_mode = 0;
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/* Remap request space va into dma space va */
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sc->req_va = (int)addr;
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sc->next_va = sc->dma_va + dma_page_offs(addr);
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sc->next_size = size;
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/* Map up the request viritual dma space */
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picaDmaTLBMap(sc);
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out32(ivalid_reg, 0); /* Flush dma map cache */
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/* Load new transfer parameters */
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regs->dma_addr = sc->next_va;
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regs->dma_count = sc->next_size;
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regs->dma_mode = sc->mode & R4030_DMA_MODE;
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sc->sc_active = 1;
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if(datain == DMA_FROM_DEV) {
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sc->mode &= ~DMA_DIR_WRITE;
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regs->dma_enab = R4030_DMA_ENAB_RUN | R4030_DMA_ENAB_READ;
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}
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else {
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sc->mode |= DMA_DIR_WRITE;
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regs->dma_enab = R4030_DMA_ENAB_RUN | R4030_DMA_ENAB_WRITE;
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}
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wbflush();
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}
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/*
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* Set up DMA mapper for external dma.
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* Used by ISA dma and SONIC
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*/
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void
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picaDmaMap(sc, addr, size, offset)
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struct dma_softc *sc;
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char *addr;
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size_t size;
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int offset;
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{
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/* Remap request space va into dma space va */
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sc->req_va = (vaddr_t)addr;
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sc->next_va = sc->dma_va + dma_page_offs(addr) + offset;
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sc->next_size = size;
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/* Map up the request viritual dma space */
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picaDmaTLBMap(sc);
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}
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/*
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* Prepare for new dma by flushing
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*/
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void
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picaDmaFlush(sc, addr, size, datain)
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struct dma_softc *sc;
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char *addr;
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size_t size;
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int datain;
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{
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out32(ivalid_reg, 0); /* Flush dma map cache */
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}
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/*
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* Stop/Reset a DMA channel
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*/
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void
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picaDmaReset(dma_softc_t *sc)
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{
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pDmaReg regs = sc->dma_reg;
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/* Halt DMA */
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regs->dma_enab = 0;
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regs->dma_mode = 0;
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sc->sc_active = 0;
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}
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/*
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* End dma operation, return byte count left.
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*/
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void
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picaDmaEnd(dma_softc_t *sc)
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{
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pDmaReg regs = sc->dma_reg;
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int res;
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res = regs->dma_count = sc->next_size;
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/* Halt DMA */
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regs->dma_enab = 0;
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regs->dma_mode = 0;
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sc->sc_active = 0;
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}
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/*
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* Null call rathole!
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*/
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void
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picaDmaNull(dma_softc_t *sc)
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{
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printf("picaDmaNull called\n");
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}
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/*
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* dma_init..
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* Called from asc to set up dma
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*/
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void
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asc_dma_init(sc)
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dma_softc_t *sc;
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{
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sc->reset = picaDmaReset;
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sc->enintr = picaDmaNull;
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sc->start = picaDmaStart;
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sc->map = picaDmaMap;
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sc->isintr = (int(*)(struct dma_softc *))picaDmaNull;
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sc->intr = (int(*)(struct dma_softc *))picaDmaNull;
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sc->end = picaDmaEnd;
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sc->dma_reg = (pDmaReg)R4030_SYS_DMA0_REGS;
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sc->pte_size = 32;
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sc->mode = R4030_DMA_MODE_160NS | R4030_DMA_MODE_16;
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picaDmaTLBAlloc(sc);
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}
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/*
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* dma_init..
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* Called from fdc to set up dma
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*/
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void
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fdc_dma_init(dma_softc_t *sc)
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{
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sc->reset = picaDmaReset;
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sc->enintr = picaDmaNull;
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sc->start = picaDmaStart;
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sc->map = picaDmaMap;
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sc->isintr = (int(*)(struct dma_softc *))picaDmaNull;
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sc->intr = (int(*)(struct dma_softc *))picaDmaNull;
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sc->end = picaDmaEnd;
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switch (cputype) {
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case NEC_RD94:
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sc->dma_reg = (pDmaReg)RD94_SYS_DMA0_REGS;
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break;
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default:
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sc->dma_reg = (pDmaReg)R4030_SYS_DMA1_REGS;
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break;
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}
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sc->pte_size = 32;
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sc->mode = R4030_DMA_MODE_160NS | R4030_DMA_MODE_8;
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picaDmaTLBAlloc(sc);
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}
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/*
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* dma_init..
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* Called from sonic to set up dma
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*/
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void
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sn_dma_init(dma_softc_t *sc, int pages)
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{
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sc->reset = picaDmaNull;
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sc->enintr = picaDmaNull;
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sc->start = picaDmaFlush;
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sc->map = picaDmaMap;
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sc->isintr = (int(*)(struct dma_softc *))picaDmaNull;
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sc->intr = (int(*)(struct dma_softc *))picaDmaNull;
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sc->end = picaDmaNull;
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sc->dma_reg = (pDmaReg)NULL;
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sc->pte_size = pages;
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sc->mode = 0;
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picaDmaTLBAlloc(sc);
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}
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