matt ee6cde04ff Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead ... but add a second argument to it to indicate whether the TLB/caches need to be flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field to see if the fixed can be skipped. Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1) or enabeld (bit = 0). With these changes, the A9 MMU can use traverse caches to do MMU tablewalks Also, make sure all memory has the shareable bit for the A9.		2012-09-22 00:33:36 +00:00
..
compile
conf	Switch to the generic bounce buffer support.	2012-09-21 14:21:57 +00:00
include	expose more for kmemuser/fix include protection	2012-02-18 16:29:36 +00:00
isa	Switch to the generic bounce buffer support.	2012-09-21 14:21:57 +00:00
ofw	Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead	2012-09-22 00:33:36 +00:00
shark	Rework includes and include <uvm/uvm_extern.h> for pmap.h	2012-09-01 12:15:39 +00:00
stand	Drop bootprog_maker (formerly enabled by -M) and bootprog_date (formerly	2011-01-22 19:19:14 +00:00
Makefile	Use ${TOOL_SED} instead if plain sed in Makefiles.	2008-10-25 22:27:34 +00:00