ff2281b498
This code was contributed by Allegro Networks.
214 lines
6.6 KiB
C
214 lines
6.6 KiB
C
/* $NetBSD: gtidmavar.h,v 1.1 2003/03/05 22:08:21 matt Exp $ */
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/*
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* Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Allegro Networks, Inc., and Wasabi Systems, Inc.
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* 4. The name of Allegro Networks, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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* 5. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
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* WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* idmavar.h -- defines for GT-64260 IDMA driver
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*
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* creation Wed Aug 15 00:48:10 PDT 2001 cliff
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*/
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#ifndef _IDMAVAR_H
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#define _IDMAVAR_H
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/*
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* IDMA Overview:
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*
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* A driver allocates an IDMA channel, registering for callbacks.
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* The channel includes descriptors and a pending queue
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*
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* The driver allocates & details descriptors, then requests start
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*
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* ... time passes ...
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*
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* On completion the callback is made, passing the opaque "arg"
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* (e.g. a softc), a descriptor handle, and completion status
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* The driver callback completes the transaction and frees
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* or recycles the descriptor.
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*
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* If the channel is no longer needed the driver may free it,
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* but we expect drivers to hold channels long term
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* (i.e till shutdown).
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*
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* Descriptors:
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*
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* Hardware descriptors are coupled 1:1 with descriptor handles.
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* The descriptors themselves are as defined by GT-64260 spec;
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* descriptor handles control descriptor use. They are separate
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* to allow efficient packing of descriptors in DMA mapped memory.
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*/
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/*
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* NOTE:
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* interrupt priority IPL_IDMA is determined by worst case client driver
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* since each IDMA IRQ is shared across 4 channels
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* so adjust as needed
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*/
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#define IPL_IDMA IPL_NET
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#define splidma() splraise(IPL_IDMA)
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#define IDMA_DMSEG_MAX 1
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typedef struct idma_dmamem {
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bus_dmamap_t idm_map; /* dmamem'ed memory */
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caddr_t idm_kva; /* kva of dmamem memory */
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int idm_nsegs; /* # of segment in idm_segs */
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int idm_maxsegs; /* maximum # of segments allowed */
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size_t idm_size; /* size of memory region */
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bus_dma_segment_t idm_segs[IDMA_DMSEG_MAX];
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} idma_dmamem_t;
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/*
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* descriptor handle
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*/
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typedef enum {
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IDH_FREE,
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IDH_ALLOC,
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IDH_QWAIT,
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IDH_PENDING,
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IDH_RETRY,
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IDH_DONE,
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IDH_CANCEL,
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IDH_ABORT
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} idma_desch_state_t;
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typedef enum {
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IDS_OK,
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IDS_FAIL
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} idma_sts_t;
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struct idma_chan;
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typedef struct idma_desch {
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idma_desch_state_t idh_state;
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struct idma_desch *idh_next;
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struct idma_chan *idh_chan;
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u_int32_t idh_hold;
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SIMPLEQ_ENTRY(idma_desch) idh_q;
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struct idma_desc *idh_desc_va;
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struct idma_desc *idh_desc_pa;
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void *idh_aux;
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u_int64_t tb;
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} idma_desch_t;
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/*
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* descriptor handle queue head
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*/
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typedef unsigned int idma_chan_state_t;
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#define IDC_FREE 0
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#define IDC_ALLOC 1
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#define IDC_IDLE 2
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#define IDC_STOPPED 4
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#define IDC_QFULL 8
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typedef struct idma_q {
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unsigned int idq_depth;
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SIMPLEQ_HEAD(, idma_desch) idq_q;
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} idma_q_t;
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/*
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* IDMA channel control
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*/
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struct idma_softc;
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typedef struct idma_chan {
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idma_chan_state_t idc_state;
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struct idma_softc *idc_sc;
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unsigned int idc_chan; /* channel number */
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int (*idc_callback) __P((void *, struct idma_desch *, u_int32_t));
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/* completion callback */
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void *idc_arg; /* completion callback arg */
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idma_q_t idc_q; /* pending transactions */
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unsigned int idc_ndesch; /* # descriptor handles */
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idma_desch_t *idc_active; /* active transaction */
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idma_desch_t *idc_desch_free; /* allocation ptr */
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idma_desch_t *idc_desch_done; /* completion ptr */
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idma_desch_t *idc_desch; /* descriptor handles */
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idma_dmamem_t idc_desc_mem; /* descriptor dmamem */
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unsigned long idc_done_count; /* running done count */
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unsigned long idc_abort_count; /* running abort count */
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} idma_chan_t;
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/*
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* IDMA driver softc
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*/
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typedef unsigned int idma_state_t;
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#define IDMA_ATTACHED 1
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typedef struct idma_softc {
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struct device idma_dev;
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struct gt_softc *idma_gt;
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bus_space_tag_t idma_bustag;
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bus_dma_tag_t idma_dmatag;
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bus_space_handle_t idma_bushandle;
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bus_addr_t idma_reg_base;
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bus_size_t idma_reg_size;
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u_int32_t idma_ien;
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struct callout idma_callout;
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unsigned int idma_callout_state;
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unsigned int idma_burst_size;
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idma_state_t idma_state;
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idma_chan_t idma_chan[NIDMA_CHANS];
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void *idma_ih[4];
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} idma_softc_t;
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/*
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* IDMA external function prototypes
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*/
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extern void idma_chan_free __P((idma_chan_t *));
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extern idma_chan_t *idma_chan_alloc
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__P((unsigned int, int (*) __P((void *, struct idma_desch *, u_int32_t)), void *));
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extern void idma_desch_free __P((idma_desch_t *));
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extern idma_desch_t *idma_desch_alloc __P((idma_chan_t *));
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extern void idma_desch_list_free __P((idma_desch_t *));
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extern void idma_desc_list_free __P((idma_desch_t *));
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extern idma_desch_t *idma_desch_list_alloc __P((idma_chan_t *, unsigned int));
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extern void idma_intr_enb __P((idma_chan_t *));
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extern void idma_intr_dis __P((idma_chan_t *));
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extern int idma_start __P((idma_desch_t *));
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extern void idma_qflush __P((idma_chan_t *));
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extern void idma_abort __P((idma_desch_t *, unsigned int, const char *));
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/*
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* flags for idma_abort()
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*/
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#define IDMA_ABORT_CANCEL 1 /* don't atempt completion or retry */
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#endif /* _IDMAVAR_H */
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