268 lines
7.6 KiB
C
268 lines
7.6 KiB
C
/* $NetBSD: i82365_isasubr.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $ */
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#define PCICISADEBUG
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/*
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* Copyright (c) 1998 Bill Sommerfeld. All rights reserved.
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* Copyright (c) 1997 Marc Horowitz. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Marc Horowitz.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/pcmcia/pcmciareg.h>
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#include <dev/pcmcia/pcmciavar.h>
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#include <dev/pcmcia/pcmciachip.h>
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#include <dev/ic/i82365reg.h>
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#include <dev/ic/i82365var.h>
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#include <dev/isa/i82365_isavar.h>
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/*****************************************************************************
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* Configurable parameters.
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*****************************************************************************/
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#include "opt_pcic_isa_alloc_iobase.h"
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#include "opt_pcic_isa_alloc_iosize.h"
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#include "opt_pcic_isa_intr_alloc_mask.h"
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/*
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* Default I/O allocation range. If both are set to non-zero, these
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* values will be used instead. Otherwise, the code attempts to probe
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* the bus width. Systems with 10 address bits should use 0x300 and 0xff.
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* Systems with 12 address bits (most) should use 0x400 and 0xbff.
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*/
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#ifndef PCIC_ISA_ALLOC_IOBASE
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#define PCIC_ISA_ALLOC_IOBASE 0
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#endif
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#ifndef PCIC_ISA_ALLOC_IOSIZE
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#define PCIC_ISA_ALLOC_IOSIZE 0
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#endif
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int pcic_isa_alloc_iobase = PCIC_ISA_ALLOC_IOBASE;
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int pcic_isa_alloc_iosize = PCIC_ISA_ALLOC_IOSIZE;
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/*
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* Default IRQ allocation bitmask. This defines the range of allowable
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* IRQs for PCMCIA slots. Useful if order of probing would screw up other
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* devices, or if PCIC hardware/cards have trouble with certain interrupt
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* lines.
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*
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* We disable IRQ 10 by default, since some common laptops (namely, the
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* NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
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*/
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#ifndef PCIC_ISA_INTR_ALLOC_MASK
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#define PCIC_ISA_INTR_ALLOC_MASK 0xfbff
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#endif
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int pcic_isa_intr_alloc_mask = PCIC_ISA_INTR_ALLOC_MASK;
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/*****************************************************************************
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* End of configurable parameters.
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*****************************************************************************/
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#ifdef PCICISADEBUG
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int pcicsubr_debug = 0 /* XXX */ ;
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#define DPRINTF(arg) if (pcicsubr_debug) printf arg;
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#else
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#define DPRINTF(arg)
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#endif
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void pcic_isa_bus_width_probe (sc, iot, ioh, base, length)
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struct pcic_softc *sc;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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bus_addr_t base;
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u_int32_t length;
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{
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bus_space_handle_t ioh_high;
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int i, iobuswidth, tmp1, tmp2;
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/*
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* figure out how wide the isa bus is. Do this by checking if the
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* pcic controller is mirrored 0x400 above where we expect it to be.
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*/
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iobuswidth = 12;
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/* Map i/o space. */
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if (bus_space_map(iot, base + 0x400, length, 0, &ioh_high)) {
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printf("%s: can't map high i/o space\n", sc->dev.dv_xname);
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return;
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}
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for (i = 0; i < PCIC_NSLOTS; i++) {
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if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) {
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/*
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* read the ident flags from the normal space and
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* from the mirror, and compare them
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*/
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bus_space_write_1(iot, ioh, PCIC_REG_INDEX,
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sc->handle[i].sock + PCIC_IDENT);
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tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
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bus_space_write_1(iot, ioh_high, PCIC_REG_INDEX,
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sc->handle[i].sock + PCIC_IDENT);
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tmp2 = bus_space_read_1(iot, ioh_high, PCIC_REG_DATA);
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if (tmp1 == tmp2)
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iobuswidth = 10;
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}
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}
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bus_space_free(iot, ioh_high, length);
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/*
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* XXX mycroft recommends I/O space range 0x400-0xfff . I should put
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* this in a header somewhere
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*/
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/*
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* XXX some hardware doesn't seem to grok addresses in 0x400 range--
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* apparently missing a bit or more of address lines. (e.g.
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* CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
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* TravelMate 5000--not clear which is at fault)
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*
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* Add a kludge to detect 10 bit wide buses and deal with them,
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* and also a config file option to override the probe.
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*/
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if (iobuswidth == 10) {
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sc->iobase = 0x300;
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sc->iosize = 0x0ff;
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} else {
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#if 0
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/*
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* This is what we'd like to use, but...
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*/
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sc->iobase = 0x400;
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sc->iosize = 0xbff;
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#else
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/*
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* ...the above bus width probe doesn't always work.
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* So, experimentation has shown the following range
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* to not lose on systems that 0x300-0x3ff loses on
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* (e.g. the NEC Versa 6030X).
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*/
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sc->iobase = 0x330;
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sc->iosize = 0x0cf;
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#endif
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}
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DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx (probed)\n",
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sc->dev.dv_xname, (long) sc->iobase,
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(long) sc->iobase + sc->iosize));
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if (pcic_isa_alloc_iobase && pcic_isa_alloc_iosize) {
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sc->iobase = pcic_isa_alloc_iobase;
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sc->iosize = pcic_isa_alloc_iosize;
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DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
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"(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
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(long) sc->iobase + sc->iosize));
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}
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}
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void *
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pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
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pcmcia_chipset_handle_t pch;
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struct pcmcia_function *pf;
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int ipl;
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int (*fct) __P((void *));
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void *arg;
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{
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struct pcic_handle *h = (struct pcic_handle *) pch;
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isa_chipset_tag_t ic = h->sc->intr_est;
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int irq, ist;
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void *ih;
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int reg;
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if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
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ist = IST_LEVEL;
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else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
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ist = IST_PULSE;
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else
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ist = IST_LEVEL;
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if (isa_intr_alloc(ic,
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PCIC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask, ist, &irq))
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return (NULL);
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if ((ih = isa_intr_establish(ic, irq, ist, ipl,
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fct, arg)) == NULL)
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return (NULL);
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reg = pcic_read(h, PCIC_INTR);
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reg &= ~PCIC_INTR_IRQ_MASK;
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reg |= irq;
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pcic_write(h, PCIC_INTR, reg);
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h->ih_irq = irq;
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printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
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return (ih);
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}
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void
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pcic_isa_chip_intr_disestablish(pch, ih)
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pcmcia_chipset_handle_t pch;
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void *ih;
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{
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struct pcic_handle *h = (struct pcic_handle *) pch;
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isa_chipset_tag_t ic = h->sc->intr_est;
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int reg;
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h->ih_irq = 0;
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reg = pcic_read(h, PCIC_INTR);
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reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
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pcic_write(h, PCIC_INTR, reg);
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isa_intr_disestablish(ic, ih);
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}
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