299 lines
12 KiB
Plaintext
299 lines
12 KiB
Plaintext
@c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node i960-Dependent
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@chapter Intel 80960 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter Intel 80960 Dependent Features
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@end ifclear
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@cindex i960 support
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@menu
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* Options-i960:: i960 Command-line Options
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* Floating Point-i960:: Floating Point
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* Directives-i960:: i960 Machine Directives
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* Opcodes for i960:: i960 Opcodes
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@end menu
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@c FIXME! Add Syntax sec with discussion of bitfields here, at least so
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@c long as they're not turned on for other machines than 960.
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@node Options-i960
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@section i960 Command-line Options
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@cindex i960 options
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@cindex options, i960
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@table @code
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@cindex i960 architecture options
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@cindex architecture options, i960
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@cindex @code{-A} options, i960
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@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
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Select the 80960 architecture. Instructions or features not supported
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by the selected architecture cause fatal errors.
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@samp{-ACA} is equivalent to @samp{-ACA_A}; @samp{-AKC} is equivalent to
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@samp{-AMC}. Synonyms are provided for compatibility with other tools.
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If you do not specify any of these options, @code{@value{AS}} generates code
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for any instruction or feature that is supported by @emph{some} version of the
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960 (even if this means mixing architectures!). In principle,
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@code{@value{AS}} attempts to deduce the minimal sufficient processor type if
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none is specified; depending on the object code format, the processor type may
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be recorded in the object file. If it is critical that the @code{@value{AS}}
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output match a specific architecture, specify that architecture explicitly.
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@cindex @code{-b} option, i960
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@cindex branch recording, i960
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@cindex i960 branch recording
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@item -b
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Add code to collect information about conditional branches taken, for
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later optimization using branch prediction bits. (The conditional branch
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instructions have branch prediction bits in the CA, CB, and CC
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architectures.) If @var{BR} represents a conditional branch instruction,
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the following represents the code generated by the assembler when
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@samp{-b} is specified:
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@smallexample
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call @var{increment routine}
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.word 0 # pre-counter
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Label: @var{BR}
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call @var{increment routine}
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.word 0 # post-counter
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@end smallexample
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The counter following a branch records the number of times that branch
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was @emph{not} taken; the differenc between the two counters is the
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number of times the branch @emph{was} taken.
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@cindex @code{gbr960}, i960 postprocessor
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@cindex branch statistics table, i960
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A table of every such @code{Label} is also generated, so that the
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external postprocessor @code{gbr960} (supplied by Intel) can locate all
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the counters. This table is always labelled @samp{__BRANCH_TABLE__};
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this is a local symbol to permit collecting statistics for many separate
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object files. The table is word aligned, and begins with a two-word
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header. The first word, initialized to 0, is used in maintaining linked
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lists of branch tables. The second word is a count of the number of
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entries in the table, which follow immediately: each is a word, pointing
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to one of the labels illustrated above.
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@c TEXI2ROFF-KILL
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@ifinfo
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@c END TEXI2ROFF-KILL
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@example
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+------------+------------+------------+ ... +------------+
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| | | | | |
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| *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N |
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| | | | | |
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+------------+------------+------------+ ... +------------+
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__BRANCH_TABLE__ layout
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@end example
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@c TEXI2ROFF-KILL
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@end ifinfo
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@need 2000
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@tex
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\vskip 1pc
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\line{\leftskip=0pt\hskip\tableindent
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\boxit{2cm}{\tt *NEXT}\boxit{2cm}{\tt COUNT: \it N}\boxit{2cm}{\tt
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*BRLAB 1}\ibox{1cm}{\quad\dots}\boxit{2cm}{\tt *BRLAB \it N}\hfil}
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\centerline{\it {\tt \_\_BRANCH\_TABLE\_\_} layout}
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@end tex
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@c END TEXI2ROFF-KILL
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The first word of the header is used to locate multiple branch tables,
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since each object file may contain one. Normally the links are
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maintained with a call to an initialization routine, placed at the
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beginning of each function in the file. The @sc{gnu} C compiler
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generates these calls automatically when you give it a @samp{-b} option.
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For further details, see the documentation of @samp{gbr960}.
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@cindex @code{-no-relax} option, i960
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@item -no-relax
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Normally, Compare-and-Branch instructions with targets that require
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displacements greater than 13 bits (or that have external targets) are
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replaced with the corresponding compare (or @samp{chkbit}) and branch
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instructions. You can use the @samp{-no-relax} option to specify that
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@code{@value{AS}} should generate errors instead, if the target displacement
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is larger than 13 bits.
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This option does not affect the Compare-and-Jump instructions; the code
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emitted for them is @emph{always} adjusted when necessary (depending on
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displacement size), regardless of whether you use @samp{-no-relax}.
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@end table
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@node Floating Point-i960
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@section Floating Point
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@cindex floating point, i960 (@sc{ieee})
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@cindex i960 floating point (@sc{ieee})
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@code{@value{AS}} generates @sc{ieee} floating-point numbers for the directives
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@samp{.float}, @samp{.double}, @samp{.extended}, and @samp{.single}.
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@node Directives-i960
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@section i960 Machine Directives
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@cindex machine directives, i960
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@cindex i960 machine directives
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@table @code
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@cindex @code{bss} directive, i960
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@item .bss @var{symbol}, @var{length}, @var{align}
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Reserve @var{length} bytes in the bss section for a local @var{symbol},
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aligned to the power of two specified by @var{align}. @var{length} and
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@var{align} must be positive absolute expressions. This directive
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differs from @samp{.lcomm} only in that it permits you to specify
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an alignment. @xref{Lcomm,,@code{.lcomm}}.
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@end table
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@table @code
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@cindex @code{extended} directive, i960
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@item .extended @var{flonums}
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@code{.extended} expects zero or more flonums, separated by commas; for
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each flonum, @samp{.extended} emits an @sc{ieee} extended-format (80-bit)
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floating-point number.
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@cindex @code{leafproc} directive, i960
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@item .leafproc @var{call-lab}, @var{bal-lab}
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You can use the @samp{.leafproc} directive in conjunction with the
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optimized @code{callj} instruction to enable faster calls of leaf
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procedures. If a procedure is known to call no other procedures, you
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may define an entry point that skips procedure prolog code (and that does
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not depend on system-supplied saved context), and declare it as the
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@var{bal-lab} using @samp{.leafproc}. If the procedure also has an
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entry point that goes through the normal prolog, you can specify that
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entry point as @var{call-lab}.
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A @samp{.leafproc} declaration is meant for use in conjunction with the
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optimized call instruction @samp{callj}; the directive records the data
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needed later to choose between converting the @samp{callj} into a
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@code{bal} or a @code{call}.
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@var{call-lab} is optional; if only one argument is present, or if the
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two arguments are identical, the single argument is assumed to be the
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@code{bal} entry point.
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@cindex @code{sysproc} directive, i960
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@item .sysproc @var{name}, @var{index}
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The @samp{.sysproc} directive defines a name for a system procedure.
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After you define it using @samp{.sysproc}, you can use @var{name} to
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refer to the system procedure identified by @var{index} when calling
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procedures with the optimized call instruction @samp{callj}.
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Both arguments are required; @var{index} must be between 0 and 31
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(inclusive).
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@end table
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@node Opcodes for i960
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@section i960 Opcodes
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@cindex opcodes, i960
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@cindex i960 opcodes
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All Intel 960 machine instructions are supported;
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@pxref{Options-i960,,i960 Command-line Options} for a discussion of
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selecting the instruction subset for a particular 960
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architecture.@refill
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Some opcodes are processed beyond simply emitting a single corresponding
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instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump
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instructions with target displacements larger than 13 bits.
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@menu
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* callj-i960:: @code{callj}
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* Compare-and-branch-i960:: Compare-and-Branch
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@end menu
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@node callj-i960
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@subsection @code{callj}
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@cindex @code{callj}, i960 pseudo-opcode
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@cindex i960 @code{callj} pseudo-opcode
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You can write @code{callj} to have the assembler or the linker determine
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the most appropriate form of subroutine call: @samp{call},
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@samp{bal}, or @samp{calls}. If the assembly source contains
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enough information---a @samp{.leafproc} or @samp{.sysproc} directive
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defining the operand---then @code{@value{AS}} translates the
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@code{callj}; if not, it simply emits the @code{callj}, leaving it
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for the linker to resolve.
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@node Compare-and-branch-i960
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@subsection Compare-and-Branch
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@cindex i960 compare/branch instructions
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@cindex compare/branch instructions, i960
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The 960 architectures provide combined Compare-and-Branch instructions
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that permit you to store the branch target in the lower 13 bits of the
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instruction word itself. However, if you specify a branch target far
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enough away that its address won't fit in 13 bits, the assembler can
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either issue an error, or convert your Compare-and-Branch instruction
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into separate instructions to do the compare and the branch.
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@cindex compare and jump expansions, i960
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@cindex i960 compare and jump expansions
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Whether @code{@value{AS}} gives an error or expands the instruction depends
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on two choices you can make: whether you use the @samp{-no-relax} option,
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and whether you use a ``Compare and Branch'' instruction or a ``Compare
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and Jump'' instruction. The ``Jump'' instructions are @emph{always}
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expanded if necessary; the ``Branch'' instructions are expanded when
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necessary @emph{unless} you specify @code{-no-relax}---in which case
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@code{@value{AS}} gives an error instead.
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These are the Compare-and-Branch instructions, their ``Jump'' variants,
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and the instruction pairs they may expand into:
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@c TEXI2ROFF-KILL
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@ifinfo
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@c END TEXI2ROFF-KILL
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@example
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Compare and
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Branch Jump Expanded to
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------ ------ ------------
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bbc chkbit; bno
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bbs chkbit; bo
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cmpibe cmpije cmpi; be
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cmpibg cmpijg cmpi; bg
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cmpibge cmpijge cmpi; bge
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cmpibl cmpijl cmpi; bl
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cmpible cmpijle cmpi; ble
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cmpibno cmpijno cmpi; bno
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cmpibne cmpijne cmpi; bne
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cmpibo cmpijo cmpi; bo
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cmpobe cmpoje cmpo; be
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cmpobg cmpojg cmpo; bg
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cmpobge cmpojge cmpo; bge
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cmpobl cmpojl cmpo; bl
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cmpoble cmpojle cmpo; ble
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cmpobne cmpojne cmpo; bne
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@end example
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@c TEXI2ROFF-KILL
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@end ifinfo
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@tex
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\hskip\tableindent
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\halign{\hfil {\tt #}\quad&\hfil {\tt #}\qquad&{\tt #}\hfil\cr
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\omit{\hfil\it Compare and\hfil}\span\omit&\cr
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{\it Branch}&{\it Jump}&{\it Expanded to}\cr
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bbc& & chkbit; bno\cr
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bbs& & chkbit; bo\cr
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cmpibe& cmpije& cmpi; be\cr
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cmpibg& cmpijg& cmpi; bg\cr
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cmpibge& cmpijge& cmpi; bge\cr
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cmpibl& cmpijl& cmpi; bl\cr
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cmpible& cmpijle& cmpi; ble\cr
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cmpibno& cmpijno& cmpi; bno\cr
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cmpibne& cmpijne& cmpi; bne\cr
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cmpibo& cmpijo& cmpi; bo\cr
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cmpobe& cmpoje& cmpo; be\cr
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cmpobg& cmpojg& cmpo; bg\cr
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cmpobge& cmpojge& cmpo; bge\cr
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cmpobl& cmpojl& cmpo; bl\cr
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cmpoble& cmpojle& cmpo; ble\cr
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cmpobne& cmpojne& cmpo; bne\cr}
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@end tex
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@c END TEXI2ROFF-KILL
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