868 lines
18 KiB
C
868 lines
18 KiB
C
/*
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* Copyright (c) 1982, 1986, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)dca.c 8.2 (Berkeley) 1/12/94
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* $Id: dca.c,v 1.13 1994/05/23 05:58:35 mycroft Exp $
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*/
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#include "dca.h"
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#if NDCA > 0
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/*
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* Driver for National Semiconductor INS8250/NS16550AF/WD16C552 UARTs.
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* Includes:
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* 98626/98644/internal serial interface on hp300/hp400
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* internal serial ports on hp700
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*
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* N.B. On the hp700, there is a "secret bit" with undocumented behavior.
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* The third bit of the Modem Control Register (MCR_IEN == 0x08) must be
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* set to enable interrupts.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ioctl.h>
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#include <sys/proc.h>
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#include <sys/tty.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/uio.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <hp300/dev/device.h>
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#include <hp300/dev/dcareg.h>
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#include <machine/cpu.h>
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#ifdef hp300
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#include <hp300/hp300/isr.h>
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#endif
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#ifdef hp700
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#include <machine/asp.h>
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#endif
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int dcaprobe();
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struct driver dcadriver = {
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dcaprobe, "dca",
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};
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void dcastart();
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int dcaparam(), dcaintr();
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int dcasoftCAR;
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int dca_active;
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int dca_hasfifo;
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int ndca = NDCA;
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#ifdef DCACONSOLE
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int dcaconsole = DCACONSOLE;
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#else
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int dcaconsole = -1;
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#endif
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int dcaconsinit;
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int dcadefaultrate = TTYDEF_SPEED;
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int dcamajor;
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struct dcadevice *dca_addr[NDCA];
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struct tty *dca_tty[NDCA];
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#ifdef hp300
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struct isr dcaisr[NDCA];
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int dcafastservice;
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#endif
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int dcaoflows[NDCA];
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struct speedtab dcaspeedtab[] = {
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0, 0,
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50, DCABRD(50),
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75, DCABRD(75),
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110, DCABRD(110),
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134, DCABRD(134),
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150, DCABRD(150),
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200, DCABRD(200),
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300, DCABRD(300),
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600, DCABRD(600),
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1200, DCABRD(1200),
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1800, DCABRD(1800),
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2400, DCABRD(2400),
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4800, DCABRD(4800),
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9600, DCABRD(9600),
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19200, DCABRD(19200),
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38400, DCABRD(38400),
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-1, -1
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};
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#ifdef KGDB
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#include <machine/remote-sl.h>
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extern dev_t kgdb_dev;
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extern int kgdb_rate;
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extern int kgdb_debug_init;
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#endif
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#define UNIT(x) minor(x)
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#ifdef DEBUG
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long fifoin[17];
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long fifoout[17];
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long dcaintrcount[16];
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long dcamintcount[16];
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#endif
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dcaprobe(hd)
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register struct hp_device *hd;
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{
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register struct dcadevice *dca;
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register int unit;
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dca = (struct dcadevice *)hd->hp_addr;
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#ifdef hp300
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if (dca->dca_id != DCAID0 &&
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dca->dca_id != DCAREMID0 &&
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dca->dca_id != DCAID1 &&
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dca->dca_id != DCAREMID1)
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return (0);
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#endif
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unit = hd->hp_unit;
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if (unit == dcaconsole)
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DELAY(100000);
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#ifdef hp300
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dca->dca_reset = 0xFF;
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DELAY(100);
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#endif
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/* look for a NS 16550AF UART with FIFOs */
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dca->dca_fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_14;
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DELAY(100);
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if ((dca->dca_iir & IIR_FIFO_MASK) == IIR_FIFO_MASK)
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dca_hasfifo |= 1 << unit;
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dca_addr[unit] = dca;
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#ifdef hp300
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hd->hp_ipl = DCAIPL(dca->dca_ic);
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dcaisr[unit].isr_ipl = hd->hp_ipl;
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dcaisr[unit].isr_arg = unit;
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dcaisr[unit].isr_intr = dcaintr;
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isrlink(&dcaisr[unit]);
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#endif
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dca_active |= 1 << unit;
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if (hd->hp_flags)
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dcasoftCAR |= (1 << unit);
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#ifdef KGDB
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if (kgdb_dev == makedev(dcamajor, unit)) {
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if (dcaconsole == unit)
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kgdb_dev = NODEV; /* can't debug over console port */
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else {
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(void) dcainit(unit, kgdb_rate);
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dcaconsinit = 1; /* don't re-init in dcaputc */
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if (kgdb_debug_init) {
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/*
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* Print prefix of device name,
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* let kgdb_connect print the rest.
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*/
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printf("dca%d: ", unit);
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kgdb_connect(1);
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} else
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printf("dca%d: kgdb enabled\n", unit);
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}
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}
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#endif
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#ifdef hp300
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dca->dca_ic = IC_IE;
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#endif
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/*
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* Need to reset baud rate, etc. of next print so reset dcaconsinit.
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* Also make sure console is always "hardwired."
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*/
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if (unit == dcaconsole) {
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dcaconsinit = 0;
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dcasoftCAR |= (1 << unit);
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}
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return (1);
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}
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/* ARGSUSED */
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#ifdef __STDC__
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dcaopen(dev_t dev, int flag, int mode, struct proc *p)
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#else
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dcaopen(dev, flag, mode, p)
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dev_t dev;
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int flag, mode;
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struct proc *p;
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#endif
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{
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register struct tty *tp;
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register int unit;
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int error = 0;
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unit = UNIT(dev);
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if (unit >= NDCA || (dca_active & (1 << unit)) == 0)
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return (ENXIO);
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if (!dca_tty[unit])
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tp = dca_tty[unit] = ttymalloc();
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else
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tp = dca_tty[unit];
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tp->t_oproc = dcastart;
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tp->t_param = dcaparam;
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tp->t_dev = dev;
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if ((tp->t_state & TS_ISOPEN) == 0) {
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tp->t_state |= TS_WOPEN;
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ttychars(tp);
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if (tp->t_ispeed == 0) {
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tp->t_iflag = TTYDEF_IFLAG;
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tp->t_oflag = TTYDEF_OFLAG;
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tp->t_cflag = TTYDEF_CFLAG;
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tp->t_lflag = TTYDEF_LFLAG;
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tp->t_ispeed = tp->t_ospeed = dcadefaultrate;
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}
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dcaparam(tp, &tp->t_termios);
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ttsetwater(tp);
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} else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
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return (EBUSY);
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(void) dcamctl(dev, MCR_DTR | MCR_RTS, DMSET);
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if ((dcasoftCAR & (1 << unit)) || (dcamctl(dev, 0, DMGET) & MSR_DCD))
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tp->t_state |= TS_CARR_ON;
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(void) spltty();
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while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
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(tp->t_state & TS_CARR_ON) == 0) {
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tp->t_state |= TS_WOPEN;
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if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
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ttopen, 0))
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break;
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}
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(void) spl0();
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if (error == 0)
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error = (*linesw[tp->t_line].l_open)(dev, tp);
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#ifdef hp300
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/*
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* XXX hack to speed up unbuffered builtin port.
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* If dca_fastservice is set, a level 5 interrupt
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* will be directed to dcaintr first.
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*/
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if (error == 0 && unit == 0 && (dca_hasfifo & 1) == 0)
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dcafastservice = 1;
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#endif
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return (error);
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}
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/*ARGSUSED*/
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dcaclose(dev, flag, mode, p)
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dev_t dev;
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int flag, mode;
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struct proc *p;
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{
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register struct tty *tp;
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register struct dcadevice *dca;
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register int unit;
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unit = UNIT(dev);
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#ifdef hp300
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if (unit == 0)
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dcafastservice = 0;
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#endif
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dca = dca_addr[unit];
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tp = dca_tty[unit];
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(*linesw[tp->t_line].l_close)(tp, flag);
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dca->dca_cfcr &= ~CFCR_SBREAK;
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#ifdef KGDB
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/* do not disable interrupts if debugging */
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if (dev != kgdb_dev)
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#endif
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dca->dca_ier = 0;
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if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
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(tp->t_state&TS_ISOPEN) == 0)
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(void) dcamctl(dev, 0, DMSET);
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ttyclose(tp);
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#if 0
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ttyfree(tp);
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dca_tty[unit] = (struct tty *)0;
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#endif
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return (0);
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}
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dcaread(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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int unit = UNIT(dev);
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register struct tty *tp = dca_tty[unit];
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int error, of;
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of = dcaoflows[unit];
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error = (*linesw[tp->t_line].l_read)(tp, uio, flag);
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/*
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* XXX hardly a reasonable thing to do, but reporting overflows
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* at interrupt time just exacerbates the problem.
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*/
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if (dcaoflows[unit] != of)
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log(LOG_WARNING, "dca%d: silo overflow\n", unit);
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return (error);
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}
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dcawrite(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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register struct tty *tp = dca_tty[UNIT(dev)];
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return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
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}
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dcaintr(unit)
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register int unit;
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{
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register struct dcadevice *dca;
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register u_char code;
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register struct tty *tp;
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int iflowdone = 0;
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dca = dca_addr[unit];
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#ifdef hp300
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if ((dca->dca_ic & (IC_IR|IC_IE)) != (IC_IR|IC_IE))
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return (0);
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#endif
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tp = dca_tty[unit];
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while (1) {
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code = dca->dca_iir;
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#ifdef DEBUG
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dcaintrcount[code & IIR_IMASK]++;
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#endif
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switch (code & IIR_IMASK) {
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case IIR_NOPEND:
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return (1);
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case IIR_RXTOUT:
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case IIR_RXRDY:
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/* do time-critical read in-line */
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/*
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* Process a received byte. Inline for speed...
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*/
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#ifdef KGDB
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#define RCVBYTE() \
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code = dca->dca_data; \
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if ((tp->t_state & TS_ISOPEN) == 0) { \
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if (code == FRAME_END && \
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kgdb_dev == makedev(dcamajor, unit)) \
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kgdb_connect(0); /* trap into kgdb */ \
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} else \
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(*linesw[tp->t_line].l_rint)(code, tp)
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#else
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#define RCVBYTE() \
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code = dca->dca_data; \
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if ((tp->t_state & TS_ISOPEN) != 0) \
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(*linesw[tp->t_line].l_rint)(code, tp)
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#endif
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RCVBYTE();
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if (dca_hasfifo & (1 << unit)) {
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#ifdef DEBUG
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register int fifocnt = 1;
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#endif
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while ((code = dca->dca_lsr) & LSR_RCV_MASK) {
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if (code == LSR_RXRDY) {
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RCVBYTE();
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} else
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dcaeint(unit, code, dca);
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#ifdef DEBUG
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fifocnt++;
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#endif
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}
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#ifdef DEBUG
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if (fifocnt > 16)
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fifoin[0]++;
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else
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fifoin[fifocnt]++;
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#endif
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}
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if (!iflowdone && (tp->t_cflag&CRTS_IFLOW) &&
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tp->t_rawq.c_cc > TTYHOG/2) {
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dca->dca_mcr &= ~MCR_RTS;
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iflowdone = 1;
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}
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break;
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case IIR_TXRDY:
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tp->t_state &=~ (TS_BUSY|TS_FLUSH);
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if (tp->t_line)
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(*linesw[tp->t_line].l_start)(tp);
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else
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dcastart(tp);
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break;
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case IIR_RLS:
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dcaeint(unit, dca->dca_lsr, dca);
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break;
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default:
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if (code & IIR_NOPEND)
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return (1);
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log(LOG_WARNING, "dca%d: weird interrupt: 0x%x\n",
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unit, code);
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/* fall through */
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case IIR_MLSC:
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dcamint(unit, dca);
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break;
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}
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}
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}
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dcaeint(unit, stat, dca)
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register int unit, stat;
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register struct dcadevice *dca;
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{
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register struct tty *tp;
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register int c;
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tp = dca_tty[unit];
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c = dca->dca_data;
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if ((tp->t_state & TS_ISOPEN) == 0) {
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#ifdef KGDB
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/* we don't care about parity errors */
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if (((stat & (LSR_BI|LSR_FE|LSR_PE)) == LSR_PE) &&
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kgdb_dev == makedev(dcamajor, unit) && c == FRAME_END)
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kgdb_connect(0); /* trap into kgdb */
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#endif
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return;
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}
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if (stat & (LSR_BI | LSR_FE))
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c |= TTY_FE;
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else if (stat & LSR_PE)
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c |= TTY_PE;
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else if (stat & LSR_OE)
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dcaoflows[unit]++;
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(*linesw[tp->t_line].l_rint)(c, tp);
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}
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dcamint(unit, dca)
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register int unit;
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register struct dcadevice *dca;
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{
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register struct tty *tp;
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register u_char stat;
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tp = dca_tty[unit];
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stat = dca->dca_msr;
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#ifdef DEBUG
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dcamintcount[stat & 0xf]++;
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#endif
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if ((stat & MSR_DDCD) &&
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(dcasoftCAR & (1 << unit)) == 0) {
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if (stat & MSR_DCD)
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(void)(*linesw[tp->t_line].l_modem)(tp, 1);
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else if ((*linesw[tp->t_line].l_modem)(tp, 0) == 0)
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dca->dca_mcr &= ~(MCR_DTR | MCR_RTS);
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}
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/*
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* CTS change.
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* If doing HW output flow control start/stop output as appropriate.
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*/
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if ((stat & MSR_DCTS) &&
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(tp->t_state & TS_ISOPEN) && (tp->t_cflag & CCTS_OFLOW)) {
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if (stat & MSR_CTS) {
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tp->t_state &=~ TS_TTSTOP;
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dcastart(tp);
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} else {
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tp->t_state |= TS_TTSTOP;
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}
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}
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}
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|
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dcaioctl(dev, cmd, data, flag, p)
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dev_t dev;
|
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int cmd;
|
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caddr_t data;
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int flag;
|
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struct proc *p;
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{
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register struct tty *tp;
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register int unit = UNIT(dev);
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register struct dcadevice *dca;
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register int error;
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|
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tp = dca_tty[unit];
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error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
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if (error >= 0)
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return (error);
|
|
error = ttioctl(tp, cmd, data, flag, p);
|
|
if (error >= 0)
|
|
return (error);
|
|
|
|
dca = dca_addr[unit];
|
|
switch (cmd) {
|
|
|
|
case TIOCSBRK:
|
|
dca->dca_cfcr |= CFCR_SBREAK;
|
|
break;
|
|
|
|
case TIOCCBRK:
|
|
dca->dca_cfcr &= ~CFCR_SBREAK;
|
|
break;
|
|
|
|
case TIOCSDTR:
|
|
(void) dcamctl(dev, MCR_DTR | MCR_RTS, DMBIS);
|
|
break;
|
|
|
|
case TIOCCDTR:
|
|
(void) dcamctl(dev, MCR_DTR | MCR_RTS, DMBIC);
|
|
break;
|
|
|
|
case TIOCMSET:
|
|
(void) dcamctl(dev, *(int *)data, DMSET);
|
|
break;
|
|
|
|
case TIOCMBIS:
|
|
(void) dcamctl(dev, *(int *)data, DMBIS);
|
|
break;
|
|
|
|
case TIOCMBIC:
|
|
(void) dcamctl(dev, *(int *)data, DMBIC);
|
|
break;
|
|
|
|
case TIOCMGET:
|
|
*(int *)data = dcamctl(dev, 0, DMGET);
|
|
break;
|
|
|
|
default:
|
|
return (ENOTTY);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
dcaparam(tp, t)
|
|
register struct tty *tp;
|
|
register struct termios *t;
|
|
{
|
|
register struct dcadevice *dca;
|
|
register int cfcr, cflag = t->c_cflag;
|
|
int unit = UNIT(tp->t_dev);
|
|
int ospeed = ttspeedtab(t->c_ospeed, dcaspeedtab);
|
|
|
|
/* check requested parameters */
|
|
if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
|
|
return (EINVAL);
|
|
/* and copy to tty */
|
|
tp->t_ispeed = t->c_ispeed;
|
|
tp->t_ospeed = t->c_ospeed;
|
|
tp->t_cflag = cflag;
|
|
|
|
dca = dca_addr[unit];
|
|
dca->dca_ier = IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC;
|
|
#ifdef hp700
|
|
dca->dca_mcr |= MCR_IEN;
|
|
#endif
|
|
if (ospeed == 0) {
|
|
(void) dcamctl(unit, 0, DMSET); /* hang up line */
|
|
return (0);
|
|
}
|
|
dca->dca_cfcr |= CFCR_DLAB;
|
|
dca->dca_data = ospeed & 0xFF;
|
|
dca->dca_ier = ospeed >> 8;
|
|
switch (cflag&CSIZE) {
|
|
case CS5:
|
|
cfcr = CFCR_5BITS; break;
|
|
case CS6:
|
|
cfcr = CFCR_6BITS; break;
|
|
case CS7:
|
|
cfcr = CFCR_7BITS; break;
|
|
case CS8:
|
|
cfcr = CFCR_8BITS; break;
|
|
}
|
|
if (cflag&PARENB) {
|
|
cfcr |= CFCR_PENAB;
|
|
if ((cflag&PARODD) == 0)
|
|
cfcr |= CFCR_PEVEN;
|
|
}
|
|
if (cflag&CSTOPB)
|
|
cfcr |= CFCR_STOPB;
|
|
dca->dca_cfcr = cfcr;
|
|
if (dca_hasfifo & (1 << unit))
|
|
dca->dca_fifo = FIFO_ENABLE | FIFO_TRIGGER_14;
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
dcastart(tp)
|
|
register struct tty *tp;
|
|
{
|
|
register struct dcadevice *dca;
|
|
int s, unit, c;
|
|
|
|
unit = UNIT(tp->t_dev);
|
|
dca = dca_addr[unit];
|
|
s = spltty();
|
|
if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
|
|
goto out;
|
|
if (tp->t_outq.c_cc <= tp->t_lowat) {
|
|
if (tp->t_state&TS_ASLEEP) {
|
|
tp->t_state &= ~TS_ASLEEP;
|
|
wakeup((caddr_t)&tp->t_outq);
|
|
}
|
|
selwakeup(&tp->t_wsel);
|
|
}
|
|
if (tp->t_outq.c_cc == 0)
|
|
goto out;
|
|
if (dca->dca_lsr & LSR_TXRDY) {
|
|
c = getc(&tp->t_outq);
|
|
tp->t_state |= TS_BUSY;
|
|
dca->dca_data = c;
|
|
if (dca_hasfifo & (1 << unit)) {
|
|
for (c = 1; c < 16 && tp->t_outq.c_cc; ++c)
|
|
dca->dca_data = getc(&tp->t_outq);
|
|
#ifdef DEBUG
|
|
if (c > 16)
|
|
fifoout[0]++;
|
|
else
|
|
fifoout[c]++;
|
|
#endif
|
|
}
|
|
}
|
|
out:
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Stop output on a line.
|
|
*/
|
|
/*ARGSUSED*/
|
|
dcastop(tp, flag)
|
|
register struct tty *tp;
|
|
int flag;
|
|
{
|
|
register int s;
|
|
|
|
s = spltty();
|
|
if (tp->t_state & TS_BUSY) {
|
|
if ((tp->t_state&TS_TTSTOP)==0)
|
|
tp->t_state |= TS_FLUSH;
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
dcamctl(dev, bits, how)
|
|
dev_t dev;
|
|
int bits, how;
|
|
{
|
|
register struct dcadevice *dca;
|
|
register int unit;
|
|
int s;
|
|
|
|
unit = UNIT(dev);
|
|
dca = dca_addr[unit];
|
|
#ifdef hp700
|
|
/*
|
|
* Always make sure MCR_IEN is set (unless setting to 0)
|
|
*/
|
|
#ifdef KGDB
|
|
if (how == DMSET && kgdb_dev == makedev(dcamajor, unit))
|
|
bits |= MCR_IEN;
|
|
else
|
|
#endif
|
|
if (how == DMBIS || (how == DMSET && bits))
|
|
bits |= MCR_IEN;
|
|
else if (how == DMBIC)
|
|
bits &= ~MCR_IEN;
|
|
#endif
|
|
s = spltty();
|
|
switch (how) {
|
|
|
|
case DMSET:
|
|
dca->dca_mcr = bits;
|
|
break;
|
|
|
|
case DMBIS:
|
|
dca->dca_mcr |= bits;
|
|
break;
|
|
|
|
case DMBIC:
|
|
dca->dca_mcr &= ~bits;
|
|
break;
|
|
|
|
case DMGET:
|
|
bits = dca->dca_msr;
|
|
break;
|
|
}
|
|
(void) splx(s);
|
|
return (bits);
|
|
}
|
|
|
|
/*
|
|
* Following are all routines needed for DCA to act as console
|
|
*/
|
|
#include <dev/cons.h>
|
|
|
|
dcacnprobe(cp)
|
|
struct consdev *cp;
|
|
{
|
|
int unit;
|
|
|
|
/* locate the major number */
|
|
for (dcamajor = 0; dcamajor < nchrdev; dcamajor++)
|
|
if (cdevsw[dcamajor].d_open == dcaopen)
|
|
break;
|
|
|
|
/* XXX: ick */
|
|
unit = CONUNIT;
|
|
#ifdef hp300
|
|
dca_addr[CONUNIT] = (struct dcadevice *) sctova(CONSCODE);
|
|
|
|
/* make sure hardware exists */
|
|
if (badaddr((short *)dca_addr[unit])) {
|
|
cp->cn_pri = CN_DEAD;
|
|
return;
|
|
}
|
|
#endif
|
|
#ifdef hp700
|
|
dca_addr[CONUNIT] = CONPORT;
|
|
#endif
|
|
|
|
/* initialize required fields */
|
|
cp->cn_dev = makedev(dcamajor, unit);
|
|
#ifdef hp300
|
|
switch (dca_addr[unit]->dca_id) {
|
|
case DCAID0:
|
|
case DCAID1:
|
|
cp->cn_pri = CN_NORMAL;
|
|
break;
|
|
case DCAREMID0:
|
|
case DCAREMID1:
|
|
cp->cn_pri = CN_REMOTE;
|
|
break;
|
|
default:
|
|
cp->cn_pri = CN_DEAD;
|
|
break;
|
|
}
|
|
#endif
|
|
#ifdef hp700
|
|
cp->cn_pri = CN_NORMAL;
|
|
#endif
|
|
/*
|
|
* If dcaconsole is initialized, raise our priority.
|
|
*/
|
|
if (dcaconsole == unit)
|
|
cp->cn_pri = CN_REMOTE;
|
|
#ifdef KGDB
|
|
if (major(kgdb_dev) == 1) /* XXX */
|
|
kgdb_dev = makedev(dcamajor, minor(kgdb_dev));
|
|
#endif
|
|
}
|
|
|
|
dcacninit(cp)
|
|
struct consdev *cp;
|
|
{
|
|
int unit = UNIT(cp->cn_dev);
|
|
|
|
dcainit(unit, dcadefaultrate);
|
|
dcaconsole = unit;
|
|
dcaconsinit = 1;
|
|
}
|
|
|
|
dcainit(unit, rate)
|
|
int unit, rate;
|
|
{
|
|
register struct dcadevice *dca;
|
|
int s;
|
|
short stat;
|
|
|
|
#ifdef lint
|
|
stat = unit; if (stat) return;
|
|
#endif
|
|
dca = dca_addr[unit];
|
|
s = splhigh();
|
|
#ifdef hp300
|
|
dca->dca_reset = 0xFF;
|
|
DELAY(100);
|
|
dca->dca_ic = IC_IE;
|
|
#endif
|
|
dca->dca_cfcr = CFCR_DLAB;
|
|
rate = ttspeedtab(rate, dcaspeedtab);
|
|
dca->dca_data = rate & 0xFF;
|
|
dca->dca_ier = rate >> 8;
|
|
dca->dca_cfcr = CFCR_8BITS;
|
|
dca->dca_ier = IER_ERXRDY | IER_ETXRDY;
|
|
#ifdef hp700
|
|
dca->dca_mcr |= MCR_IEN;
|
|
#endif
|
|
dca->dca_fifo = FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_14;
|
|
DELAY(100);
|
|
stat = dca->dca_iir;
|
|
splx(s);
|
|
}
|
|
|
|
dcacngetc(dev)
|
|
dev_t dev;
|
|
{
|
|
register struct dcadevice *dca = dca_addr[UNIT(dev)];
|
|
register u_char stat;
|
|
int c, s;
|
|
|
|
#ifdef lint
|
|
stat = dev; if (stat) return (0);
|
|
#endif
|
|
s = splhigh();
|
|
while (((stat = dca->dca_lsr) & LSR_RXRDY) == 0)
|
|
;
|
|
c = dca->dca_data;
|
|
stat = dca->dca_iir;
|
|
splx(s);
|
|
return (c);
|
|
}
|
|
|
|
/*
|
|
* Console kernel output character routine.
|
|
*/
|
|
dcacnputc(dev, c)
|
|
dev_t dev;
|
|
register int c;
|
|
{
|
|
register struct dcadevice *dca = dca_addr[UNIT(dev)];
|
|
register int timo;
|
|
register u_char stat;
|
|
int s = splhigh();
|
|
|
|
#ifdef lint
|
|
stat = dev; if (stat) return;
|
|
#endif
|
|
if (dcaconsinit == 0) {
|
|
(void) dcainit(UNIT(dev), dcadefaultrate);
|
|
dcaconsinit = 1;
|
|
}
|
|
/* wait for any pending transmission to finish */
|
|
timo = 50000;
|
|
while (((stat = dca->dca_lsr) & LSR_TXRDY) == 0 && --timo)
|
|
;
|
|
dca->dca_data = c;
|
|
/* wait for this transmission to complete */
|
|
timo = 1500000;
|
|
while (((stat = dca->dca_lsr) & LSR_TXRDY) == 0 && --timo)
|
|
;
|
|
/*
|
|
* If the "normal" interface was busy transfering a character
|
|
* we must let our interrupt through to keep things moving.
|
|
* Otherwise, we clear the interrupt that we have caused.
|
|
*/
|
|
if ((dca_tty[UNIT(dev)]->t_state & TS_BUSY) == 0)
|
|
stat = dca->dca_iir;
|
|
splx(s);
|
|
}
|
|
#endif
|