110 lines
4.0 KiB
C
110 lines
4.0 KiB
C
/* $NetBSD: intr.h,v 1.1 2002/07/05 13:32:00 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SH5_INTR_H
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#define _SH5_INTR_H
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/* Interrupt sharing types */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/* Interrupt priority levels */
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#define NIPL 15
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#define _IPL_NSOFT 4
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#define IPL_NONE 0 /* nothing */
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#define IPL_SOFT 1 /* miscellaneous soft interrupts */
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#define IPL_SOFTCLOCK 2 /* timeouts */
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#define IPL_SOFTNET 4 /* protocol stacks */
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#define IPL_BIO 8 /* Block I/O */
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#define IPL_NET 9 /* Network */
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#define IPL_SOFTSERIAL 10 /* serial */
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#define IPL_TTY 11 /* tty subsystem */
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#define IPL_VM 11 /* memory allocation */
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#define IPL_SERIAL 12 /* tty subsystem */
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#define IPL_CLOCK 14 /* Hard clock */
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#define IPL_HIGH 15
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#define spl0() splx(IPL_NONE)
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#define splsoftclock() splraise(IPL_SOFTCLOCK)
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#define splsoftnet() splraise(IPL_SOFTNET)
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#define splbio() splraise(IPL_BIO)
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#define splnet() splraise(IPL_NET)
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#define splsoftserial() splraise(IPL_SOFTSERIAL)
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#define spltty() splraise(IPL_TTY)
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#define splvm() splraise(IPL_VM)
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#define splserial() splraise(IPL_SERIAL)
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#define splclock() splraise(IPL_CLOCK)
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#define splstatclock() splclock()
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#define splsched() splclock()
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#define splhigh() splraise(IPL_HIGH)
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#define spllock() splhigh()
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#define spllowersoftclock() splx(IPL_SOFTCLOCK);
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#ifndef _LOCORE
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extern void splx(int);
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extern int splraise(int);
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extern void *softintr_establish(int, void (*)(void *), void *);
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extern void softintr_disestablish(void *);
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extern void softintr_schedule(void *);
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/* XXX For legacy software interrupts */
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extern void *softnet_cookie;
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#define setsoftnet() softintr_schedule(softnet_cookie)
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extern void *sh5_intr_establish(int, int, int, int (*)(void *), void *);
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extern void sh5_intr_disestablish(void *);
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extern struct evcnt *sh5_intr_evcnt(void *);
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/* Internal use only */
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extern void softintr_dispatch(u_int, u_int);
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extern void softintr_init(void);
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extern void sh5_intr_init(int, void (*)(void *, u_int, int, int),
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void (*)(void *, u_int), void *);
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extern struct evcnt _sh5_intr_events[];
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extern void _cpu_intr_set(u_int);
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extern void _cpu_intr_resume(u_int);
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#endif /* !_LOCORE */
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#endif /* _SH5_INTR_H */
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