9feefd4bbc
the previous state. Use DISABLE_INTERRUPT_SAVE()/ENABLE_INTERRUPT() in pic_splfuncs instead of cpsid()/cpsie(). The difference here is the caller no longer specifies which bits to disable and enable; on arm32 we continue to use I32_bit and on aarch64 we now consistently toggle both IRQ and FIQ state.
103 lines
3.1 KiB
C
103 lines
3.1 KiB
C
/* $NetBSD: locore.h,v 1.9 2021/03/01 11:29:14 jmcneill Exp $ */
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/*-
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas of 3am Software Foundry.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _AARCH64_LOCORE_H_
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#define _AARCH64_LOCORE_H_
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#ifdef __aarch64__
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#ifdef _KERNEL_OPT
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#include "opt_multiprocessor.h"
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#endif
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#ifdef _LOCORE
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#define ENABLE_INTERRUPT \
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msr daifclr, #((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
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#define DISABLE_INTERRUPT \
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msr daifset, #((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
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#else /* _LOCORE */
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#include <sys/types.h>
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#include <aarch64/armreg.h>
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#include <aarch64/machdep.h> /* arm32 compat */
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/* for compatibility arch/arm */
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#define I32_bit DAIF_I
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#define F32_bit DAIF_F
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#define cpsie(psw) daif_enable((psw))
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#define cpsid(psw) daif_disable((psw))
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#define ENABLE_INTERRUPT() \
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reg_daifclr_write((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
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#define DISABLE_INTERRUPT() \
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reg_daifset_write((DAIF_I|DAIF_F) >> DAIF_SETCLR_SHIFT)
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#define DISABLE_INTERRUPT_SAVE() \
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daif_disable(DAIF_I|DAIF_F)
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#define DAIF_MASK (DAIF_D|DAIF_A|DAIF_I|DAIF_F)
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static inline void __unused
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daif_enable(register_t psw)
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{
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if (!__builtin_constant_p(psw)) {
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reg_daif_write(reg_daif_read() & ~psw);
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} else {
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reg_daifclr_write((psw & DAIF_MASK) >> DAIF_SETCLR_SHIFT);
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}
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}
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static inline register_t __unused
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daif_disable(register_t psw)
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{
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register_t oldpsw = reg_daif_read();
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if ((oldpsw & psw) != psw) {
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if (!__builtin_constant_p(psw)) {
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reg_daif_write(oldpsw | psw);
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} else {
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reg_daifset_write((psw & DAIF_MASK) >> DAIF_SETCLR_SHIFT);
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}
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}
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return oldpsw;
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}
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#endif /* _LOCORE */
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#elif defined(__arm__)
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#include <arm/locore.h>
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#endif /* __aarch64__/__arm__ */
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#endif /* _AARCH64_LOCORE_H_ */
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