1354 lines
32 KiB
C
1354 lines
32 KiB
C
/* $NetBSD: ultra14f.c,v 1.46 1995/01/13 14:46:56 mycroft Exp $ */
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/*
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Ported for use with the UltraStor 14f by Gary Close (gclose@wvnvms.wvnet.edu)
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* Slight fixes to timeouts to run with the 34F
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* Thanks to Julian Elischer for advice and help with this port.
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*
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* Originally written by Julian Elischer (julian@tfs.com)
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* for TRW Financial Systems for use under the MACH(2.5) operating system.
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*
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* TRW Financial Systems, in accordance with their agreement with Carnegie
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* Mellon University, makes this software available to CMU to distribute
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* or use in any manner that they see fit as long as this message is kept with
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* the software. For this reason TFS also grants any other persons or
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* organisations permission to use or modify this software.
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*
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* TFS supplies this software to be publicly redistributed
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* on the understanding that TFS is not responsible for the correct
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* functioning of this software in any circumstances.
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*
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* commenced: Sun Sep 27 18:14:01 PDT 1992
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* slight mod to make work with 34F as well: Wed Jun 2 18:05:48 WST 1993
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <machine/pio.h>
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#include <i386/isa/isavar.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#ifdef DDB
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int Debugger();
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#else /* DDB */
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#define Debugger() panic("should call debugger here (ultra14f.c)")
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#endif /* DDB */
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typedef u_long physaddr;
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typedef u_long physlen;
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#define KVTOPHYS(x) vtophys(x)
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#define UHA_MSCP_MAX 32 /* store up to 32 MSCPs at one time */
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#define MSCP_HASH_SIZE 32 /* hash table size for phystokv */
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#define MSCP_HASH_SHIFT 9
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#define MSCP_HASH(x) ((((long)(x))>>MSCP_HASH_SHIFT) & (MSCP_HASH_SIZE - 1))
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#define UHA_NSEG 33 /* number of dma segments supported */
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/************************** board definitions *******************************/
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/*
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* I/O Port Interface
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*/
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#define U14_LMASK 0x0000 /* local doorbell mask reg */
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#define U14_LINT 0x0001 /* local doorbell int/stat reg */
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#define U14_SMASK 0x0002 /* system doorbell mask reg */
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#define U14_SINT 0x0003 /* system doorbell int/stat reg */
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#define U14_ID 0x0004 /* product id reg (2 ports) */
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#define U14_CONFIG 0x0006 /* config reg (2 ports) */
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#define U14_OGMPTR 0x0008 /* outgoing mail ptr (4 ports) */
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#define U14_ICMPTR 0x000c /* incoming mail ptr (4 ports) */
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#define U24_CONFIG 0x0c85 /* config reg (3 ports) */
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#define U24_LMASK 0x0c8c /* local doorbell mask reg */
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#define U24_LINT 0x0c8d /* local doorbell int/stat reg */
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#define U24_SMASK 0x0c8e /* system doorbell mask reg */
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#define U24_SINT 0x0c8f /* system doorbell int/stat reg */
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#define U24_OGMCMD 0x0c96 /* outgoing commands */
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#define U24_OGMPTR 0x0c97 /* outgoing mail ptr (4 ports) */
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#define U24_ICMCMD 0x0c9b /* incoming commands */
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#define U24_ICMPTR 0x0c9c /* incoming mail ptr (4 ports) */
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/*
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* UHA_LMASK bits (read only)
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*/
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#define UHA_LDIE 0x80 /* local doorbell int enabled */
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#define UHA_SRSTE 0x40 /* soft reset enabled */
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#define UHA_ABORTEN 0x10 /* abort MSCP enabled */
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#define UHA_OGMINTEN 0x01 /* outgoing mail interrupt enabled */
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/*
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* UHA_LINT bits (read/write)
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*/
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#define U14_OGMFULL 0x01 /* outgoing mailbox is full */
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#define U14_ABORT 0x10 /* abort MSCP */
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#define U14_SBRST 0x20 /* scsi bus reset */
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#define U14_ADRST 0x40 /* adapter soft reset */
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#define U14_ASRST 0x60 /* adapter and scsi reset */
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#define U24_OGMFULL 0x02 /* outgoing mailbox is full */
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#define U24_ABORT 0x10 /* abort MSCP */
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#define U24_SBRST 0x40 /* scsi bus reset */
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#define U24_ADRST 0x80 /* adapter soft reset */
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#define U24_ASRST 0xc0 /* adapter and scsi reset */
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/*
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* UHA_SMASK bits (read/write)
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*/
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#define UHA_ENSINT 0x80 /* enable system doorbell interrupt */
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#define UHA_EN_ABORT_COMPLETE 0x10 /* enable abort MSCP complete int */
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#define UHA_ENICM 0x01 /* enable ICM interrupt */
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/*
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* UHA_SINT bits (read)
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*/
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#define U14_ABORT_SUCC 0x10 /* abort MSCP successful */
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#define U14_ABORT_FAIL 0x18 /* abort MSCP failed */
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#define U14_SINTP 0x80 /* system doorbell int pending */
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#define U24_SINTP 0x02 /* system doorbell int pending */
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#define U24_ABORT_SUCC 0x10 /* abort MSCP successful */
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#define U24_ABORT_FAIL 0x18 /* abort MSCP failed */
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/*
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* UHA_SINT bits (write)
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*/
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#define U14_ICM_ACK 0x01 /* acknowledge ICM and clear */
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#define U14_ABORT_ACK 0x18 /* acknowledge status and clear */
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#define U24_ICM_ACK 0x02 /* acknowledge ICM and clear */
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#define U24_ABORT_ACK 0x18 /* acknowledge status and clear */
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/*
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* U14_CONFIG bits (read only)
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*/
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#define U14_DMA_CH5 0x0000 /* DMA channel 5 */
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#define U14_DMA_CH6 0x4000 /* 6 */
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#define U14_DMA_CH7 0x8000 /* 7 */
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#define U14_DMA_MASK 0xc000
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#define U14_IRQ15 0x0000 /* IRQ 15 */
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#define U14_IRQ14 0x1000 /* 14 */
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#define U14_IRQ11 0x2000 /* 11 */
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#define U14_IRQ10 0x3000 /* 10 */
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#define U14_IRQ_MASK 0x3000
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#define U14_HOSTID_MASK 0x0007
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/*
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* U24_CONFIG bits (read only)
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*/
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#define U24_MAGIC1 0x08
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#define U24_IRQ15 0x10
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#define U24_IRQ14 0x20
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#define U24_IRQ11 0x40
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#define U24_IRQ10 0x80
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#define U24_IRQ_MASK 0xf0
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#define U24_MAGIC2 0x04
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#define U24_HOSTID_MASK 0x07
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/*
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* EISA registers (offset from slot base)
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*/
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#define EISA_VENDOR 0x0c80 /* vendor ID (2 ports) */
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#define EISA_MODEL 0x0c82 /* model number (2 ports) */
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#define EISA_CONTROL 0x0c84
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#define EISA_RESET 0x04
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#define EISA_ERROR 0x02
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#define EISA_ENABLE 0x01
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/*
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* host_stat error codes
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*/
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#define UHA_NO_ERR 0x00 /* No error supposedly */
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#define UHA_SBUS_ABORT_ERR 0x84 /* scsi bus abort error */
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#define UHA_SBUS_TIMEOUT 0x91 /* scsi bus selection timeout */
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#define UHA_SBUS_OVER_UNDER 0x92 /* scsi bus over/underrun */
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#define UHA_BAD_SCSI_CMD 0x96 /* illegal scsi command */
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#define UHA_AUTO_SENSE_ERR 0x9b /* auto request sense err */
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#define UHA_SBUS_RES_ERR 0xa3 /* scsi bus reset error */
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#define UHA_BAD_SG_LIST 0xff /* invalid scatter gath list */
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struct uha_dma_seg {
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physaddr seg_addr;
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physlen seg_len;
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};
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#pragma pack(1)
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struct uha_mscp {
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u_char opcode:3;
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#define UHA_HAC 0x01 /* host adapter command */
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#define UHA_TSP 0x02 /* target scsi pass through command */
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#define UHA_SDR 0x04 /* scsi device reset */
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u_char xdir:2; /* xfer direction */
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#define UHA_SDET 0x00 /* determined by scsi command */
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#define UHA_SDIN 0x01 /* scsi data in */
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#define UHA_SDOUT 0x02 /* scsi data out */
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#define UHA_NODATA 0x03 /* no data xfer */
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u_char dcn:1; /* disable disconnect for this command */
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u_char ca:1; /* cache control */
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u_char sgth:1; /* scatter gather flag */
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u_char target:3;
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u_char chan:2; /* scsi channel (always 0 for 14f) */
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u_char lun:3;
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physaddr data_addr;
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physlen data_length;
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physaddr link_addr;
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u_char link_id;
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u_char sg_num; /* number of scat gath segs */
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/*in s-g list if sg flag is */
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/*set. starts at 1, 8bytes per */
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u_char req_sense_length;
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u_char scsi_cmd_length;
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struct scsi_generic scsi_cmd;
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u_char host_stat;
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u_char target_stat;
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physaddr sense_ptr; /* if 0 no auto sense */
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/*-----------------end of hardware supported fields----------------*/
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TAILQ_ENTRY(uha_mscp) chain;
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struct uha_mscp *nexthash;
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long hashkey;
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struct scsi_xfer *xs; /* the scsi_xfer for this cmd */
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int flags;
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#define MSCP_FREE 0
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#define MSCP_ACTIVE 1
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#define MSCP_ABORTED 2
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struct uha_dma_seg uha_dma[UHA_NSEG];
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struct scsi_sense_data mscp_sense;
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};
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#pragma pack(4)
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struct uha_softc {
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struct device sc_dev;
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struct isadev sc_id;
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struct intrhand sc_ih;
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int sc_iobase;
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int sc_irq, sc_drq;
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void (*send_mbox)();
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int (*abort)();
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int (*poll)();
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int (*intr)();
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void (*init)();
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struct uha_mscp *mscphash[MSCP_HASH_SIZE];
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TAILQ_HEAD(, uha_mscp) free_mscp;
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int nummscps;
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int uha_scsi_dev; /* our scsi id */
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struct scsi_link sc_link;
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};
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void u14_start_mbox __P((struct uha_softc *, int, struct uha_mscp *));
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void u14_send_mbox __P((struct uha_softc *, struct uha_mscp *));
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void u24_start_mbox __P((struct uha_softc *, int, struct uha_mscp *));
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void u24_send_mbox __P((struct uha_softc *, struct uha_mscp *));
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int u14_abort __P((struct uha_softc *, struct uha_mscp *));
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int u24_abort __P((struct uha_softc *, struct uha_mscp *));
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int u14_poll __P((struct uha_softc *, struct scsi_xfer *, int));
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int u24_poll __P((struct uha_softc *, struct scsi_xfer *, int));
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int u14intr __P((struct uha_softc *));
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int u24intr __P((struct uha_softc *));
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void uha_done __P((struct uha_softc *, struct uha_mscp *));
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void uha_free_mscp __P((struct uha_softc *, struct uha_mscp *, int flags));
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struct uha_mscp *uha_get_mscp __P((struct uha_softc *, int));
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struct uha_mscp *uha_mscp_phys_kv __P((struct uha_softc *, u_long));
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int u14_find __P((struct uha_softc *, struct isa_attach_args *));
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int u24_find __P((struct uha_softc *, struct isa_attach_args *));
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void u14_init __P((struct uha_softc *));
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void u24_init __P((struct uha_softc *));
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void uhaminphys __P((struct buf *));
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int uha_scsi_cmd __P((struct scsi_xfer *));
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void uha_timeout __P((void *arg));
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#ifdef UHADEBUG
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void uha_print_mscp __P((struct uha_mscp *));
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void uha_print_active_mscp __P((struct uha_softc *));
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#endif
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u_long scratch;
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#define UHA_SHOWMSCPS 0x01
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#define UHA_SHOWINTS 0x02
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#define UHA_SHOWCMDS 0x04
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#define UHA_SHOWMISC 0x08
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struct scsi_adapter uha_switch = {
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uha_scsi_cmd,
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uhaminphys,
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0,
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0,
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};
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/* the below structure is so we have a default dev struct for out link struct */
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struct scsi_device uha_dev = {
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NULL, /* Use default error handler */
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NULL, /* have a queue, served by this */
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NULL, /* have no async handler */
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NULL, /* Use default 'done' routine */
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};
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int uhaprobe __P((struct device *, void *, void *));
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void uhaattach __P((struct device *, struct device *, void *));
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struct cfdriver uhacd = {
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NULL, "uha", uhaprobe, uhaattach, DV_DULL, sizeof(struct uha_softc)
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};
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/*
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* Function to send a command out through a mailbox
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*/
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void
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u14_start_mbox(uha, opcode, mscp)
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struct uha_softc *uha;
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int opcode;
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struct uha_mscp *mscp;
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{
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int iobase = uha->sc_iobase;
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int spincount = 100000; /* 1s should be enough */
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while (--spincount) {
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if ((inb(iobase + U14_LINT) & U14_OGMFULL) == 0)
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break;
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delay(100);
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}
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if (!spincount) {
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printf("%s: uha_send_mbox, board not responding\n",
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uha->sc_dev.dv_xname);
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Debugger();
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}
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outl(iobase + U14_OGMPTR, KVTOPHYS(mscp));
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outb(iobase + U14_LINT, opcode);
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}
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void
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u14_send_mbox(uha, mscp)
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struct uha_softc *uha;
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struct uha_mscp *mscp;
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{
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u14_start_mbox(uha, U14_OGMFULL, mscp);
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}
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void
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u24_start_mbox(uha, opcode, mscp)
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struct uha_softc *uha;
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int opcode;
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struct uha_mscp *mscp;
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{
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int iobase = uha->sc_iobase;
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int spincount = 100000; /* 1s should be enough */
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while (--spincount) {
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if ((inb(iobase + U24_LINT) & U24_OGMFULL) == 0)
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break;
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delay(100);
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}
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if (!spincount) {
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printf("%s: uha_send_mbox, board not responding\n",
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uha->sc_dev.dv_xname);
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Debugger();
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}
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outl(iobase + U24_OGMPTR, KVTOPHYS(mscp));
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outb(iobase + U24_OGMCMD, 1);
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outb(iobase + U24_LINT, opcode);
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}
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void
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u24_send_mbox(uha, mscp)
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struct uha_softc *uha;
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struct uha_mscp *mscp;
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{
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u24_start_mbox(uha, U24_OGMFULL, mscp);
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}
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/*
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* Function to send abort
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*/
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int
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u14_abort(uha, mscp)
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struct uha_softc *uha;
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struct uha_mscp *mscp;
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{
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int iobase = uha->sc_iobase;
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int abortcount = 200000; /* 2 secs */
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int s = splbio();
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u14_start_mbox(uha, U14_ABORT, mscp);
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while (--abortcount) {
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if (inb(iobase + U14_SINT) & U14_ABORT_FAIL)
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break;
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delay(10);
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}
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if (!abortcount) {
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printf("%s: u14_abort, board not responding\n",
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uha->sc_dev.dv_xname);
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Debugger();
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}
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if ((inb(iobase + U14_SINT) & (U14_ABORT_FAIL | U14_ABORT_SUCC)) ==
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U14_ABORT_SUCC) {
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outb(iobase + U14_SINT, U14_ABORT_ACK);
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splx(s);
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return 1;
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} else {
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outb(iobase + U14_SINT, U14_ABORT_ACK);
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splx(s);
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return 0;
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}
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}
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int
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u24_abort(uha, mscp)
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struct uha_softc *uha;
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struct uha_mscp *mscp;
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{
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int iobase = uha->sc_iobase;
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int abortcount = 200000; /* 2 secs */
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int s = splbio();
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u24_start_mbox(uha, U24_ABORT, mscp);
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while (--abortcount) {
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if (inb(iobase + U24_SINT) & U24_ABORT_FAIL)
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break;
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delay(10);
|
|
}
|
|
if (!abortcount) {
|
|
printf("%s: u24_abort, board not responding\n",
|
|
uha->sc_dev.dv_xname);
|
|
Debugger();
|
|
}
|
|
|
|
if ((inb(iobase + U24_SINT) & (U24_ABORT_FAIL | U24_ABORT_SUCC)) ==
|
|
U24_ABORT_SUCC) {
|
|
outb(iobase + U24_SINT, U24_ABORT_ACK);
|
|
splx(s);
|
|
return 1;
|
|
} else {
|
|
outb(iobase + U24_SINT, U24_ABORT_ACK);
|
|
splx(s);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Function to poll for command completion when in poll mode.
|
|
*
|
|
* wait = timeout in msec
|
|
*/
|
|
int
|
|
u14_poll(uha, xs, count)
|
|
struct uha_softc *uha;
|
|
struct scsi_xfer *xs;
|
|
int count;
|
|
{
|
|
int iobase = uha->sc_iobase;
|
|
|
|
while (count) {
|
|
/*
|
|
* If we had interrupts enabled, would we
|
|
* have got an interrupt?
|
|
*/
|
|
if (inb(iobase + U14_SINT) & U14_SINTP)
|
|
u14intr(uha);
|
|
if (xs->flags & ITSDONE)
|
|
return 0;
|
|
delay(1000);
|
|
count--;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
int
|
|
u24_poll(uha, xs, count)
|
|
struct uha_softc *uha;
|
|
struct scsi_xfer *xs;
|
|
int count;
|
|
{
|
|
int iobase = uha->sc_iobase;
|
|
|
|
while (count) {
|
|
/*
|
|
* If we had interrupts enabled, would we
|
|
* have got an interrupt?
|
|
*/
|
|
if (inb(iobase + U24_SINT) & U24_SINTP)
|
|
u24intr(uha);
|
|
if (xs->flags & ITSDONE)
|
|
return 0;
|
|
delay(1000);
|
|
count--;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
* Check if the device can be found at the port given and if so, set it up
|
|
* ready for further work as an argument, takes the isa_device structure
|
|
* from autoconf.c
|
|
*/
|
|
int
|
|
uhaprobe(parent, match, aux)
|
|
struct device *parent;
|
|
void *match, *aux;
|
|
{
|
|
struct uha_softc *uha = match;
|
|
struct isa_attach_args *ia = aux;
|
|
|
|
uha->sc_iobase = ia->ia_iobase;
|
|
|
|
/*
|
|
* Try initialise a unit at this location
|
|
* sets up dma and bus speed, loads uha->sc_irq
|
|
*/
|
|
if (u24_find(uha, ia) != 0 && u14_find(uha, ia) != 0)
|
|
return 0;
|
|
|
|
if (ia->ia_irq != IRQUNK) {
|
|
if (ia->ia_irq != uha->sc_irq) {
|
|
printf("%s: irq mismatch; kernel configured %d != board configured %d\n",
|
|
uha->sc_dev.dv_xname, ia->ia_irq, uha->sc_irq);
|
|
return 0;
|
|
}
|
|
} else
|
|
ia->ia_irq = uha->sc_irq;
|
|
|
|
if (ia->ia_drq != DRQUNK) {
|
|
if (ia->ia_drq != uha->sc_drq) {
|
|
printf("%s: drq mismatch; kernel configured %d != board configured %d\n",
|
|
uha->sc_dev.dv_xname, ia->ia_drq, uha->sc_drq);
|
|
return 0;
|
|
}
|
|
} else
|
|
ia->ia_drq = uha->sc_drq;
|
|
|
|
ia->ia_msize = 0;
|
|
ia->ia_iosize = 16;
|
|
return 1;
|
|
}
|
|
|
|
uhaprint()
|
|
{
|
|
|
|
}
|
|
|
|
/*
|
|
* Attach all the sub-devices we can find
|
|
*/
|
|
void
|
|
uhaattach(parent, self, aux)
|
|
struct device *parent, *self;
|
|
void *aux;
|
|
{
|
|
struct isa_attach_args *ia = aux;
|
|
struct uha_softc *uha = (void *)self;
|
|
|
|
if (ia->ia_drq != DRQUNK)
|
|
isa_dmacascade(ia->ia_drq);
|
|
|
|
(uha->init)(uha);
|
|
TAILQ_INIT(&uha->free_mscp);
|
|
|
|
/*
|
|
* fill in the prototype scsi_link.
|
|
*/
|
|
uha->sc_link.adapter_softc = uha;
|
|
uha->sc_link.adapter_target = uha->uha_scsi_dev;
|
|
uha->sc_link.adapter = &uha_switch;
|
|
uha->sc_link.device = &uha_dev;
|
|
uha->sc_link.openings = 2;
|
|
|
|
printf("\n");
|
|
|
|
#ifdef NEWCONFIG
|
|
isa_establish(&uha->sc_id, &uha->sc_dev);
|
|
#endif
|
|
uha->sc_ih.ih_fun = uha->intr;
|
|
uha->sc_ih.ih_arg = uha;
|
|
uha->sc_ih.ih_level = IPL_BIO;
|
|
intr_establish(ia->ia_irq, IST_EDGE, &uha->sc_ih);
|
|
|
|
/*
|
|
* ask the adapter what subunits are present
|
|
*/
|
|
config_found(self, &uha->sc_link, uhaprint);
|
|
}
|
|
|
|
/*
|
|
* Catch an interrupt from the adaptor
|
|
*/
|
|
int
|
|
u14intr(uha)
|
|
struct uha_softc *uha;
|
|
{
|
|
struct uha_mscp *mscp;
|
|
u_char uhastat;
|
|
u_long mboxval;
|
|
int iobase = uha->sc_iobase;
|
|
|
|
#ifdef UHADEBUG
|
|
printf("%s: uhaintr ", uha->sc_dev.dv_xname);
|
|
#endif /*UHADEBUG */
|
|
|
|
if ((inb(iobase + U14_SINT) & U14_SINTP) == 0)
|
|
return 0;
|
|
|
|
for (;;) {
|
|
/*
|
|
* First get all the information and then
|
|
* acknowledge the interrupt
|
|
*/
|
|
uhastat = inb(iobase + U14_SINT);
|
|
mboxval = inl(iobase + U14_ICMPTR);
|
|
outb(iobase + U14_SINT, U14_ICM_ACK);
|
|
|
|
#ifdef UHADEBUG
|
|
printf("status = 0x%x ", uhastat);
|
|
#endif /*UHADEBUG*/
|
|
|
|
/*
|
|
* Process the completed operation
|
|
*/
|
|
mscp = uha_mscp_phys_kv(uha, mboxval);
|
|
if (!mscp) {
|
|
printf("%s: BAD MSCP RETURNED!\n",
|
|
uha->sc_dev.dv_xname);
|
|
continue; /* whatever it was, it'll timeout */
|
|
}
|
|
untimeout(uha_timeout, mscp);
|
|
uha_done(uha, mscp);
|
|
|
|
if ((inb(iobase + U14_SINT) & U14_SINTP) == 0)
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
int
|
|
u24intr(uha)
|
|
struct uha_softc *uha;
|
|
{
|
|
struct uha_mscp *mscp;
|
|
u_char uhastat;
|
|
u_long mboxval;
|
|
int iobase = uha->sc_iobase;
|
|
|
|
#ifdef UHADEBUG
|
|
printf("%s: uhaintr ", uha->sc_dev.dv_xname);
|
|
#endif /*UHADEBUG */
|
|
|
|
if ((inb(iobase + U24_SINT) & U24_SINTP) == 0)
|
|
return 0;
|
|
|
|
for (;;) {
|
|
/*
|
|
* First get all the information and then
|
|
* acknowledge the interrupt
|
|
*/
|
|
uhastat = inb(iobase + U24_SINT);
|
|
mboxval = inl(iobase + U24_ICMPTR);
|
|
outb(iobase + U24_SINT, U24_ICM_ACK);
|
|
outb(iobase + U24_ICMCMD, 0);
|
|
|
|
#ifdef UHADEBUG
|
|
printf("status = 0x%x ", uhastat);
|
|
#endif /*UHADEBUG*/
|
|
|
|
/*
|
|
* Process the completed operation
|
|
*/
|
|
mscp = uha_mscp_phys_kv(uha, mboxval);
|
|
if (!mscp) {
|
|
printf("%s: BAD MSCP RETURNED!\n",
|
|
uha->sc_dev.dv_xname);
|
|
continue; /* whatever it was, it'll timeout */
|
|
}
|
|
untimeout(uha_timeout, mscp);
|
|
uha_done(uha, mscp);
|
|
|
|
if ((inb(iobase + U24_SINT) & U24_SINTP) == 0)
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* We have a mscp which has been processed by the adaptor, now we look to see
|
|
* how the operation went.
|
|
*/
|
|
void
|
|
uha_done(uha, mscp)
|
|
struct uha_softc *uha;
|
|
struct uha_mscp *mscp;
|
|
{
|
|
struct scsi_sense_data *s1, *s2;
|
|
struct scsi_xfer *xs = mscp->xs;
|
|
|
|
SC_DEBUG(xs->sc_link, SDEV_DB2, ("uha_done\n"));
|
|
/*
|
|
* Otherwise, put the results of the operation
|
|
* into the xfer and call whoever started it
|
|
*/
|
|
if ((xs->flags & INUSE) == 0) {
|
|
printf("%s: exiting but not in use!\n", uha->sc_dev.dv_xname);
|
|
Debugger();
|
|
}
|
|
if (xs->error == XS_NOERROR) {
|
|
if (mscp->host_stat != UHA_NO_ERR) {
|
|
switch (mscp->host_stat) {
|
|
case UHA_SBUS_TIMEOUT: /* No response */
|
|
xs->error = XS_SELTIMEOUT;
|
|
break;
|
|
case UHA_SBUS_OVER_UNDER:
|
|
SC_DEBUG(xs->sc_link, SDEV_DB3,
|
|
("scsi bus xfer over/underrun\n"));
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
break;
|
|
case UHA_BAD_SG_LIST:
|
|
SC_DEBUG(xs->sc_link, SDEV_DB3,
|
|
("bad sg list reported back\n"));
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
break;
|
|
default: /* Other scsi protocol messes */
|
|
printf("%s: host_stat %x\n",
|
|
uha->sc_dev.dv_xname, mscp->host_stat);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
}
|
|
} else if (mscp->target_stat != SCSI_OK) {
|
|
switch (mscp->target_stat) {
|
|
case SCSI_CHECK:
|
|
s1 = &mscp->mscp_sense;
|
|
s2 = &xs->sense;
|
|
*s2 = *s1;
|
|
xs->error = XS_SENSE;
|
|
break;
|
|
case SCSI_BUSY:
|
|
xs->error = XS_BUSY;
|
|
break;
|
|
default:
|
|
printf("%s: target_stat %x\n",
|
|
uha->sc_dev.dv_xname, mscp->target_stat);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
}
|
|
} else
|
|
xs->resid = 0;
|
|
}
|
|
xs->flags |= ITSDONE;
|
|
uha_free_mscp(uha, mscp, xs->flags);
|
|
scsi_done(xs);
|
|
}
|
|
|
|
/*
|
|
* A mscp (and hence a mbx-out) is put onto the free list.
|
|
*/
|
|
void
|
|
uha_free_mscp(uha, mscp, flags)
|
|
struct uha_softc *uha;
|
|
struct uha_mscp *mscp;
|
|
int flags;
|
|
{
|
|
int opri;
|
|
|
|
opri = splbio();
|
|
|
|
mscp->flags = MSCP_FREE;
|
|
TAILQ_INSERT_HEAD(&uha->free_mscp, mscp, chain);
|
|
|
|
/*
|
|
* If there were none, wake abybody waiting for
|
|
* one to come free, starting with queued entries
|
|
*/
|
|
if (!mscp->chain.tqe_next)
|
|
wakeup(&uha->free_mscp);
|
|
|
|
splx(opri);
|
|
}
|
|
|
|
/*
|
|
* Get a free mscp
|
|
*
|
|
* If there are none, see if we can allocate a new one. If so, put it in the
|
|
* hash table too otherwise either return an error or sleep.
|
|
*/
|
|
struct uha_mscp *
|
|
uha_get_mscp(uha, flags)
|
|
struct uha_softc *uha;
|
|
int flags;
|
|
{
|
|
int opri;
|
|
struct uha_mscp *mscp;
|
|
int hashnum;
|
|
|
|
opri = splbio();
|
|
|
|
/*
|
|
* If we can and have to, sleep waiting for one to come free
|
|
* but only if we can't allocate a new one
|
|
*/
|
|
for (;;) {
|
|
mscp = uha->free_mscp.tqh_first;
|
|
if (mscp) {
|
|
TAILQ_REMOVE(&uha->free_mscp, mscp, chain);
|
|
break;
|
|
}
|
|
if (uha->nummscps < UHA_MSCP_MAX) {
|
|
if (mscp = (struct uha_mscp *) malloc(sizeof(struct uha_mscp),
|
|
M_TEMP, M_NOWAIT)) {
|
|
bzero(mscp, sizeof(struct uha_mscp));
|
|
uha->nummscps++;
|
|
/*
|
|
* put in the phystokv hash table
|
|
* Never gets taken out.
|
|
*/
|
|
mscp->hashkey = KVTOPHYS(mscp);
|
|
hashnum = MSCP_HASH(mscp->hashkey);
|
|
mscp->nexthash = uha->mscphash[hashnum];
|
|
uha->mscphash[hashnum] = mscp;
|
|
} else {
|
|
printf("%s: can't malloc mscp\n",
|
|
uha->sc_dev.dv_xname);
|
|
}
|
|
break;
|
|
} else {
|
|
if ((flags & SCSI_NOSLEEP) == 0)
|
|
tsleep(&uha->free_mscp, PRIBIO, "uhamsc", 0);
|
|
}
|
|
}
|
|
|
|
splx(opri);
|
|
return mscp;
|
|
}
|
|
|
|
/*
|
|
* given a physical address, find the mscp that it corresponds to.
|
|
*/
|
|
struct uha_mscp *
|
|
uha_mscp_phys_kv(uha, mscp_phys)
|
|
struct uha_softc *uha;
|
|
u_long mscp_phys;
|
|
{
|
|
int hashnum = MSCP_HASH(mscp_phys);
|
|
struct uha_mscp *mscp = uha->mscphash[hashnum];
|
|
|
|
while (mscp) {
|
|
if (mscp->hashkey == mscp_phys)
|
|
break;
|
|
mscp = mscp->nexthash;
|
|
}
|
|
return mscp;
|
|
}
|
|
|
|
/*
|
|
* Start the board, ready for normal operation
|
|
*/
|
|
int
|
|
u14_find(uha, ia)
|
|
struct uha_softc *uha;
|
|
struct isa_attach_args *ia;
|
|
{
|
|
int iobase = uha->sc_iobase;
|
|
u_short model, config;
|
|
int resetcount = 4000; /* 4 secs? */
|
|
|
|
if (ia->ia_iobase == IOBASEUNK)
|
|
return ENXIO;
|
|
|
|
model = htons(inw(iobase + U14_ID));
|
|
if ((model & 0xfff0) != 0x5640)
|
|
return ENXIO;
|
|
|
|
config = htons(inw(iobase + U14_CONFIG));
|
|
|
|
switch (model & 0x000f) {
|
|
case 0x0001:
|
|
/* This is a 34f, and doens't need an ISA DMA channel. */
|
|
uha->sc_drq = DRQUNK;
|
|
break;
|
|
default:
|
|
switch (config & U14_DMA_MASK) {
|
|
case U14_DMA_CH5:
|
|
uha->sc_drq = 5;
|
|
break;
|
|
case U14_DMA_CH6:
|
|
uha->sc_drq = 6;
|
|
break;
|
|
case U14_DMA_CH7:
|
|
uha->sc_drq = 7;
|
|
break;
|
|
default:
|
|
printf("illegal dma setting %x\n", config & U14_DMA_MASK);
|
|
return EIO;
|
|
}
|
|
break;
|
|
}
|
|
|
|
switch (config & U14_IRQ_MASK) {
|
|
case U14_IRQ10:
|
|
uha->sc_irq = 10;
|
|
break;
|
|
case U14_IRQ11:
|
|
uha->sc_irq = 11;
|
|
break;
|
|
case U14_IRQ14:
|
|
uha->sc_irq = 14;
|
|
break;
|
|
case U14_IRQ15:
|
|
uha->sc_irq = 15;
|
|
break;
|
|
default:
|
|
printf("illegal int setting %x\n", config & U14_IRQ_MASK);
|
|
return EIO;
|
|
}
|
|
|
|
/* who are we on the scsi bus */
|
|
uha->uha_scsi_dev = config & U14_HOSTID_MASK;
|
|
|
|
outb(iobase + U14_LINT, U14_ASRST);
|
|
|
|
while (--resetcount) {
|
|
if (inb(iobase + U14_LINT))
|
|
break;
|
|
delay(1000); /* 1 mSec per loop */
|
|
}
|
|
if (!resetcount) {
|
|
printf("%s: board timed out during reset\n",
|
|
uha->sc_dev.dv_xname);
|
|
return ENXIO;
|
|
}
|
|
|
|
/* Save function pointers for later use. */
|
|
uha->send_mbox = u14_send_mbox;
|
|
uha->abort = u14_abort;
|
|
uha->poll = u14_poll;
|
|
uha->intr = u14intr;
|
|
uha->init = u14_init;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
u24_find(uha, ia)
|
|
struct uha_softc *uha;
|
|
struct isa_attach_args *ia;
|
|
{
|
|
static int uha_slot = 0;
|
|
int iobase;
|
|
u_short vendor, model;
|
|
u_char config0, config1, config2;
|
|
u_char irq_ch, uha_id;
|
|
int resetcount = 4000; /* 4 secs? */
|
|
|
|
if (ia->ia_iobase != IOBASEUNK)
|
|
return ENXIO;
|
|
|
|
while (uha_slot < 15) {
|
|
uha_slot++;
|
|
iobase = 0x1000 * uha_slot;
|
|
|
|
vendor = htons(inw(iobase + EISA_VENDOR));
|
|
if (vendor != 0x5663) /* `USC' */
|
|
continue;
|
|
|
|
model = htons(inw(iobase + EISA_MODEL));
|
|
if ((model & 0xfff0) != 0x0240) {
|
|
#ifndef trusted
|
|
printf("u24_find: ignoring model %04x\n", model);
|
|
#endif
|
|
continue;
|
|
}
|
|
|
|
#if 0
|
|
outb(iobase + EISA_CONTROL, EISA_ENABLE | EISA_RESET);
|
|
delay(10);
|
|
outb(iobase + EISA_CONTROL, EISA_ENABLE);
|
|
/* Wait for reset? */
|
|
delay(1000);
|
|
#endif
|
|
|
|
config0 = inb(iobase + U24_CONFIG);
|
|
config1 = inb(iobase + U24_CONFIG + 1);
|
|
config2 = inb(iobase + U24_CONFIG + 2);
|
|
if ((config0 & U24_MAGIC1) == 0 ||
|
|
(config1 & U24_MAGIC2) == 0)
|
|
continue;
|
|
|
|
irq_ch = config0 & U24_IRQ_MASK;
|
|
uha_id = config2 & U24_HOSTID_MASK;
|
|
|
|
uha->sc_drq = DRQUNK;
|
|
|
|
switch (irq_ch) {
|
|
case U24_IRQ10:
|
|
uha->sc_irq = 10;
|
|
break;
|
|
case U24_IRQ11:
|
|
uha->sc_irq = 11;
|
|
break;
|
|
case U24_IRQ14:
|
|
uha->sc_irq = 14;
|
|
break;
|
|
case U24_IRQ15:
|
|
uha->sc_irq = 15;
|
|
break;
|
|
default:
|
|
printf("illegal int setting %x\n", irq_ch);
|
|
continue;
|
|
}
|
|
|
|
/* who are we on the scsi bus */
|
|
uha->uha_scsi_dev = uha_id;
|
|
|
|
outb(iobase + U24_LINT, U24_ASRST);
|
|
|
|
while (--resetcount) {
|
|
if (inb(iobase + U24_LINT))
|
|
break;
|
|
delay(1000); /* 1 mSec per loop */
|
|
}
|
|
if (!resetcount) {
|
|
printf("%s: board timed out during reset\n",
|
|
uha->sc_dev.dv_xname);
|
|
continue;
|
|
}
|
|
|
|
/* Save function pointers for later use. */
|
|
uha->send_mbox = u24_send_mbox;
|
|
uha->abort = u24_abort;
|
|
uha->poll = u24_poll;
|
|
uha->intr = u24intr;
|
|
uha->init = u24_init;
|
|
|
|
return 0;
|
|
}
|
|
|
|
return ENXIO;
|
|
}
|
|
|
|
void
|
|
u14_init(uha)
|
|
struct uha_softc *uha;
|
|
{
|
|
int iobase = uha->sc_iobase;
|
|
|
|
/* make sure interrupts are enabled */
|
|
outb(iobase + U14_SMASK,
|
|
UHA_ENSINT | UHA_EN_ABORT_COMPLETE | UHA_ENICM);
|
|
}
|
|
|
|
void
|
|
u24_init(uha)
|
|
struct uha_softc *uha;
|
|
{
|
|
int iobase = uha->sc_iobase;
|
|
|
|
/* free OGM and ICM */
|
|
outb(iobase + U24_OGMCMD, 0);
|
|
outb(iobase + U24_ICMCMD, 0);
|
|
/* make sure interrupts are enabled */
|
|
outb(iobase + U24_SMASK, 0xc2); /* XXXX */
|
|
}
|
|
|
|
void
|
|
uhaminphys(bp)
|
|
struct buf *bp;
|
|
{
|
|
|
|
if (bp->b_bcount > ((UHA_NSEG - 1) << PGSHIFT))
|
|
bp->b_bcount = ((UHA_NSEG - 1) << PGSHIFT);
|
|
}
|
|
|
|
/*
|
|
* start a scsi operation given the command and the data address. Also
|
|
* needs the unit, target and lu.
|
|
*/
|
|
int
|
|
uha_scsi_cmd(xs)
|
|
struct scsi_xfer *xs;
|
|
{
|
|
struct scsi_link *sc_link = xs->sc_link;
|
|
struct uha_softc *uha = sc_link->adapter_softc;
|
|
struct uha_mscp *mscp;
|
|
struct uha_dma_seg *sg;
|
|
int seg; /* scatter gather seg being worked on */
|
|
u_long thiskv, thisphys, nextphys;
|
|
int bytes_this_seg, bytes_this_page, datalen, flags;
|
|
struct iovec *iovp;
|
|
int s;
|
|
|
|
SC_DEBUG(sc_link, SDEV_DB2, ("uha_scsi_cmd\n"));
|
|
/*
|
|
* get a mscp (mbox-out) to use. If the transfer
|
|
* is from a buf (possibly from interrupt time)
|
|
* then we can't allow it to sleep
|
|
*/
|
|
flags = xs->flags;
|
|
if ((flags & (ITSDONE|INUSE)) != INUSE) {
|
|
printf("%s: done or not in use?\n", uha->sc_dev.dv_xname);
|
|
xs->flags &= ~ITSDONE;
|
|
xs->flags |= INUSE;
|
|
}
|
|
if ((mscp = uha_get_mscp(uha, flags)) == NULL) {
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
return TRY_AGAIN_LATER;
|
|
}
|
|
mscp->flags = MSCP_ACTIVE;
|
|
mscp->xs = xs;
|
|
|
|
/*
|
|
* Put all the arguments for the xfer in the mscp
|
|
*/
|
|
if (flags & SCSI_RESET) {
|
|
mscp->opcode = UHA_SDR;
|
|
mscp->ca = 0x01;
|
|
} else {
|
|
mscp->opcode = UHA_TSP;
|
|
/* XXX Not for tapes. */
|
|
mscp->ca = 0x01;
|
|
}
|
|
mscp->xdir = UHA_SDET;
|
|
mscp->dcn = 0x00;
|
|
mscp->chan = 0x00;
|
|
mscp->target = sc_link->target;
|
|
mscp->lun = sc_link->lun;
|
|
mscp->scsi_cmd_length = xs->cmdlen;
|
|
mscp->sense_ptr = KVTOPHYS(&mscp->mscp_sense);
|
|
mscp->req_sense_length = sizeof(mscp->mscp_sense);
|
|
mscp->host_stat = 0x00;
|
|
mscp->target_stat = 0x00;
|
|
|
|
if (xs->datalen && (flags & SCSI_RESET) == 0) {
|
|
mscp->data_addr = KVTOPHYS(mscp->uha_dma);
|
|
sg = mscp->uha_dma;
|
|
seg = 0;
|
|
mscp->sgth = 0x01;
|
|
#ifdef TFS
|
|
if (flags & SCSI_DATA_UIO) {
|
|
iovp = ((struct uio *) xs->data)->uio_iov;
|
|
datalen = ((struct uio *) xs->data)->uio_iovcnt;
|
|
xs->datalen = 0;
|
|
while (datalen && seg < UHA_NSEG) {
|
|
sg->seg_addr = (physaddr)iovp->iov_base;
|
|
sg->seg_len = iovp->iov_len;
|
|
xs->datalen += iovp->iov_len;
|
|
SC_DEBUGN(sc_link, SDEV_DB4, ("(0x%x@0x%x)",
|
|
iovp->iov_len, iovp->iov_base));
|
|
sg++;
|
|
iovp++;
|
|
seg++;
|
|
datalen--;
|
|
}
|
|
} else
|
|
#endif /*TFS */
|
|
{
|
|
/*
|
|
* Set up the scatter gather block
|
|
*/
|
|
SC_DEBUG(sc_link, SDEV_DB4,
|
|
("%d @0x%x:- ", xs->datalen, xs->data));
|
|
datalen = xs->datalen;
|
|
thiskv = (int) xs->data;
|
|
thisphys = KVTOPHYS(thiskv);
|
|
|
|
while (datalen && seg < UHA_NSEG) {
|
|
bytes_this_seg = 0;
|
|
|
|
/* put in the base address */
|
|
sg->seg_addr = thisphys;
|
|
|
|
SC_DEBUGN(sc_link, SDEV_DB4, ("0x%x", thisphys));
|
|
|
|
/* do it at least once */
|
|
nextphys = thisphys;
|
|
while (datalen && thisphys == nextphys) {
|
|
/*
|
|
* This page is contiguous (physically)
|
|
* with the the last, just extend the
|
|
* length
|
|
*/
|
|
/* how far to the end of the page */
|
|
nextphys = (thisphys & ~PGOFSET) + NBPG;
|
|
bytes_this_page = nextphys - thisphys;
|
|
/**** or the data ****/
|
|
bytes_this_page = min(bytes_this_page,
|
|
datalen);
|
|
bytes_this_seg += bytes_this_page;
|
|
datalen -= bytes_this_page;
|
|
|
|
/* get more ready for the next page */
|
|
thiskv = (thiskv & ~PGOFSET) + NBPG;
|
|
if (datalen)
|
|
thisphys = KVTOPHYS(thiskv);
|
|
}
|
|
/*
|
|
* next page isn't contiguous, finish the seg
|
|
*/
|
|
SC_DEBUGN(sc_link, SDEV_DB4,
|
|
("(0x%x)", bytes_this_seg));
|
|
sg->seg_len = bytes_this_seg;
|
|
sg++;
|
|
seg++;
|
|
}
|
|
}
|
|
/* end of iov/kv decision */
|
|
mscp->data_length = xs->datalen;
|
|
mscp->sg_num = seg;
|
|
SC_DEBUGN(sc_link, SDEV_DB4, ("\n"));
|
|
if (datalen) {
|
|
/*
|
|
* there's still data, must have run out of segs!
|
|
*/
|
|
printf("%s: uha_scsi_cmd, more than %d dma segs\n",
|
|
uha->sc_dev.dv_xname, UHA_NSEG);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
uha_free_mscp(uha, mscp, flags);
|
|
return COMPLETE;
|
|
}
|
|
} else { /* No data xfer, use non S/G values */
|
|
mscp->data_addr = (physaddr)0;
|
|
mscp->data_length = 0;
|
|
mscp->sgth = 0x00;
|
|
mscp->sg_num = 0;
|
|
}
|
|
mscp->link_id = 0;
|
|
mscp->link_addr = (physaddr)0;
|
|
|
|
/*
|
|
* Put the scsi command in the mscp and start it
|
|
*/
|
|
if ((flags & SCSI_RESET) == 0)
|
|
bcopy(xs->cmd, &mscp->scsi_cmd, mscp->scsi_cmd_length);
|
|
|
|
s = splbio();
|
|
|
|
(uha->send_mbox)(uha, mscp);
|
|
|
|
/*
|
|
* Usually return SUCCESSFULLY QUEUED
|
|
*/
|
|
if ((flags & SCSI_POLL) == 0) {
|
|
timeout(uha_timeout, mscp, (xs->timeout * hz) / 1000);
|
|
splx(s);
|
|
return SUCCESSFULLY_QUEUED;
|
|
}
|
|
|
|
splx(s);
|
|
|
|
/*
|
|
* If we can't use interrupts, poll on completion
|
|
*/
|
|
if ((uha->poll)(uha, xs, xs->timeout)) {
|
|
uha_timeout(mscp);
|
|
if (!(uha->abort)(uha, mscp))
|
|
uha_timeout(mscp);
|
|
}
|
|
return COMPLETE;
|
|
}
|
|
|
|
void
|
|
uha_timeout(arg)
|
|
void *arg;
|
|
{
|
|
struct uha_mscp *mscp = arg;
|
|
struct scsi_xfer *xs = mscp->xs;
|
|
struct scsi_link *sc_link = xs->sc_link;
|
|
struct uha_softc *uha = sc_link->adapter_softc;
|
|
int s;
|
|
|
|
sc_print_addr(sc_link);
|
|
printf("timed out");
|
|
|
|
s = splbio();
|
|
|
|
if (!(uha->abort)(uha, mscp) || (mscp->flags == MSCP_ABORTED)) {
|
|
/* abort timed out */
|
|
printf(" AGAIN\n");
|
|
mscp->xs->retries = 0; /* I MEAN IT ! */
|
|
mscp->host_stat = UHA_SBUS_TIMEOUT;
|
|
uha_done(uha, mscp);
|
|
} else {
|
|
/* abort the operation that has timed out */
|
|
printf("\n");
|
|
mscp->flags = MSCP_ABORTED;
|
|
/* 2 secs for the abort */
|
|
if ((xs->flags & SCSI_POLL) == 0)
|
|
timeout(uha_timeout, mscp, 2 * hz);
|
|
}
|
|
|
|
splx(s);
|
|
}
|
|
|
|
#ifdef UHADEBUG
|
|
void
|
|
uha_print_mscp(mscp)
|
|
struct uha_mscp *mscp;
|
|
{
|
|
|
|
printf("mscp:%x op:%x cmdlen:%d senlen:%d\n",
|
|
mscp, mscp->opcode, mscp->cdblen, mscp->senselen);
|
|
printf(" sg:%d sgnum:%x datlen:%d hstat:%x tstat:%x flags:%x\n",
|
|
mscp->sgth, mscp->sg_num, mscp->datalen, mscp->host_stat,
|
|
mscp->target_stat, mscp->flags);
|
|
show_scsi_cmd(mscp->xs);
|
|
}
|
|
|
|
void
|
|
uha_print_active_mscp(uha)
|
|
struct uha_softc *uha;
|
|
{
|
|
struct uha_mscp *mscp;
|
|
int i = 0;
|
|
|
|
while (i++ < MSCP_HASH_SIZE) {
|
|
mscp = uha->mscphash[i];
|
|
while (mscp) {
|
|
if (mscp->flags != MSCP_FREE)
|
|
uha_print_mscp(mscp);
|
|
mscp = mscp->nexthash;
|
|
}
|
|
}
|
|
}
|
|
#endif /*UHADEBUG */
|