NetBSD/sys/arch/hp700/stand/xxboot
skrll 17843a3034 Add -mdisable-fpregs which makes this work again with gcc4. This needs
revisiting.
2006-09-28 21:17:01 +00:00
..
Makefile Add -mdisable-fpregs which makes this work again with gcc4. This needs 2006-09-28 21:17:01 +00:00
README.ipl
iplsum.c
main.c Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete. 2005-12-24 20:06:46 +00:00
milli_tiny.S
readufs.c
readufs.h
readufs_ffs.c
readufs_lfs.c
start.S

README.ipl

#	$NetBSD: README.ipl,v 1.2 2005/12/11 12:17:25 christos Exp $

Coding note:

	In order to make this relocatable, you must follow following
	restrictions:

	1. Do not place any objects in text segment
	1.1. For compiler,
		(1) do not declare or define any objects to be placed in
		    text segment, that is, do not use ``const'' keyword
		    (but declaring a pointer to const is probably OK),

		(2) make sure string literals, if any, are placed in data
		    segment (use traditional compiler),

		(3) avoid initialization of automatic objects (non-static
		    function-local variables) of aggregate types (arrays,
		    structs and unions), which may implicitly emits
		    constant data.

	     In summary, do not use ANSI extension.  Use traditional C. :-)

	1.2. For linker, do not actually place objects in text segment.

	2. Do not use function pointers.


On-disk layout:

	We have 6.5KB for the primary boot.

	disk address
	start	 size
	000000	0000FC	LIF header
	0000FC	000104	unused
	000200	000194	disklabel (404 bytes for 16-partition label)
	000394	00006C	unused
	000400	000400	ipl part 2 (1KB)
	000800	000100	optional LIF directory
	000900	000100	unused
	000A00	000600	ipl part 3 (1.5KB)
	001000	001000	ipl part 1 (4KB)
	002000		(file system starts here)


On-memory layout on IPL startup:

	The firmware loads ipl part 1 on the memory, and executes it.

	address offset
	 start	 size
	000000	001000	ipl part 1
	001000	000A00	(not loaded yet)
			(bss section etc)
	x	001000	temporary disk buffer
	x+1000		stack


Then the IPL will load the rest of itself:

	ipl part 1 loads parts 2 and 3, then continues execution.

	address offset
	 start	 size
	000000	001000	ipl part 1
	001000	000400	ipl part 2
	001400	000600	ipl part 3
	001A00	xxxxxx	(bss section etc)