82ce0b1388
Voodoo5 or Banshee boards. So far it supports: - full acceleration in 8bit graphics mode - video mode switching - virtual consoles via vcons So far it hasn't been tested on anything else than macppc and even there it needs a hack to overload ofb. TODO: - test on i386 - don't hardcode video mode
303 lines
9.9 KiB
C
303 lines
9.9 KiB
C
/* $NetBSD: voodoofbreg.h,v 1.1 2006/04/11 16:11:07 macallan Exp $ */
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/*
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* Copyright 2005, 2006 by Michael Lorenz.
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*
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* Permission to use, copy, modify, distribute, and sell this software and
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* its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Kevin E. Martin not be
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* used in advertising or publicity pertaining to distribution of the
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* software without specific, written prior permission. Kevin E. Martin
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* makes no representations about the suitability of this software for any
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* purpose. It is provided "as is" without express or implied warranty.
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*
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* KEVIN E. MARTIN, RICKARD E. FAITH, AND TIAGO GONS DISCLAIM ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL THE
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* AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
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* ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*
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*/
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/*
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* stolen wholesale from Andreas Drewke's (andreas_dr@gmx.de) Voodoo3 driver
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* for BeOS
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*/
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#ifndef VOODOOFB_H
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#define VOODOOFB_H
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/* membase0 register offsets */
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#define STATUS 0x00
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#define PCIINIT0 0x04
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#define SIPMONITOR 0x08
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#define LFBMEMORYCONFIG 0x0c
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#define MISCINIT0 0x10
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#define MISCINIT1 0x14
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#define DRAMINIT0 0x18
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#define DRAMINIT1 0x1c
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#define AGPINIT 0x20
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#define TMUGBEINIT 0x24
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#define VGAINIT0 0x28
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#define VGAINIT1 0x2c
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#define DRAMCOMMAND 0x30
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#define DRAMDATA 0x34
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/* reserved 0x38 */
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/* reserved 0x3c */
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#define PLLCTRL0 0x40 /* video clock */
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#define PLLCTRL1 0x44 /* memory clock */
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/* PLL ctrl 0 and 1 registers:
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* freq = (( N + 2 ) * Fref) / (( M + 2 ) * ( 2^K ))
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* with Fref usually 14.31818MHz
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* N: REG & 0xff00
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* M: REG & 0xfc
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* K: REG & 0x3
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*/
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#define PLLCTRL2 0x48 /* test modes for AGP */
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#define DACMODE 0x4c
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#define DAC_MODE_1_2 0x1 /* DAC in 2:1 mode. 1:1 mode when 0 */
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#define DAC_MODE_LOCK_VSYNC 0x02 /* lock vsync */
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#define DAC_MODE_VSYNC_VAL 0x04 /* vsync output when locked */
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#define DAC_MODE_LOCK_HSYNC 0x08 /* lock hsync */
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#define DAC_MODE_HSYNC_VAL 0x10 /* hsync output when locked */
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#define DACADDR 0x50
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#define DACDATA 0x54
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#define RGBMAXDELTA 0x58
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#define VIDPROCCFG 0x5c
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#define HWCURPATADDR 0x60
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#define HWCURLOC 0x64
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#define HWCURC0 0x68
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#define HWCURC1 0x6c
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#define VIDINFORMAT 0x70
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#define VIDINSTATUS 0x74
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#define VIDSERPARPORT 0x78
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/* i2c stuff */
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#define VSP_TVOUT_RESET 0x80000000 /* 0 forces TVout reset */
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#define VSP_GPIO2_IN 0x40000000
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#define VSP_GPIO1_OUT 0x20000000
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#define VSP_VMI_RESET_N 0x10000000 /* 0 forces a VMI reset */
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#define VSP_SDA1_IN 0x08000000 /* i2c bus on the feature connector */
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#define VSP_SCL1_IN 0x04000000
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#define VSP_SDA1_OUT 0x02000000
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#define VSP_SCL1_OUT 0x01000000
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#define VSP_ENABLE_IIC1 0x00800000 /* 1 enables I2C bus 1 */
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#define VSP_SDA0_IN 0x00400000 /* i2c bus on the monitor connector */
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#define VSP_SCL0_IN 0x00200000
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#define VSP_SDA0_OUT 0x00100000
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#define VSP_SCL0_OUT 0x00080000
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#define VSP_ENABLE_IIC0 0x00040000 /* 1 enables I2C bus 0 */
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#define VSP_VMI_ADDRESS 0x0003c000 /* mask */
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#define VSP_VMI_DATA 0x00003fc0 /* mask */
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#define VSP_VMI_DISABLE 0x00000020 /* 0 enables VMI output */
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#define VSP_VMI_RDY_N 0x00000010
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#define VSP_RW_N 0x00000008
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#define VSP_DS_N 0x00000004
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#define VSP_CS_N 0x00000002
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#define VSP_HOST_ENABLE 0x00000001 /* 1 enables VMI host control*/
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#define VIDINXDELTA 0x7c
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#define VIDININITERR 0x80
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#define VIDINYDELTA 0x84
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#define VIDPIXBUFTHOLD 0x88
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#define VIDCHRMIN 0x8c
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#define VIDCHRMAX 0x90
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#define VIDCURLIN 0x94
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#define VIDSCREENSIZE 0x98
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#define VIDOVRSTARTCRD 0x9c
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#define VIDOVRENDCRD 0xa0
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#define VIDOVRDUDX 0xa4
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#define VIDOVRDUDXOFF 0xa8
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#define VIDOVRDVDY 0xac
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/* ... */
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#define VIDOVRDVDYOFF 0xe0
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#define VIDDESKSTART 0xe4
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#define VIDDESKSTRIDE 0xe8
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/*
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* desktop and overlay strides in pixels
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* desktop stride: reg & 0x00007fff
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* overlay stride: reg & 0x7fff0000
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*/
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#define VIDINADDR0 0xec
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#define VIDINADDR1 0xf0
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#define VIDINADDR2 0xf4
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#define VIDINSTRIDE 0xf8
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#define VIDCUROVRSTART 0xfc
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#define VIDOVERLAYSTARTCOORDS 0x9c
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#define VIDOVERLAYENDSCREENCOORDS 0xa0
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#define VIDOVERLAYDUDX 0xa4
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#define VIDOVERLAYDUDXOFFSETSRCWIDTH 0xa8
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#define VIDOVERLAYDVDY 0xac
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#define VIDOVERLAYDVDYOFFSET 0xe0
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#define SST_3D_OFFSET 0x200000
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#define SST_3D_LEFTOVERLAYBUF SST_3D_OFFSET+0x250
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#define V3_STATUS (0x00100000)
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#define INTCTRL (0x00100000 + 0x04)
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#define CLIP0MIN (0x00100000 + 0x08)
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#define CLIP0MAX (0x00100000 + 0x0c)
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#define DSTBASE (0x00100000 + 0x10)
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#define DSTFORMAT (0x00100000 + 0x14)
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#define SRCBASE (0x00100000 + 0x34)
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#define COMMANDEXTRA_2D (0x00100000 + 0x38)
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#define CLIP1MIN (0x00100000 + 0x4c)
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#define CLIP1MAX (0x00100000 + 0x50)
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#define SRCFORMAT (0x00100000 + 0x54)
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#define SRCSIZE (0x00100000 + 0x58)
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#define SRCXY (0x00100000 + 0x5c)
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#define COLORBACK (0x00100000 + 0x60)
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#define COLORFORE (0x00100000 + 0x64)
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#define DSTSIZE (0x00100000 + 0x68)
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#define DSTXY (0x00100000 + 0x6c)
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#define COMMAND_2D (0x00100000 + 0x70)
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/*
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* ROP0 : reg & 0xff000000
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* select clip 1 : 0x00800000
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* Y pattern offset : 0x00700000
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* X pattern offset : 0x000e0000
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* mono transparent : 0x00010000
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* pattern expand : 0x00002000
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* stipple line : 0x00001000
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* adjust dstx : 0x00000800 xdst will contain xdst+xwidth
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* adjust dsty : 0x00000400
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* line reversible : 0x00000200
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* start now : 0x00000100 run immediately instead of wait for launch area
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* command : 0x0000000f
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*/
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#define LAUNCH_2D (0x00100000 + 0x80)
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#define COMMAND_3D (0x00200000 + 0x120)
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/* register bitfields (not all, only as needed) */
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#define BIT(x) (1UL << (x))
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/* COMMAND_2D reg. values */
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#define ROP_COPY 0xcc // src
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#define ROP_INVERT 0x55 // NOT dst
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#define ROP_XOR 0x66 // src XOR dst
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#define AUTOINC_DSTX BIT(10)
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#define AUTOINC_DSTY BIT(11)
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#define COMMAND_2D_FILLRECT 0x05
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#define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen
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#define COMMAND_2D_H2S_BITBLT 0x03 // host to screen
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#define SST_2D_GO BIT(8)
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#define COMMAND_3D_NOP 0x00
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#define STATUS_RETRACE BIT(6)
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#define STATUS_BUSY BIT(9)
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#define MISCINIT1_CLUT_INV BIT(0)
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#define MISCINIT1_2DBLOCK_DIS BIT(15)
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#define DRAMINIT0_SGRAM_NUM BIT(26)
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#define DRAMINIT0_SGRAM_TYPE BIT(27)
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#define DRAMINIT1_MEM_SDRAM BIT(30)
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#define VGAINIT0_VGA_DISABLE BIT(0)
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#define VGAINIT0_EXT_TIMING BIT(1)
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#define VGAINIT0_8BIT_DAC BIT(2)
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#define VGAINIT0_EXT_ENABLE BIT(6)
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#define VGAINIT0_WAKEUP_3C3 BIT(8)
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#define VGAINIT0_LEGACY_DISABLE BIT(9)
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#define VGAINIT0_ALT_READBACK BIT(10)
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#define VGAINIT0_FAST_BLINK BIT(11)
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#define VGAINIT0_EXTSHIFTOUT BIT(12)
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#define VGAINIT0_DECODE_3C6 BIT(13)
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#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22)
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#define VGAINIT1_MASK 0x1fffff
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#define VIDCFG_VIDPROC_ENABLE BIT(0)
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#define VIDCFG_CURS_X11 BIT(1)
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#define VIDCFG_HALF_MODE BIT(4)
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#define VIDCFG_CHROMA_KEY BIT(5)
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#define VIDCFG_CHROMA_KEY_INVERSION BIT(6)
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#define VIDCFG_DESK_ENABLE BIT(7)
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#define VIDCFG_OVL_ENABLE BIT(8)
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#define VIDCFG_OVL_NOT_VIDEO_IN BIT(9)
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#define VIDCFG_CLUT_BYPASS BIT(10)
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#define VIDCFG_OVL_CLUT_BYPASS BIT(11)
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#define VIDCFG_OVL_HSCALE BIT(14)
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#define VIDCFG_OVL_VSCALE BIT(15)
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#define VIDCFG_OVL_FILTER_SHIFT 16
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#define VIDCFG_OVL_FILTER_POINT 0
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#define VIDCFG_OVL_FILTER_2X2 1
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#define VIDCFG_OVL_FILTER_4X4 2
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#define VIDCFG_OVL_FILTER_BILIN 3
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#define VIDCFG_OVL_FMT_SHIFT 21
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#define VIDCFG_OVL_FMT_RGB565 1
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#define VIDCFG_OVL_FMT_YUV411 4
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#define VIDCFG_OVL_FMT_YUYV422 5
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#define VIDCFG_OVL_FMT_UYVY422 6
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#define VIDCFG_OVL_FMT_RGB565_DITHER 7
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#define VIDCFG_2X BIT(26)
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#define VIDCFG_HWCURSOR_ENABLE BIT(27)
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#define VIDCFG_PIXFMT_SHIFT 18
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#define DACMODE_2X BIT(0)
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#define VIDPROCCFGMASK 0xa2e3eb6c
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#define VIDPROCDEFAULT 134481025
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#define VIDCHROMAMIN 0x8c
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#define VIDCHROMAMAX 0x90
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#define VIDDESKTOPOVERLAYSTRIDE 0xe8
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#define CRTC_INDEX 0x3d4
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#define CRTC_DATA 0x3d5
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#define SEQ_INDEX 0x3c4
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#define SEQ_DATA 0x3c5
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#define MISC_W 0x3c2
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#define GRA_INDEX 0x3ce
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#define GRA_DATA 0x3cf
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#define ATT_IW 0x3c0
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#define IS1_R 0x3da
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/* CRTC registers */
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#define CRTC_HTOTAL 0 /* lower 8 bit of display width in chars -5 */
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#define CRTC_HDISP_ENABLE_END 1 /* no. of visible chars per line -1 */
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#define CRTC_HDISP_BLANK_START 2 /* characters per line before blanking */
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#define CRTC_HDISP_BLANK_END 3 /* no. o blank chars, skew, compatibility read */
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#define CRTC_HDISP_SYNC_START 4 /* character count when sync becomes active */
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#define CRTC_HDISP_SYNC_END 5 /* sync end, skew, blank end */
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#define CRTC_VDISP_TOTAL 6 /* number of scanlines -2 */
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#define CRTC_OVERFLOW 7 /* various overflow bits */
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#define CRTC_PRESET_ROW_SCAN 8 /* horizontal soft scrolling in character mode */
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#define CRTC_MAX_SCAN_LINE 9 /* scanlines per character */
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#define CRTC_CURSOR_START 10 /* text cursor start line */
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#define CRTC_CURSOR_END 11 /* text cursor end line */
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#define CRTC_SCREEN_START_HIGH 12 /* offset in display memory */
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#define CRTC_SCREEN_START_LOW 13
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#define CRTC_CURSOR_POS_HIGH 14
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#define CRTC_CURSOR_POS_LOW 15
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#define CRTC_VSYNC_START 16
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#define CRTC_VSYNC_END 17
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#define CRTC_VDISP_ENABLE_END 18
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#define CRTC_OFFSET 19 /* textmode stride */
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#define CRTC_UNDERLINE_LOC 20
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#define CRTC_VDISP_BLANK_START 21
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#define CRTC_VDISP_BLANK_END 22
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#define CRTC_MODE_CONTROL 23
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#define CRTC_LINE_COMPARE 24
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#define CRTC_HDISP_EXT 26
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#define CRTC_VDISP_EXT 27
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#define CRTC_PCI_READBACK 28
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#define CRTC_SCRATCH_1 29
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#define CRTC_SCRATCH_2 30
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#define CRTC_SCRATCH_3 31
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#define CRTC_VDISP_PRELOAD_LOW 32
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#define CRTC_VDISP_PRELOAD_HIGH 33
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#define CRTC_LATCHES_READBACK 34
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#define CRTC_ATTR_READBACK 36 /* bit 7 = 0 : attr. ctrlr reads index, 1 -> data */
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#define CRTC_ATTR_INDEX 38
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#endif
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