381 lines
11 KiB
C
381 lines
11 KiB
C
/* $NetBSD: mpt_pci.c,v 1.10 2006/11/16 01:33:09 christos Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* mpt_pci.c:
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*
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* NetBSD PCI-specific routines for LSI Fusion adapters.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: mpt_pci.c,v 1.10 2006/11/16 01:33:09 christos Exp $");
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#include <dev/ic/mpt.h> /* pulls in all headers */
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#define MPT_PCI_MMBA (PCI_MAPREG_START+0x04)
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struct mpt_pci_softc {
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mpt_softc_t sc_mpt;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_tag;
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void *sc_ih;
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/* Saved volatile PCI configuration registers. */
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pcireg_t sc_pci_csr;
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pcireg_t sc_pci_bhlc;
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pcireg_t sc_pci_io_bar;
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pcireg_t sc_pci_mem0_bar[2];
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pcireg_t sc_pci_mem1_bar[2];
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pcireg_t sc_pci_rom_bar;
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pcireg_t sc_pci_int;
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pcireg_t sc_pci_pmcsr;
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};
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static void mpt_pci_link_peer(mpt_softc_t *);
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static void mpt_pci_read_config_regs(mpt_softc_t *);
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static void mpt_pci_set_config_regs(mpt_softc_t *);
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#define MPP_F_FC 0x01 /* Fibre Channel adapter */
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#define MPP_F_DUAL 0x02 /* Dual port adapter */
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static const struct mpt_pci_product {
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pci_vendor_id_t mpp_vendor;
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pci_product_id_t mpp_product;
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int mpp_flags;
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const char *mpp_name;
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} mpt_pci_products[] = {
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1030,
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MPP_F_DUAL,
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"LSI Logic 53c1030 Ultra320 SCSI" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC909,
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MPP_F_FC,
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"LSI Logic FC909 FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC909A,
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MPP_F_FC,
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"LSI Logic FC909A FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC929,
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MPP_F_FC | MPP_F_DUAL,
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"LSI Logic FC929 FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC929_1,
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MPP_F_FC | MPP_F_DUAL,
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"LSI Logic FC929 FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC919,
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MPP_F_FC,
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"LSI Logic FC919 FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC919_1,
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MPP_F_FC,
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"LSI Logic FC919 FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC929X,
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MPP_F_FC | MPP_F_DUAL,
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"LSI Logic FC929X FC Adapter" },
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{ PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC919X,
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MPP_F_FC,
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"LSI Logic FC919X FC Adapter" },
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{ 0, 0,
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0,
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NULL },
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};
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static const struct mpt_pci_product *
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mpt_pci_lookup(const struct pci_attach_args *pa)
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{
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const struct mpt_pci_product *mpp;
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for (mpp = mpt_pci_products; mpp->mpp_name != NULL; mpp++) {
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if (PCI_VENDOR(pa->pa_id) == mpp->mpp_vendor &&
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PCI_PRODUCT(pa->pa_id) == mpp->mpp_product)
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return (mpp);
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}
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return (NULL);
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}
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static int
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mpt_pci_match(struct device *parent, struct cfdata *cf,
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void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (mpt_pci_lookup(pa) != NULL)
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return (1);
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return (0);
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}
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static void
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mpt_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct mpt_pci_softc *psc = (void *) self;
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mpt_softc_t *mpt = &psc->sc_mpt;
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struct pci_attach_args *pa = aux;
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const struct mpt_pci_product *mpp;
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pci_intr_handle_t ih;
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const char *intrstr;
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pcireg_t reg, memtype;
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bus_space_tag_t memt;
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bus_space_handle_t memh;
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int memh_valid;
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mpp = mpt_pci_lookup(pa);
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if (mpp == NULL) {
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printf("\n");
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panic("mpt_pci_attach");
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}
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if (mpp->mpp_flags & MPP_F_FC) {
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mpt->is_fc = 1;
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aprint_naive(": Fibre Channel controller\n");
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} else
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aprint_naive(": SCSI controller\n");
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aprint_normal(": %s\n", mpp->mpp_name);
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psc->sc_pc = pa->pa_pc;
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psc->sc_tag = pa->pa_tag;
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mpt->sc_dmat = pa->pa_dmat;
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mpt->sc_set_config_regs = mpt_pci_set_config_regs;
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/*
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* Map the device.
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*/
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, MPT_PCI_MMBA);
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switch (memtype) {
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case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
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memh_valid = (pci_mapreg_map(pa, MPT_PCI_MMBA,
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memtype, 0, &memt, &memh, NULL, NULL) == 0);
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break;
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default:
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memh_valid = 0;
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}
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if (memh_valid) {
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mpt->sc_st = memt;
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mpt->sc_sh = memh;
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} else {
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aprint_error("%s: unable to map device registers\n",
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mpt->sc_dev.dv_xname);
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return;
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}
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/*
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* Make sure the PCI command register is properly configured.
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*/
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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reg |= PCI_COMMAND_MASTER_ENABLE;
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/* XXX PCI_COMMAND_INVALIDATE_ENABLE */
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/* XXX PCI_COMMAND_PARITY_ENABLE */
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/* XXX PCI_COMMAND_SERR_ENABLE */
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
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/*
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* Ensure that the ROM is diabled.
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*/
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM);
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reg &= ~1;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_ROM, reg);
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/*
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* Map and establish our interrupt.
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*/
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if (pci_intr_map(pa, &ih) != 0) {
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aprint_error("%s: unable to map interrupt\n",
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mpt->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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psc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, mpt_intr, mpt);
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if (psc->sc_ih == NULL) {
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aprint_error("%s: unable to establish interrupt",
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mpt->sc_dev.dv_xname);
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if (intrstr != NULL)
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aprint_normal(" at %s", intrstr);
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aprint_normal("\n");
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return;
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}
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aprint_normal("%s: interrupting at %s\n", mpt->sc_dev.dv_xname,
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intrstr);
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/* Disable interrupts on the part. */
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mpt_disable_ints(mpt);
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/* Allocate DMA memory. */
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if (mpt_dma_mem_alloc(mpt) != 0) {
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aprint_error("%s: unable to allocate DMA memory\n",
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mpt->sc_dev.dv_xname);
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return;
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}
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/*
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* Save the PCI config register values.
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*
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* Hard resets are known to screw up the BAR for diagnostic
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* memory accesses (Mem1).
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*
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* Using Mem1 is know to make the chip stop responding to
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* configuration cycles, so we need to save it now.
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*/
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mpt_pci_read_config_regs(mpt);
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/*
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* If we're a dual-port adapter, try to find our peer. We
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* need to fix his PCI config registers, too.
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*/
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if (mpp->mpp_flags & MPP_F_DUAL)
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mpt_pci_link_peer(mpt);
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/* Initialize the hardware. */
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if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
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/* Error message already printed. */
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return;
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}
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/* Attach to scsipi. */
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mpt_scsipi_attach(mpt);
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}
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CFATTACH_DECL(mpt_pci, sizeof(struct mpt_pci_softc),
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mpt_pci_match, mpt_pci_attach, NULL, NULL);
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/*
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* Find and remember our peer PCI function on a dual-port device.
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*/
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static void
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mpt_pci_link_peer(mpt_softc_t *mpt)
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{
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extern struct cfdriver mpt_cd;
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struct mpt_pci_softc *peer_psc, *psc = (void *) mpt;
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struct device *dev;
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int unit, b, d, f, peer_b, peer_d, peer_f;
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pci_decompose_tag(psc->sc_pc, psc->sc_tag, &b, &d, &f);
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for (unit = 0; unit < mpt_cd.cd_ndevs; unit++) {
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if (unit == device_unit(&mpt->sc_dev))
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continue;
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dev = device_lookup(&mpt_cd, unit);
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if (dev == NULL)
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continue;
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if (device_parent(&mpt->sc_dev) != device_parent(dev))
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continue;
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/*
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* If we have the same parent, we know the other one
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* is attached with mpt_pci.
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*/
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peer_psc = (void *) dev;
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if (peer_psc->sc_pc != psc->sc_pc)
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continue;
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pci_decompose_tag(peer_psc->sc_pc, peer_psc->sc_tag,
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&peer_b, &peer_d, &peer_f);
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if (peer_b == b && peer_d == d) {
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if (mpt->verbose)
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mpt_prt(mpt, "linking with peer: %s",
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peer_psc->sc_mpt.sc_dev.dv_xname);
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mpt->mpt2 = (mpt_softc_t *) peer_psc;
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peer_psc->sc_mpt.mpt2 = mpt;
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return;
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}
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}
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}
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/*
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* Save the volatile PCI configuration registers.
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*/
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static void
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mpt_pci_read_config_regs(mpt_softc_t *mpt)
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{
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struct mpt_pci_softc *psc = (void *) mpt;
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psc->sc_pci_csr = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_COMMAND_STATUS_REG);
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psc->sc_pci_bhlc = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_BHLC_REG);
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psc->sc_pci_io_bar = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_MAPREG_START);
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psc->sc_pci_mem0_bar[0] = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_MAPREG_START+0x04);
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psc->sc_pci_mem0_bar[1] = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_MAPREG_START+0x08);
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psc->sc_pci_mem1_bar[0] = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_MAPREG_START+0x0c);
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psc->sc_pci_mem1_bar[1] = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_MAPREG_START+0x10);
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psc->sc_pci_rom_bar = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_MAPREG_ROM);
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psc->sc_pci_int = pci_conf_read(psc->sc_pc, psc->sc_tag,
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PCI_INTERRUPT_REG);
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psc->sc_pci_pmcsr = pci_conf_read(psc->sc_pc, psc->sc_tag, 0x44);
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}
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/*
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* Restore the volatile PCI configuration registers.
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*/
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static void
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mpt_pci_set_config_regs(mpt_softc_t *mpt)
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{
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struct mpt_pci_softc *psc = (void *) mpt;
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_COMMAND_STATUS_REG,
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psc->sc_pci_csr);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_BHLC_REG,
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psc->sc_pci_bhlc);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_MAPREG_START,
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psc->sc_pci_io_bar);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_MAPREG_START+0x04,
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psc->sc_pci_mem0_bar[0]);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_MAPREG_START+0x08,
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psc->sc_pci_mem0_bar[1]);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_MAPREG_START+0x0c,
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psc->sc_pci_mem1_bar[0]);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_MAPREG_START+0x10,
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psc->sc_pci_mem1_bar[1]);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_MAPREG_ROM,
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psc->sc_pci_rom_bar);
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pci_conf_write(psc->sc_pc, psc->sc_tag, PCI_INTERRUPT_REG,
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psc->sc_pci_int);
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pci_conf_write(psc->sc_pc, psc->sc_tag, 0x44, psc->sc_pci_pmcsr);
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}
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