234 lines
7.3 KiB
C
234 lines
7.3 KiB
C
/* $NetBSD: iomdreg.h,v 1.3 2003/12/31 14:40:32 bjh21 Exp $ */
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/*
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* Copyright (c) 1994-1997 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* iomd.h
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*
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* IOMD registers
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*
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* Created : 18/09/94
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*
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* Based on kate/display/iomd.h
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*/
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#define IOMD_HW_BASE 0x03200000
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#define IOMD_BASE 0xf6000000
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#define IOMD_IOCR 0x00000000
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#define IOMD_KBDDAT 0x00000001
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#define IOMD_KBDCR 0x00000002
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#define IOMD_IOLINES 0x00000003 /* ARM7500FE */
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#define IOMD_IRQSTA 0x00000004
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#define IOMD_IRQRQA 0x00000005
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#define IOMD_IRQMSKA 0x00000006
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#define IOMD_SUSMODE 0x00000007 /* ARM7500 */
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#define IOMD_IRQSTB 0x00000008
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#define IOMD_IRQRQB 0x00000009
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#define IOMD_IRQMSKB 0x0000000a
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#define IOMD_STOPMODE 0x0000000b /* ARM7500 */
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#define IOMD_FIQST 0x0000000c
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#define IOMD_FIQRQ 0x0000000d
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#define IOMD_FIQMSK 0x0000000e
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#define IOMD_CLKCTL 0x0000000f /* ARM7500 */
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#define IOMD_T0LOW 0x00000010
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#define IOMD_T0HIGH 0x00000011
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#define IOMD_T0GO 0x00000012
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#define IOMD_T0LATCH 0x00000013
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#define IOMD_T1LOW 0x00000014
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#define IOMD_T1HIGH 0x00000015
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#define IOMD_T1GO 0x00000016
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#define IOMD_T1LATCH 0x00000017
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/*
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* For ARM7500, it's not really a IOMD device.
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*/
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#define IOMD_IRQSTC 0x00000018 /* ARM7500 */
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#define IOMD_IRQRQC 0x00000019 /* ARM7500 */
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#define IOMD_IRQMSKC 0x0000001a /* ARM7500 */
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#define IOMD_VIDMUX 0x0000001b /* ARM7500 */
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#define IOMD_IRQSTD 0x0000001c /* ARM7500 */
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#define IOMD_IRQRQD 0x0000001d /* ARM7500 */
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#define IOMD_IRQMSKD 0x0000001e /* ARM7500 */
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#define IOMD_ROMCR0 0x00000020
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#define IOMD_ROMCR1 0x00000021
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#define IOMD_DRAMCR 0x00000022 /* !ARM7500 */
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#define IOMD_VREFCR 0x00000023 /* !ARM7500 */
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#define IOMD_REFCR 0x00000023 /* ARM7500 */
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#define IOMD_FSIZE 0x00000024
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#define IOMD_ID0 0x00000025
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#define IOMD_ID1 0x00000026
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#define IOMD_VERSION 0x00000027
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#define IOMD_MOUSEX 0x00000028
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#define IOMD_MOUSEY 0x00000029
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#define IOMD_MSDATA 0x0000002a /* ARM7500 */
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#define IOMD_MSCR 0x0000002b /* ARM7500 */
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#define IOMD_DMATCR 0x00000030
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#define IOMD_IOTCR 0x00000031
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#define IOMD_ECTCR 0x00000032
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#define IOMD_DMAEXT 0x00000033 /* !ARM7500 */
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#define IOMD_ASTCR 0x00000033 /* ARM7500 */
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#define IOMD_DRAMWID 0x00000034 /* ARM7500 */
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#define IOMD_SELFREF 0x00000035 /* ARM7500 */
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#define IOMD_ATODICR 0x00000038 /* ARM7500 */
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#define IOMD_ATODSR 0x00000039 /* ARM7500 */
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#define IOMD_ATODCR 0x0000003a /* ARM7500 */
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#define IOMD_ATODCNT1 0x0000003b /* ARM7500 */
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#define IOMD_ATODCNT2 0x0000003c /* ARM7500 */
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#define IOMD_ATODCNT3 0x0000003d /* ARM7500 */
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#define IOMD_ATODCNT4 0x0000003e /* ARM7500 */
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#define IOMD_DMA_SIZE 24
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#define IOMD_DMA_SPACING 32
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/* Each DMA channel has the same set of registers. */
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#define IOMD_DMAEND_STOP 0x80000000
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#define IOMD_DMAEND_LAST 0x40000000
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#define IOMD_DMAEND_OFFSET 0x00000fff
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#define IOMD_DMACR_CLEAR 0x80
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#define IOMD_DMACR_DIR 0x40
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#define IOMD_DMACR_ENABLE 0x20
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#define IOMD_DMACR_BYTE 0x01
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#define IOMD_DMACR_HALFWORD 0x02
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#define IOMD_DMACR_WORD 0x04
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#define IOMD_DMACR_QUADWORD 0x10
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#define IOMD_DMAST_OVERRUN 0x04
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#define IOMD_DMAST_INT 0x02
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#define IOMD_DMAST_BANKB 0x01
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#define IOMD_DMAST_BANKA 0x00
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#define IOMD_IO0CURA 0x00000040
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#define IOMD_IO0ENDA 0x00000041
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#define IOMD_IO0CURB 0x00000042
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#define IOMD_IO0ENDB 0x00000043
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#define IOMD_IO0CR 0x00000044
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#define IOMD_IO0ST 0x00000045
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#define IOMD_IO1CURA 0x00000048
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#define IOMD_IO1ENDA 0x00000049
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#define IOMD_IO1CURB 0x0000004a
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#define IOMD_IO1ENDB 0x0000004b
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#define IOMD_IO1CR 0x0000004c
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#define IOMD_IO1ST 0x0000004d
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#define IOMD_IO2CURA 0x00000050
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#define IOMD_IO2ENDA 0x00000051
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#define IOMD_IO2CURB 0x00000052
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#define IOMD_IO2ENDB 0x00000053
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#define IOMD_IO2CR 0x00000054
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#define IOMD_IO2ST 0x00000055
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#define IOMD_IO3CURA 0x00000058
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#define IOMD_IO3ENDA 0x00000059
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#define IOMD_IO3CURB 0x0000005a
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#define IOMD_IO3ENDB 0x0000005b
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#define IOMD_IO3CR 0x0000005c
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#define IOMD_IO3ST 0x0000005d
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#define IOMD_SD0CURA 0x00000060
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#define IOMD_SD0ENDA 0x00000061
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#define IOMD_SD0CURB 0x00000062
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#define IOMD_SD0ENDB 0x00000063
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#define IOMD_SD0CR 0x00000064
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#define IOMD_SD0ST 0x00000065
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#define IOMD_SD1CURA 0x00000068
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#define IOMD_SD1ENDA 0x00000069
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#define IOMD_SD1CURB 0x0000006a
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#define IOMD_SD1ENDB 0x0000006b
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#define IOMD_SD1CR 0x0000006c
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#define IOMD_SD1ST 0x0000006d
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#define IOMD_CURSCUR 0x00000070
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#define IOMD_CURSINIT 0x00000071
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#define IOMD_VIDCURB 0x00000072 /* ARM7500 */
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#define IOMD_VIDCUR 0x00000074
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#define IOMD_VIDEND 0x00000075
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#define IOMD_VIDSTART 0x00000076
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#define IOMD_VIDINIT 0x00000077
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#define IOMD_VIDCR 0x00000078
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#define IOMD_VIDINITB 0x0000007a /* ARM7500 */
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#define IOMD_DMAST 0x0000007c
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#define IOMD_DMARQ 0x0000007d
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#define IOMD_DMAMSK 0x0000007e
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#define IOMD_SIZE 0x100 /* XXX - should be words ? */
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/*
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* Ok these mouse buttons are not strickly part of the iomd but
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* this register is required if the IOMD supports a quadrature mouse
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*/
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#define IO_HW_MOUSE_BUTTONS 0x03210000
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#define IO_MOUSE_BUTTONS 0xf6010000
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#define MOUSE_BUTTON_RIGHT 0x10
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#define MOUSE_BUTTON_MIDDLE 0x20
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#define MOUSE_BUTTON_LEFT 0x40
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#define FREQCON (iomd_base + 0x40000)
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#define RPC600_IOMD_ID 0xd4e7
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#define ARM7500_IOC_ID 0x5b98
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#define ARM7500FE_IOC_ID 0xaa7c
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#define IOMD_ADDRESS(reg) (iomd_base + (reg << 2))
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#define IOMD_WRITE_BYTE(reg, val) \
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(*((volatile unsigned char *)(IOMD_ADDRESS(reg))) = (val))
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#define IOMD_WRITE_WORD(reg, val) \
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(*((volatile unsigned int *)(IOMD_ADDRESS(reg))) = (val))
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#define IOMD_READ_BYTE(reg) \
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(*((volatile unsigned char *)(IOMD_ADDRESS(reg))))
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#define IOMD_READ_WORD(reg) \
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(*((volatile unsigned int *)(IOMD_ADDRESS(reg))))
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#define IOMD_ID (IOMD_READ_BYTE(IOMD_ID0) | (IOMD_READ_BYTE(IOMD_ID1) << 8))
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/* End of iomdreg.h */
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