97 lines
3.5 KiB
C
97 lines
3.5 KiB
C
/* $NetBSD: dmavar.h,v 1.10 2008/04/13 04:55:53 tsutsui Exp $ */
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/*
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* Copyright (c) 1994 Peter Galbavy. All rights reserved.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Peter Galbavy.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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struct dma_softc {
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device_t sc_dev; /* us as a device */
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bus_space_tag_t sc_bst; /* bus space tag */
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bus_dma_tag_t sc_dmatag; /* bus dma tag */
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bus_space_handle_t sc_bsh; /* bus space handle */
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void *sc_client; /* my client */
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int sc_active; /* DMA active ? */
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bus_dmamap_t sc_dmamap; /* bus dma map */
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u_int sc_rev; /* revision */
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int sc_burst; /* DVMA burst size in effect */
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size_t sc_dmasize;
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uint8_t **sc_dmaaddr;
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size_t *sc_dmalen;
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#if 0
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void (*reset)(struct dma_softc *); /* reset routine */
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int (*intr)(struct dma_softc *); /* interrupt ! */
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int (*setup)(struct dma_softc *, uint8_t **, size_t *, int, size_t *);
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#endif
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};
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#define DMA_GCSR(sc) \
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bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, DMA_REG_CSR)
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#define DMA_SCSR(sc, csr) \
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bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, DMA_REG_CSR, (csr))
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/*
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* DMA engine interface functions.
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*/
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#if 0
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#define DMA_RESET(sc) (((sc)->reset)(sc))
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#define DMA_INTR(sc) (((sc)->intr)(sc))
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#define DMA_SETUP(sc, a, l, d, s) (((sc)->setup)(sc, a, l, d, s))
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#endif
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#define DMA_ISACTIVE(sc) ((sc)->sc_active)
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#define DMA_ENINTR(sc) do { \
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uint32_t _csr = DMA_GCSR(sc); \
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_csr |= D_INT_EN; \
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DMA_SCSR(sc, _csr); \
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} while (/* CONSTCOND */0)
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#define DMA_ISINTR(sc) (DMA_GCSR(sc) & (D_INT_PEND|D_ERR_PEND))
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#define DMA_GO(sc) do { \
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uint32_t _csr = DMA_GCSR(sc); \
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_csr |= D_EN_DMA; \
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DMA_SCSR(sc, _csr); \
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sc->sc_active = 1; \
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} while (/* CONSTCOND */0)
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#define DMA_STOP(sc) do { \
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uint32_t _csr = DMA_GCSR(sc); \
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_csr &= ~D_EN_DMA; \
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DMA_SCSR(sc, _csr); \
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sc->sc_active = 0; \
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} while (/* CONSTCOND */0)
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struct dma_softc *espdmafind(int);
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int espdmaintr(struct dma_softc *);
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void dma_reset(struct dma_softc *);
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int dma_setup(struct dma_softc *, uint8_t **, size_t *, int, size_t *);
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