158 lines
4.6 KiB
ArmAsm
158 lines
4.6 KiB
ArmAsm
/* $NetBSD: 4xx_trap_subr.S,v 1.7 2011/05/19 07:51:50 kiyohara Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* This file provides necessary handlers for 405GP CPU
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* It should be included in locore.S after powerpc/powerpc/trap_subr.S
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*/
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.text
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.globl _C_LABEL(pitfitwdog),_C_LABEL(pitfitwdogsize)
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.align 4
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_C_LABEL(pitfitwdog):
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sync
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ba pitint
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.align 4
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sync
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ba fitint
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.align 4
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sync
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ba wdoghandler
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_C_LABEL(pitfitwdogsize) = .-_C_LABEL(pitfitwdog)
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pithandler:
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rfi
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ba . /* Protect against prefetch */
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wdoghandler:
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rfi
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ba . /* Protect against prefetch */
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#define TLBSTK 0x1000
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.lcomm tlbstack,TLBSTK,4
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.type tlbstack,@object
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.text
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/* If an unaligned excception (0x600) and DTLB miss exception (0x1100)
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occur at the same time, the interrupt vector offsets of the two
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exceptions are logically OR'ed together to produce 0x1700.
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See PPC405GP Rev D/E Errata item 51 */
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.globl _C_LABEL(errata51handler),_C_LABEL(errata51size)
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_C_LABEL(errata51handler):
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ba 0x1100
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_C_LABEL(errata51size) = .-_C_LABEL(errata51handler)
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.globl _C_LABEL(tlbdmiss4xx),_C_LABEL(tlbdm4size)
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_C_LABEL(tlbdmiss4xx):
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ACCESS_PROLOG(CI_TLBMISSSAVE)
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bla s4xx_miss
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_C_LABEL(tlbdm4size) = .-_C_LABEL(tlbdmiss4xx)
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.globl _C_LABEL(tlbimiss4xx),_C_LABEL(tlbim4size)
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_C_LABEL(tlbimiss4xx):
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ACCESS_PROLOG(CI_TLBMISSSAVE)
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bla s4xx_miss
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_C_LABEL(tlbim4size) = .-_C_LABEL(tlbimiss4xx)
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s4xx_miss:
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.globl _C_LABEL(pmap_tlbmiss)
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/* If the kernel stack would fault, don't use it. */
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mfpid %r30
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li %r31,KERNEL_PID
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mtpid %r31
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li %r31,-FRAMELEN
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tlbsx. %r31,%r31,%r1
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mtpid %r30
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beq 1f
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/*
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* The kernel stack we want to switch to is not in the TLB.
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* To solve this problem, we will simulate a kernel
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* fault on the kernel stack and let the miss handler
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* bring it in, and return from the trap handler. The
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* processor will immediately take the original fault,
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* which we should be able to handle with the now-valid
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* kernel stack.
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*/
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/* Switch to tlbstack */
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addi %r30,%r1,-FRAMELEN
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lis %r1,tlbstack+TLBSTK-CALLFRAMELEN@ha
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addi %r1,%r1,tlbstack+TLBSTK-CALLFRAMELEN@l
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stw %r30,0(%r1)
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FRAME_SETUP(CI_TLBMISSSAVE)
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/* Take an explicit fault at (kernelstack,pid) */
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lwz %r3,FRAMELEN(%r1)
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li %r4,KERNEL_PID
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bl _C_LABEL(pmap_tlbmiss)
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/*
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* We can retry the old fault or switch stacks and
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* take it now. It's easier to retry.
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*/
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mr. %r3,%r3
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beq trapexit
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/* kernel stack not in the pmap? we should panic */
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trap
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b trapagain
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1:
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FRAME_SETUP(CI_TLBMISSSAVE)
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li %r3,EXC_DTMISS
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lwz %r4,FRAME_EXC(%r1)
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cmpw %r3,%r4
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lwz %r3,FRAME_DEAR(%r1)
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beq 2f
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lwz %r3,FRAME_SRR0(%r1) /* ITMISS case, TLB miss address in SRR0 */
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2:
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lwz %r4,FRAME_PID(%r1)
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bl _C_LABEL(pmap_tlbmiss)
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mr. %r3,%r3
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beq trapexit
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/* XXX DEBUG -- make sure we're not on tlbstack */
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lis %r3,tlbstack@ha
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addi %r3,%r3,tlbstack@l
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sub %r7,%r1,%r3
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twllei %r7,TLBSTK
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/* PTE not found, time to cause a fault */
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b trapagain
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