126 lines
5.1 KiB
C
126 lines
5.1 KiB
C
/* $NetBSD: pte3x.h,v 1.7 1998/02/05 04:57:00 gwr Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jeremy Cooper.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file should contain the machine-dependent details about
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* Page Table Entries (PTEs) and related things. For example,
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* things that depend on the MMU configuration (number of levels
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* in the translation structure) should go here.
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*/
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#ifndef _MACHINE_PTE3X_H
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#define _MACHINE_PTE3X_H
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#include <machine/mc68851.h>
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/*************************************************************************
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* Translation Control Register Settings *
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*************************************************************************
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* The following settings are set by the ROM monitor and used by the
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* kernel. If they are changed, appropriate code must be written into
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* the kernel startup to set them.
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*
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* A virtual address is translated into a physical address by dividing its
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* bits into four fields. The first three fields are used as indexes into
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* descriptor tables and the last field (the 13 lowest significant
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* bits) is an offset to be added to the base address found at the final
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* table. The first three fields are named TIA, TIB and TIC respectively.
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* 31 12 0
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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* | TIA | TIB | TIC | OFFSET |
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* +-.-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-+-.-.-.-.-.-.-.-.-.-.-.-.-+
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*/
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#define MMU_TIA_SHIFT (13+6+6)
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#define MMU_TIA_MASK (0xfe000000)
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#define MMU_TIA_RANGE (0x02000000)
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#define MMU_TIB_SHIFT (13+6)
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#define MMU_TIB_MASK (0x01f80000)
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#define MMU_TIB_RANGE (0x00080000)
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#define MMU_TIC_SHIFT (13)
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#define MMU_TIC_MASK (0x0007e000)
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#define MMU_TIC_RANGE (0x00002000)
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#define MMU_PAGE_SHIFT (13)
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#define MMU_PAGE_MASK (0xffffe000)
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#define MMU_PAGE_SIZE (0x00002000)
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/*
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* Macros which extract each of these fields out of a given
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* VA.
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*/
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#define MMU_TIA(va) \
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((unsigned long) ((va) & MMU_TIA_MASK) >> MMU_TIA_SHIFT)
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#define MMU_TIB(va) \
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((unsigned long) ((va) & MMU_TIB_MASK) >> MMU_TIB_SHIFT)
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#define MMU_TIC(va) \
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((unsigned long) ((va) & MMU_TIC_MASK) >> MMU_TIC_SHIFT)
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/*
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* The widths of the TIA, TIB, and TIC fields determine the size (in
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* elements) of the tables they index.
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*/
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#define MMU_A_TBL_SIZE (128)
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#define MMU_B_TBL_SIZE (64)
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#define MMU_C_TBL_SIZE (64)
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/*
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* Rounding macros.
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* The MMU_ROUND macros are named misleadingly. MMU_ROUND_A actually
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* rounds an address to the nearest B table boundary, and so on.
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* MMU_ROUND_C() is synonmous with m68k_round_page().
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*/
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#define MMU_ROUND_A(pa)\
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((unsigned long) (pa) & MMU_TIA_MASK)
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#define MMU_ROUND_UP_A(pa)\
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((unsigned long) (pa + MMU_TIA_RANGE - 1) & MMU_TIA_MASK)
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#define MMU_ROUND_B(pa)\
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((unsigned long) (pa) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_UP_B(pa)\
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((unsigned long) (pa + MMU_TIB_RANGE - 1) & (MMU_TIA_MASK|MMU_TIB_MASK))
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#define MMU_ROUND_C(pa)\
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((unsigned long) (pa) & MMU_PAGE_MASK)
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#define MMU_ROUND_UP_C(pa)\
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((unsigned long) (pa + MMU_PAGE_SIZE - 1) & MMU_PAGE_MASK)
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/* Compatibility... */
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#define PG_FRAME MMU_SHORT_PTE_BASEADDR
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#define PG_PA(pte) ((pte) & PG_FRAME)
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#define PG_PFNUM(pte) (PG_PA(pte) >> PGSHIFT)
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#define PG_VALID MMU_DT_PAGE
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#endif /* _MACHINE_PTE3X_H */
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