NetBSD/sys/arch/evbarm/iq80310
thorpej bb84e85802 Change pmap_map_entry() to work like pmap_map_chunk(): take a pointer
to the L1 table and a virtual address, and no pointer to the L2 table.
The L2 table will be looked up by pmap_map_entry(), which will panic
if the there is no L2 table for the requested VA.

NOTE: IT IS EXTREMELY IMPORTANT THAT THE CORRECT VIRTUAL ADDRESS
BE PROVIDED TO pmap_map_entry()!  Notably, the code that mapped
the kernel L2 tables into the kernel PT mapping L2 table were not
passing actual virtual addresses, but rather offsets into the range
mapped by the L2 table.  I have fixed up all of these call sites,
and tested the resulting kernel on both an IQ80310 and a Shark.
Other portmasters should examine their pmap_map_entry() calls if
their new kernels fail.
2002-02-22 04:49:19 +00:00
..
com_obio.c
i80312_mainbus.c No point in setting the ATU Subsys vendor/dev ID on boards that 2002-02-08 02:31:12 +00:00
iq80310_7seg.c
iq80310_intr.c * The Npwr only has 5 interrupt sources, all in XINT3, so don't bother 2002-02-09 03:52:31 +00:00
iq80310_machdep.c Change pmap_map_entry() to work like pmap_map_chunk(): take a pointer 2002-02-22 04:49:19 +00:00
iq80310_pci.c Wire the internal devices to the right interrupts on NPWR. 2002-02-08 03:28:24 +00:00
iq80310_timer.c The Npwr has a 19-bit timer. Make sure values programmed into 2002-02-08 23:50:53 +00:00
iq80310reg.h
iq80310var.h
obio_space_asm.S
obio_space.c
obio.c The Npwr doesn't have the board_rev/cpld_rev/backplane_det registers, 2002-02-08 02:30:12 +00:00
obiovar.h