381 lines
10 KiB
C
381 lines
10 KiB
C
/*
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* Copyright (c) 2002, 2003, 2005 Genetec corp. All rights reserved.
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*
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* PCMCIA/CF support for TWINTAIL (G4255EB)
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* Written by Hiroyuki Bessho for Genetec corp.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec corp. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORP.
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/callout.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/malloc.h>
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#include <uvm/uvm.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/pcmcia/pcmciareg.h>
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#include <dev/pcmcia/pcmciavar.h>
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#include <dev/pcmcia/pcmciachip.h>
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#include <arch/arm/xscale/pxa2x0var.h>
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#include <arch/arm/xscale/pxa2x0reg.h>
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#include <arch/arm/sa11x0/sa11xx_pcicvar.h>
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#include <arch/evbarm/g42xxeb/g42xxeb_reg.h>
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#include <arch/evbarm/g42xxeb/g42xxeb_var.h>
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#include <arch/evbarm/g42xxeb/gb225reg.h>
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#include <arch/evbarm/g42xxeb/gb225var.h>
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//#define DONT_USE_CARD_DETECT_INTR
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#define PCMCIA_INT G42XXEB_INT_EXT1
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#define CF_INT G42XXEB_INT_EXT0
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#ifdef DEBUG
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#define DPRINTF(arg) printf arg
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#else
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#define DPRINTF(arg)
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#endif
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struct opcic_softc;
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struct opcic_socket {
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struct sapcic_socket ss; /* inherit socket for sa11x0 pcic */
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#if 0
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int voltage; /* card power voltage selected by
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upper layer */
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#endif
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};
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struct opcic_softc {
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struct sapcic_softc sc_pc; /* inherit SA11xx pcic */
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struct opcic_socket sc_socket[2];
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int sc_cards;
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bus_space_handle_t sc_memctl_ioh;
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};
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static int opcic_match(struct device *, struct cfdata *, void *);
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static void opcic_attach(struct device *, struct device *, void *);
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static int opcic_print(void *, const char *);
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static int opcic_read(struct sapcic_socket *, int);
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static void opcic_write(struct sapcic_socket *, int, int);
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static void opcic_set_power(struct sapcic_socket *, int);
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static void opcic_clear_intr(int);
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static void *opcic_intr_establish(struct sapcic_socket *, int,
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int (*)(void *), void *);
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static void opcic_intr_disestablish(struct sapcic_socket *, void *);
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#ifndef DONT_USE_CARD_DETECT_INTR
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static int opcic_card_detect(void *, int);
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#endif
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CFATTACH_DECL(opcic, sizeof(struct opcic_softc),
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opcic_match, opcic_attach, NULL, NULL);
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static struct sapcic_tag opcic_tag = {
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opcic_read,
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opcic_write,
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opcic_set_power,
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opcic_clear_intr,
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opcic_intr_establish,
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opcic_intr_disestablish,
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};
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#define HAVE_CARD(r) (((r)&CARDDET_DET)==0)
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static inline uint8_t
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opcic_read_card_status(struct opcic_socket *so)
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{
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struct opcic_softc *sc = (struct opcic_softc *)(so->ss.sc);
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struct opio_softc *osc =
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(struct opio_softc *) device_parent(&sc->sc_pc.sc_dev);
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return bus_space_read_1(osc->sc_iot, osc->sc_ioh,
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GB225_CFDET + 2 * so->ss.socket);
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}
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static int
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opcic_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return 1;
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}
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static void
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opcic_attach(struct device *parent, struct device *self, void *aux)
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{
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int i;
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struct pcmciabus_attach_args paa;
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struct opcic_softc *sc = (struct opcic_softc *)self;
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struct opio_softc *psc = (struct opio_softc *)parent;
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struct obio_softc *bsd = (struct obio_softc *)device_parent(parent);
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bus_space_handle_t memctl_ioh = bsd->sc_memctl_ioh;
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bus_space_tag_t iot = psc->sc_iot;
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printf("\n");
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/* tell PXA2X0 that we have two sockets */
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#if 0
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bus_space_write_4(iot, memctl_ioh, MEMCTL_MECR, MECR_NOS);
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#else
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bus_space_write_4(iot, memctl_ioh, MEMCTL_MECR, MECR_CIT|MECR_NOS);
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#endif
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sc->sc_pc.sc_iot = psc->sc_iot;
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sc->sc_memctl_ioh = memctl_ioh;
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sc->sc_cards = 0;
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for(i = 0; i < 2; i++) {
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sc->sc_socket[i].ss.sc = &sc->sc_pc;
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sc->sc_socket[i].ss.socket = i;
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sc->sc_socket[i].ss.pcictag_cookie = NULL;
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sc->sc_socket[i].ss.pcictag = &opcic_tag;
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sc->sc_socket[i].ss.event_thread = NULL;
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sc->sc_socket[i].ss.event = 0;
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sc->sc_socket[i].ss.laststatus = CARDDET_NOCARD;
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sc->sc_socket[i].ss.shutdown = 0;
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sc->sc_socket[i].ss.power_capability =
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(SAPCIC_POWER_5V|SAPCIC_POWER_3V);
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bus_space_write_4(iot, memctl_ioh, MEMCTL_MCIO(i),
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MC_TIMING_VAL(1,1,1));
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#if 0
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bus_space_write_4(iot, memctl_ioh, MEMCTL_MCATT(i),
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MC_TIMING_VAL(31,31,31));
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#endif
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paa.paa_busname = "pcmcia";
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paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
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paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i].ss;
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paa.iobase = 0;
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paa.iosize = 0x4000000;
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sc->sc_socket[i].ss.pcmcia =
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(struct device *)config_found_ia(&sc->sc_pc.sc_dev,
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"pcmciabus", &paa, opcic_print);
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#ifndef DONT_USE_CARD_DETECT_INTR
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/* interrupt for card insertion/removal */
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opio_intr_establish(psc,
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i==0 ? OPIO_INTR_CF_INSERT : OPIO_INTR_PCMCIA_INSERT,
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IPL_BIO, opcic_card_detect, &sc->sc_socket[i]);
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#else
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bus_space_write_4(iot, ioh, MEMCTL_MECR, MECR_NOS | MECR_CIT);
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#endif
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/* schedule kthread creation */
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sapcic_kthread_create(&sc->sc_socket[i].ss);
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}
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}
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static int
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opcic_print(void *aux, const char *name)
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{
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return (UNCONF);
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}
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#ifndef DONT_USE_CARD_DETECT_INTR
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static int
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opcic_card_detect(void *arg, int val)
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{
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struct opcic_socket *socket = arg;
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struct opcic_softc *sc = (struct opcic_softc *)socket->ss.sc;
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bus_space_tag_t iot = sc->sc_pc.sc_iot;
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bus_space_handle_t memctl_ioh = sc->sc_memctl_ioh;
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int sock_no = socket->ss.socket;
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int last, s;
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s = splbio();
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last = sc->sc_cards;
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if (HAVE_CARD(val)) {
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sc->sc_cards |= 1<<sock_no;
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/* if it is the first card, turn on expansion memory
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* control. */
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if (last == 0)
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bus_space_write_4(iot, memctl_ioh, MEMCTL_MECR,
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MECR_NOS | MECR_CIT);
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}
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else {
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sc->sc_cards &= ~(1<<sock_no);
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/* if we loast all cards, turn off expansion memory
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* control. */
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#if 0
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if (sc->sc_cards == 0)
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bus_space_write_4(iot, memctl_ioh,
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MEMCTL_MECR, MECR_NOS);
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#endif
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}
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splx(s);
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DPRINTF(("%s: card %d %s\n", sc->sc_pc.sc_dev.dv_xname, sock_no,
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HAVE_CARD(val) ? "inserted" : "removed"));
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sapcic_intr(arg);
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return 1;
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}
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#endif /* DONT_USE_CARD_DETECT_INTR */
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static int
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opcic_read(struct sapcic_socket *__so, int which)
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{
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struct opcic_socket *so = (struct opcic_socket *)__so;
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uint8_t reg;
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reg = opcic_read_card_status(so);
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switch (which) {
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case SAPCIC_STATUS_CARD:
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return HAVE_CARD(reg) ?
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SAPCIC_CARD_VALID : SAPCIC_CARD_INVALID;
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case SAPCIC_STATUS_VS1:
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return (reg & CARDDET_NVS1) == 0;
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case SAPCIC_STATUS_VS2:
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return (reg & CARDDET_NVS2) == 0;
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case SAPCIC_STATUS_READY:
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return 1;
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default:
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panic("%s: bogus register", __func__);
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}
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}
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static void
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opcic_write(struct sapcic_socket *__so, int which, int arg)
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{
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struct opcic_socket *so = (struct opcic_socket *)__so;
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struct opcic_softc *sc = (struct opcic_softc *)so->ss.sc;
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struct opio_softc *psc =
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(struct opio_softc *) device_parent(&sc->sc_pc.sc_dev);
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struct obio_softc *bsc =
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(struct obio_softc *) device_parent(&psc->sc_dev);
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switch (which) {
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case SAPCIC_CONTROL_RESET:
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obio_peripheral_reset(bsc, so->ss.socket, arg);
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delay(500*1000);
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break;
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case SAPCIC_CONTROL_LINEENABLE:
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break;
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case SAPCIC_CONTROL_WAITENABLE:
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break;
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case SAPCIC_CONTROL_POWERSELECT:
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#if 0
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so->voltage = arg;
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#endif
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break;
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default:
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panic("%s: bogus register", __func__);
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}
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}
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static void
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opcic_set_power(struct sapcic_socket *__so, int arg)
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{
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struct opcic_socket *so = (struct opcic_socket *)__so;
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struct opcic_softc *sc = (struct opcic_softc *)so->ss.sc;
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struct opio_softc *psc =
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(struct opio_softc *) device_parent(&sc->sc_pc.sc_dev);
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int shift, save;
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volatile uint8_t *p;
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if( arg < 0 || SAPCIC_POWER_5V < arg )
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panic("sacpcic_set_power: bogus arg\n");
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DPRINTF(("card %d: DET=%x\n",
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so->ss.socket,
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bus_space_read_1(psc->sc_iot, psc->sc_ioh,
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GB225_CFDET + 2*so->ss.socket)));
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p = (volatile uint8_t *)bus_space_vaddr(psc->sc_iot, psc->sc_ioh)
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+ GB225_CARDPOW;
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shift = 4 * !so->ss.socket;
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save = disable_interrupts(I32_bit);
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*p = (*p & ~(0x0f << shift)) | ((CARDPOW_VPPVCC | (arg<<2)) << shift);
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restore_interrupts(save);
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DPRINTF(("card %d power: %x\n", so->ss.socket, *p));
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}
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static void
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opcic_clear_intr(int arg)
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{
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}
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static void *
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opcic_intr_establish(struct sapcic_socket *so, int level,
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int (* ih_fun)(void *), void *ih_arg)
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{
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struct opcic_softc *sc = (struct opcic_softc *)so->sc;
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struct opio_softc *psc =
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(struct opio_softc *) device_parent(&sc->sc_pc.sc_dev);
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struct obio_softc *bsc =
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(struct obio_softc *) device_parent(&psc->sc_dev);
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int irq;
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DPRINTF(("opcic_intr_establish %d\n", so->socket));
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irq = so->socket ? PCMCIA_INT : CF_INT;
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return obio_intr_establish(bsc, irq, level, IST_EDGE_FALLING,
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ih_fun, ih_arg);
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}
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static void
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opcic_intr_disestablish(struct sapcic_socket *so, void *ih)
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{
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struct opcic_softc *sc = (struct opcic_softc *)so->sc;
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struct opio_softc *psc =
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(struct opio_softc *) device_parent(&sc->sc_pc.sc_dev);
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struct obio_softc *bsc =
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(struct obio_softc *) device_parent(&psc->sc_dev);
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int (* func)(void *) = ((struct obio_handler *)ih)->func;
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int irq = so->socket ? PCMCIA_INT : CF_INT;
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obio_intr_disestablish(bsc, irq, func);
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}
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