1069 lines
24 KiB
C
1069 lines
24 KiB
C
/* $NetBSD: mb8795.c,v 1.22 2001/04/16 14:12:12 dbj Exp $ */
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/*
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* Copyright (c) 1998 Darrin B. Jewell
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Darrin B. Jewell
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_inet.h"
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#include "opt_ccitt.h"
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#include "opt_llc.h"
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#include "opt_ns.h"
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#include "bpfilter.h"
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#include "rnd.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_ether.h>
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#if 0
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#include <net/if_media.h>
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#endif
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#include <netinet/in_systm.h>
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#include <netinet/in_var.h>
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#include <netinet/ip.h>
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#endif
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#if defined(CCITT) && defined(LLC)
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#include <sys/socketvar.h>
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#include <netccitt/x25.h>
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#include <netccitt/pk.h>
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#include <netccitt/pk_var.h>
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#include <netccitt/pk_extern.h>
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#endif
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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#endif
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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/* @@@ this is here for the REALIGN_DMABUF hack below */
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#include "nextdmareg.h"
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#include "nextdmavar.h"
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#include "mb8795reg.h"
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#include "mb8795var.h"
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#if 1
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#define XE_DEBUG
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#endif
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#ifdef XE_DEBUG
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int xe_debug = 0;
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#define DPRINTF(x) if (xe_debug) printf x;
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#else
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#define DPRINTF(x)
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#endif
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/*
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* Support for
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* Fujitsu Ethernet Data Link Controller (MB8795)
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* and the Fujitsu Manchester Encoder/Decoder (MB502).
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*/
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void mb8795_shutdown __P((void *));
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struct mbuf * mb8795_rxdmamap_load __P((struct mb8795_softc *,
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bus_dmamap_t map));
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bus_dmamap_t mb8795_rxdma_continue __P((void *));
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void mb8795_rxdma_completed __P((bus_dmamap_t,void *));
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bus_dmamap_t mb8795_txdma_continue __P((void *));
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void mb8795_txdma_completed __P((bus_dmamap_t,void *));
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void mb8795_rxdma_shutdown __P((void *));
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void mb8795_txdma_shutdown __P((void *));
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bus_dmamap_t mb8795_txdma_restart __P((bus_dmamap_t,void *));
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void
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mb8795_config(sc)
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struct mb8795_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname));
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/* Initialize ifnet structure. */
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bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
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ifp->if_softc = sc;
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ifp->if_start = mb8795_start;
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ifp->if_ioctl = mb8795_ioctl;
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ifp->if_watchdog = mb8795_watchdog;
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ifp->if_flags =
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IFF_BROADCAST | IFF_NOTRAILERS;
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/* Attach the interface. */
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if_attach(ifp);
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ether_ifattach(ifp, sc->sc_enaddr);
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/* decrease the mtu on this interface to deal with
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* alignment problems
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*/
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ifp->if_mtu -= 16;
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sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc);
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if (sc->sc_sh == NULL)
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panic("mb8795_config: can't establish shutdownhook");
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#if NRND > 0
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rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
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RND_TYPE_NET, 0);
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#endif
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/* Initialize the dma maps */
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{
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int error;
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if ((error = bus_dmamap_create(sc->sc_tx_dmat, MCLBYTES,
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(MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
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&sc->sc_tx_dmamap)) != 0) {
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panic("%s: can't create tx DMA map, error = %d\n",
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sc->sc_dev.dv_xname, error);
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}
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{
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int i;
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for(i=0;i<MB8795_NRXBUFS;i++) {
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if ((error = bus_dmamap_create(sc->sc_rx_dmat, MCLBYTES,
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(MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
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&sc->sc_rx_dmamap[i])) != 0) {
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panic("%s: can't create rx DMA map, error = %d\n",
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sc->sc_dev.dv_xname, error);
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}
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sc->sc_rx_mb_head[i] = NULL;
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}
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sc->sc_rx_loaded_idx = 0;
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sc->sc_rx_completed_idx = 0;
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sc->sc_rx_handled_idx = 0;
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}
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}
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/* @@@ more next hacks
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* the 2000 covers at least a 1500 mtu + headers
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* + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
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*/
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sc->sc_txbuf = malloc(2000, M_DEVBUF, M_NOWAIT);
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if (!sc->sc_txbuf) panic("%s: can't malloc tx DMA buffer",
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sc->sc_dev.dv_xname);
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sc->sc_tx_mb_head = NULL;
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sc->sc_tx_loaded = 0;
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sc->sc_tx_nd->nd_shutdown_cb = mb8795_txdma_shutdown;
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sc->sc_tx_nd->nd_continue_cb = mb8795_txdma_continue;
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sc->sc_tx_nd->nd_completed_cb = mb8795_txdma_completed;
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sc->sc_tx_nd->nd_cb_arg = sc;
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sc->sc_rx_nd->nd_shutdown_cb = mb8795_rxdma_shutdown;
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sc->sc_rx_nd->nd_continue_cb = mb8795_rxdma_continue;
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sc->sc_rx_nd->nd_completed_cb = mb8795_rxdma_completed;
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sc->sc_rx_nd->nd_cb_arg = sc;
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DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname));
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}
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/****************************************************************/
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#ifdef XE_DEBUG
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#define XCHR(x) "0123456789abcdef"[(x) & 0xf]
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static void
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xe_hex_dump(unsigned char *pkt, size_t len)
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{
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size_t i, j;
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printf("00000000 ");
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for(i=0; i<len; i++) {
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printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i]));
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if ((i+1) % 16 == 8) {
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printf(" ");
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}
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if ((i+1) % 16 == 0) {
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printf(" %c", '|');
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for(j=0; j<16; j++) {
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printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.');
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}
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printf("%c\n%c%c%c%c%c%c%c%c ", '|',
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XCHR((i+1)>>28),XCHR((i+1)>>24),XCHR((i+1)>>20),XCHR((i+1)>>16),
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XCHR((i+1)>>12), XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1));
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}
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}
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printf("\n");
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}
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#undef XCHR
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#endif
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/*
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* Controller receive interrupt.
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*/
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void
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mb8795_rint(sc)
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struct mb8795_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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int error = 0;
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u_char rxstat;
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u_char rxmask;
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rxstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT);
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rxmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK);
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bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
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if (rxstat & XE_RXSTAT_RESET) {
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DPRINTF(("%s: rx reset packet\n",
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sc->sc_dev.dv_xname));
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error++;
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}
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if (rxstat & XE_RXSTAT_SHORT) {
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DPRINTF(("%s: rx short packet\n",
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sc->sc_dev.dv_xname));
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error++;
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}
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if (rxstat & XE_RXSTAT_ALIGNERR) {
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DPRINTF(("%s: rx alignment error\n",
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sc->sc_dev.dv_xname));
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#if 0
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error++;
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#endif
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}
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if (rxstat & XE_RXSTAT_CRCERR) {
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DPRINTF(("%s: rx CRC error\n",
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sc->sc_dev.dv_xname));
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#if 0
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error++;
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#endif
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}
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if (rxstat & XE_RXSTAT_OVERFLOW) {
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DPRINTF(("%s: rx overflow error\n",
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sc->sc_dev.dv_xname));
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#if 0
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error++;
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#endif
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}
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if (error) {
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ifp->if_ierrors++;
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/* @@@ handle more gracefully, free memory, etc. */
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}
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if (rxstat & XE_RXSTAT_OK) {
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int s;
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s = spldma();
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while(sc->sc_rx_handled_idx != sc->sc_rx_completed_idx) {
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struct mbuf *m;
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bus_dmamap_t map;
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sc->sc_rx_handled_idx++;
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sc->sc_rx_handled_idx %= MB8795_NRXBUFS;
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/* Should probably not do this much while interrupts
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* are disabled, but for now we will.
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*/
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map = sc->sc_rx_dmamap[sc->sc_rx_handled_idx];
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m = sc->sc_rx_mb_head[sc->sc_rx_handled_idx];
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m->m_pkthdr.len = m->m_len = map->dm_xfer_len;
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m->m_flags |= M_HASFCS;
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m->m_pkthdr.rcvif = ifp;
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bus_dmamap_sync(sc->sc_rx_dmat, map,
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0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
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bus_dmamap_unload(sc->sc_rx_dmat, map);
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/* Install a fresh mbuf for next packet */
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sc->sc_rx_mb_head[sc->sc_rx_handled_idx] =
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mb8795_rxdmamap_load(sc,map);
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/* Punt runt packets
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* dma restarts create 0 length packets for example
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*/
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if (m->m_len < ETHER_MIN_LEN) {
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m_freem(m);
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continue;
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}
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/* Find receive length, keep crc */
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/* enable dma interrupts while we process the packet */
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splx(s);
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#if defined(XE_DEBUG)
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/* Peek at the packet */
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DPRINTF(("%s: received packet, at VA 0x%08x-0x%08x,len %d\n",
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sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len));
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if (xe_debug > 3) {
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xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len);
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} else if (xe_debug > 2) {
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xe_hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 );
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}
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#endif
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#if NBPFILTER > 0
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/*
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* Pass packet to bpf if there is a listener.
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*/
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if (ifp->if_bpf)
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bpf_mtap(ifp->if_bpf, m);
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#endif
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{
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ifp->if_ipackets++;
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/* Pass the packet up. */
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(*ifp->if_input)(ifp, m);
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}
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s = spldma();
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}
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splx(s);
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}
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#ifdef XE_DEBUG
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if (xe_debug) {
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char sbuf[256];
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bitmask_snprintf(rxstat, XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
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printf("%s: rx interrupt, rxstat = %s\n",
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sc->sc_dev.dv_xname, sbuf);
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bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT),
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XE_RXSTAT_BITS, sbuf, sizeof(sbuf));
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printf("rxstat = 0x%s\n", sbuf);
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bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK),
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XE_RXMASK_BITS, sbuf, sizeof(sbuf));
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printf("rxmask = 0x%s\n", sbuf);
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bitmask_snprintf(bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE),
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XE_RXMODE_BITS, sbuf, sizeof(sbuf));
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printf("rxmode = 0x%s\n", sbuf);
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}
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#endif
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return;
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}
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/*
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* Controller transmit interrupt.
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*/
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void
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mb8795_tint(sc)
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struct mb8795_softc *sc;
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{
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u_char txstat;
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u_char txmask;
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
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txmask = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK);
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if (txstat & XE_TXSTAT_SHORTED) {
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printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname);
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ifp->if_oerrors++;
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}
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if (txstat & XE_TXSTAT_UNDERFLOW) {
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printf("%s: tx underflow\n", sc->sc_dev.dv_xname);
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ifp->if_oerrors++;
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}
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if (txstat & XE_TXSTAT_COLLERR) {
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DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname));
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ifp->if_collisions++;
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}
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if (txstat & XE_TXSTAT_COLLERR16) {
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printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname);
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ifp->if_oerrors++;
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ifp->if_collisions += 16;
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}
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#if 0
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if (txstat & XE_TXSTAT_READY) {
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char sbuf[256];
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bitmask_snprintf(txstat, XE_TXSTAT_BITS, sbuf, sizeof(sbuf));
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panic("%s: unexpected tx interrupt %s",
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sc->sc_dev.dv_xname, sbuf);
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/* turn interrupt off */
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bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
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txmask & ~XE_TXMASK_READYIE);
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}
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#endif
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return;
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}
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/****************************************************************/
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void
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mb8795_reset(sc)
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struct mb8795_softc *sc;
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{
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int s;
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s = splnet();
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mb8795_init(sc);
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splx(s);
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}
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void
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mb8795_watchdog(ifp)
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struct ifnet *ifp;
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{
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struct mb8795_softc *sc = ifp->if_softc;
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log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
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++ifp->if_oerrors;
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DPRINTF(("%s: %d input errors, %d input packets\n",
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sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets));
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mb8795_reset(sc);
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}
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/*
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* Initialization of interface; set up initialization block
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* and transmit/receive descriptor rings.
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* @@@ error handling is bogus in here. memory leaks
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*/
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void
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mb8795_init(sc)
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struct mb8795_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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m_freem(sc->sc_tx_mb_head);
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|
sc->sc_tx_mb_head = NULL;
|
|
sc->sc_tx_loaded = 0;
|
|
|
|
{
|
|
int i;
|
|
for(i=0;i<MB8795_NRXBUFS;i++) {
|
|
if (sc->sc_rx_mb_head[i]) {
|
|
bus_dmamap_unload(sc->sc_rx_dmat, sc->sc_rx_dmamap[i]);
|
|
m_freem(sc->sc_rx_mb_head[i]);
|
|
}
|
|
sc->sc_rx_mb_head[i] =
|
|
mb8795_rxdmamap_load(sc, sc->sc_rx_dmamap[i]);
|
|
}
|
|
sc->sc_rx_loaded_idx = 0;
|
|
sc->sc_rx_completed_idx = 0;
|
|
sc->sc_rx_handled_idx = 0;
|
|
}
|
|
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, XE_RESET_MODE);
|
|
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMODE, XE_TXMODE_LB_DISABLE);
|
|
#if 0 /* This interrupt was sometimes failing to ack correctly
|
|
* causing a loop @@@
|
|
*/
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
|
|
XE_TXMASK_UNDERFLOWIE | XE_TXMASK_COLLIE | XE_TXMASK_COLL16IE
|
|
| XE_TXMASK_PARERRIE);
|
|
#else
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK, 0);
|
|
#endif
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
|
|
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMODE, XE_RXMODE_NORMAL);
|
|
|
|
#if 0
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
|
|
XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE |
|
|
XE_RXMASK_ALIGNERRIE | XE_RXMASK_CRCERRIE | XE_RXMASK_OVERFLOWIE);
|
|
#else
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXMASK,
|
|
XE_RXMASK_OKIE | XE_RXMASK_RESETIE | XE_RXMASK_SHORTIE);
|
|
#endif
|
|
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RXSTAT, XE_RXSTAT_CLEAR);
|
|
|
|
{
|
|
int i;
|
|
for(i=0;i<sizeof(sc->sc_enaddr);i++) {
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh,XE_ENADDR+i,sc->sc_enaddr[i]);
|
|
}
|
|
}
|
|
|
|
DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n",
|
|
sc->sc_dev.dv_xname,
|
|
sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
|
|
sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5],
|
|
sizeof(sc->sc_enaddr)));
|
|
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_RESET, 0);
|
|
|
|
ifp->if_flags |= IFF_RUNNING;
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_timer = 0;
|
|
|
|
nextdma_init(sc->sc_tx_nd);
|
|
nextdma_init(sc->sc_rx_nd);
|
|
|
|
nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
|
|
|
|
if (ifp->if_snd.ifq_head != NULL) {
|
|
mb8795_start(ifp);
|
|
}
|
|
}
|
|
|
|
void
|
|
mb8795_stop(sc)
|
|
struct mb8795_softc *sc;
|
|
{
|
|
printf("%s: stop not implemented\n", sc->sc_dev.dv_xname);
|
|
}
|
|
|
|
|
|
void
|
|
mb8795_shutdown(arg)
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = (struct mb8795_softc *)arg;
|
|
mb8795_stop(sc);
|
|
}
|
|
|
|
/****************************************************************/
|
|
int
|
|
mb8795_ioctl(ifp, cmd, data)
|
|
register struct ifnet *ifp;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
{
|
|
register struct mb8795_softc *sc = ifp->if_softc;
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
int s, error = 0;
|
|
|
|
s = splnet();
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFADDR:
|
|
ifp->if_flags |= IFF_UP;
|
|
|
|
switch (ifa->ifa_addr->sa_family) {
|
|
#ifdef INET
|
|
case AF_INET:
|
|
mb8795_init(sc);
|
|
arp_ifinit(ifp, ifa);
|
|
break;
|
|
#endif
|
|
#ifdef NS
|
|
case AF_NS:
|
|
{
|
|
register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
|
|
|
|
if (ns_nullhost(*ina))
|
|
ina->x_host =
|
|
*(union ns_host *)LLADDR(ifp->if_sadl);
|
|
else {
|
|
bcopy(ina->x_host.c_host,
|
|
LLADDR(ifp->if_sadl),
|
|
sizeof(sc->sc_enaddr));
|
|
}
|
|
/* Set new address. */
|
|
mb8795_init(sc);
|
|
break;
|
|
}
|
|
#endif
|
|
default:
|
|
mb8795_init(sc);
|
|
break;
|
|
}
|
|
break;
|
|
|
|
#if defined(CCITT) && defined(LLC)
|
|
case SIOCSIFCONF_X25:
|
|
ifp->if_flags |= IFF_UP;
|
|
ifa->ifa_rtrequest = cons_rtrequest; /* XXX */
|
|
error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
|
|
if (error == 0)
|
|
mb8795_init(sc);
|
|
break;
|
|
#endif /* CCITT && LLC */
|
|
|
|
case SIOCSIFFLAGS:
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) != 0) {
|
|
/*
|
|
* If interface is marked down and it is running, then
|
|
* stop it.
|
|
*/
|
|
mb8795_stop(sc);
|
|
ifp->if_flags &= ~IFF_RUNNING;
|
|
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) == 0) {
|
|
/*
|
|
* If interface is marked up and it is stopped, then
|
|
* start it.
|
|
*/
|
|
mb8795_init(sc);
|
|
} else {
|
|
/*
|
|
* Reset the interface to pick up changes in any other
|
|
* flags that affect hardware registers.
|
|
*/
|
|
/*mb8795_stop(sc);*/
|
|
mb8795_init(sc);
|
|
}
|
|
#ifdef XE_DEBUG
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
sc->sc_debug = 1;
|
|
else
|
|
sc->sc_debug = 0;
|
|
#endif
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
error = (cmd == SIOCADDMULTI) ?
|
|
ether_addmulti(ifr, &sc->sc_ethercom) :
|
|
ether_delmulti(ifr, &sc->sc_ethercom);
|
|
|
|
if (error == ENETRESET) {
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*/
|
|
mb8795_reset(sc);
|
|
error = 0;
|
|
}
|
|
break;
|
|
|
|
#if 0
|
|
case SIOCGIFMEDIA:
|
|
case SIOCSIFMEDIA:
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
|
|
break;
|
|
#endif
|
|
|
|
default:
|
|
error = EINVAL;
|
|
break;
|
|
}
|
|
|
|
splx(s);
|
|
|
|
#if 0
|
|
DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n",
|
|
cmd,error));
|
|
#endif
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Setup output on interface.
|
|
* Get another datagram to send off of the interface queue, and map it to the
|
|
* interface before starting the output.
|
|
* Called only at splnet or interrupt level.
|
|
*/
|
|
void
|
|
mb8795_start(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
int error;
|
|
struct mb8795_softc *sc = ifp->if_softc;
|
|
|
|
if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
|
|
return;
|
|
|
|
DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname));
|
|
|
|
#if (defined(DIAGNOSTIC))
|
|
{
|
|
u_char txstat;
|
|
txstat = bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT);
|
|
if (!(txstat & XE_TXSTAT_READY)) {
|
|
/* @@@ I used to panic here, but then it paniced once.
|
|
* Let's see if I can just reset instead. [ dbj 980706.1900 ]
|
|
*/
|
|
printf("%s: transmitter not ready\n", sc->sc_dev.dv_xname);
|
|
mb8795_reset(sc);
|
|
return;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
#if 0
|
|
return; /* @@@ Turn off xmit for debugging */
|
|
#endif
|
|
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXSTAT, XE_TXSTAT_CLEAR);
|
|
|
|
IF_DEQUEUE(&ifp->if_snd, sc->sc_tx_mb_head);
|
|
if (sc->sc_tx_mb_head == 0) {
|
|
printf("%s: No packet to start\n",
|
|
sc->sc_dev.dv_xname);
|
|
return;
|
|
}
|
|
|
|
ifp->if_timer = 5;
|
|
|
|
/* The following is a next specific hack that should
|
|
* probably be moved out of MI code.
|
|
* This macro assumes it can move forward as needed
|
|
* in the buffer. Perhaps it should zero the extra buffer.
|
|
*/
|
|
#define REALIGN_DMABUF(s,l) \
|
|
{ (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
|
|
&~(DMA_BEGINALIGNMENT-1))); \
|
|
(l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
|
|
&~(DMA_ENDALIGNMENT-1)))-(s);}
|
|
|
|
#if 0
|
|
error = bus_dmamap_load_mbuf(sc->sc_tx_dmat,
|
|
sc->sc_tx_dmamap,
|
|
sc->sc_tx_mb_head,
|
|
BUS_DMA_NOWAIT);
|
|
#else
|
|
{
|
|
u_char *buf = sc->sc_txbuf;
|
|
int buflen = 0;
|
|
struct mbuf *m = sc->sc_tx_mb_head;
|
|
buflen = m->m_pkthdr.len;
|
|
|
|
/* Fix runt packets, @@@ memory overrun */
|
|
if (buflen < ETHERMIN+sizeof(struct ether_header)) {
|
|
buflen = ETHERMIN+sizeof(struct ether_header);
|
|
}
|
|
|
|
buflen += 15;
|
|
REALIGN_DMABUF(buf,buflen);
|
|
if (buflen > 1520) {
|
|
panic("%s: packet too long\n",sc->sc_dev.dv_xname);
|
|
}
|
|
|
|
{
|
|
u_char *p = buf;
|
|
for (m=sc->sc_tx_mb_head; m; m = m->m_next) {
|
|
if (m->m_len == 0) continue;
|
|
bcopy(mtod(m, u_char *), p, m->m_len);
|
|
p += m->m_len;
|
|
}
|
|
}
|
|
|
|
error = bus_dmamap_load(sc->sc_tx_dmat, sc->sc_tx_dmamap,
|
|
buf,buflen,NULL,BUS_DMA_NOWAIT);
|
|
}
|
|
#endif
|
|
if (error) {
|
|
printf("%s: can't load mbuf chain, error = %d\n",
|
|
sc->sc_dev.dv_xname, error);
|
|
m_freem(sc->sc_tx_mb_head);
|
|
sc->sc_tx_mb_head = NULL;
|
|
return;
|
|
}
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (sc->sc_tx_loaded != 0) {
|
|
panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
|
|
sc->sc_tx_loaded);
|
|
}
|
|
#endif
|
|
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
|
|
bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap, 0,
|
|
sc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
|
|
|
|
nextdma_start(sc->sc_tx_nd, DMACSR_SETWRITE);
|
|
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* Pass packet to bpf if there is a listener.
|
|
*/
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(ifp->if_bpf, sc->sc_tx_mb_head);
|
|
#endif
|
|
|
|
}
|
|
|
|
/****************************************************************/
|
|
|
|
void
|
|
mb8795_txdma_completed(map, arg)
|
|
bus_dmamap_t map;
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = arg;
|
|
|
|
DPRINTF(("%s: mb8795_txdma_completed()\n",sc->sc_dev.dv_xname));
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (!sc->sc_tx_loaded) {
|
|
panic("%s: tx completed never loaded ",sc->sc_dev.dv_xname);
|
|
}
|
|
if (map != sc->sc_tx_dmamap) {
|
|
panic("%s: unexpected tx completed map",sc->sc_dev.dv_xname);
|
|
}
|
|
|
|
#endif
|
|
}
|
|
|
|
void
|
|
mb8795_txdma_shutdown(arg)
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = arg;
|
|
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
|
|
|
|
DPRINTF(("%s: mb8795_txdma_shutdown()\n",sc->sc_dev.dv_xname));
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (!sc->sc_tx_loaded) {
|
|
panic("%s: tx shutdown never loaded ",sc->sc_dev.dv_xname);
|
|
}
|
|
#endif
|
|
|
|
{
|
|
|
|
if (sc->sc_tx_loaded) {
|
|
bus_dmamap_sync(sc->sc_tx_dmat, sc->sc_tx_dmamap,
|
|
0, sc->sc_tx_dmamap->dm_mapsize,
|
|
BUS_DMASYNC_POSTWRITE);
|
|
bus_dmamap_unload(sc->sc_tx_dmat, sc->sc_tx_dmamap);
|
|
m_freem(sc->sc_tx_mb_head);
|
|
sc->sc_tx_mb_head = NULL;
|
|
|
|
sc->sc_tx_loaded--;
|
|
}
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (sc->sc_tx_loaded != 0) {
|
|
panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
|
|
sc->sc_tx_loaded);
|
|
}
|
|
#endif
|
|
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
|
|
ifp->if_timer = 0;
|
|
|
|
if (ifp->if_snd.ifq_head != NULL) {
|
|
mb8795_start(ifp);
|
|
}
|
|
|
|
}
|
|
|
|
#if 0
|
|
/* Enable ready interrupt */
|
|
bus_space_write_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK,
|
|
bus_space_read_1(sc->sc_bst,sc->sc_bsh, XE_TXMASK)
|
|
| XE_TXMASK_READYIE);
|
|
#endif
|
|
}
|
|
|
|
|
|
void
|
|
mb8795_rxdma_completed(map, arg)
|
|
bus_dmamap_t map;
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = arg;
|
|
|
|
sc->sc_rx_completed_idx++;
|
|
sc->sc_rx_completed_idx %= MB8795_NRXBUFS;
|
|
|
|
DPRINTF(("%s: mb8795_rxdma_completed(), sc->sc_rx_completed_idx = %d\n",
|
|
sc->sc_dev.dv_xname, sc->sc_rx_completed_idx));
|
|
|
|
#if (defined(DIAGNOSTIC))
|
|
if (map != sc->sc_rx_dmamap[sc->sc_rx_completed_idx]) {
|
|
panic("%s: Unexpected rx dmamap completed\n",
|
|
sc->sc_dev.dv_xname);
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void
|
|
mb8795_rxdma_shutdown(arg)
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = arg;
|
|
|
|
DPRINTF(("%s: mb8795_rxdma_shutdown(), restarting.\n",sc->sc_dev.dv_xname));
|
|
|
|
nextdma_start(sc->sc_rx_nd, DMACSR_SETREAD);
|
|
}
|
|
|
|
|
|
/*
|
|
* load a dmamap with a freshly allocated mbuf
|
|
*/
|
|
struct mbuf *
|
|
mb8795_rxdmamap_load(sc,map)
|
|
struct mb8795_softc *sc;
|
|
bus_dmamap_t map;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
|
|
struct mbuf *m;
|
|
int error;
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if (m) {
|
|
MCLGET(m, M_DONTWAIT);
|
|
if ((m->m_flags & M_EXT) == 0) {
|
|
m_freem(m);
|
|
m = NULL;
|
|
} else {
|
|
m->m_len = MCLBYTES;
|
|
}
|
|
}
|
|
if (!m) {
|
|
/* @@@ Handle this gracefully by reusing a scratch buffer
|
|
* or something.
|
|
*/
|
|
panic("Unable to get memory for incoming ethernet\n");
|
|
}
|
|
|
|
/* Align buffer, @@@ next specific.
|
|
* perhaps should be using M_ALIGN here instead?
|
|
* First we give us a little room to align with.
|
|
*/
|
|
{
|
|
u_char *buf = m->m_data;
|
|
int buflen = m->m_len;
|
|
buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
|
|
REALIGN_DMABUF(buf, buflen);
|
|
m->m_data = buf;
|
|
m->m_len = buflen;
|
|
}
|
|
|
|
m->m_pkthdr.rcvif = ifp;
|
|
m->m_pkthdr.len = m->m_len;
|
|
|
|
error = bus_dmamap_load_mbuf(sc->sc_rx_dmat,
|
|
map, m, BUS_DMA_NOWAIT);
|
|
|
|
bus_dmamap_sync(sc->sc_rx_dmat, map, 0,
|
|
map->dm_mapsize, BUS_DMASYNC_PREREAD);
|
|
|
|
if (error) {
|
|
DPRINTF(("DEBUG: m->m_data = 0x%08x, m->m_len = %d\n",
|
|
m->m_data, m->m_len));
|
|
DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %d\n",
|
|
MCLBYTES, map->_dm_size));
|
|
|
|
panic("%s: can't load rx mbuf chain, error = %d\n",
|
|
sc->sc_dev.dv_xname, error);
|
|
m_freem(m);
|
|
m = NULL;
|
|
}
|
|
|
|
return(m);
|
|
}
|
|
|
|
bus_dmamap_t
|
|
mb8795_rxdma_continue(arg)
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = arg;
|
|
bus_dmamap_t map = NULL;
|
|
|
|
/*
|
|
* Currently, starts dumping new packets if the buffers
|
|
* fill up. This should probably reclaim unhandled
|
|
* buffers instead so we drop older packets instead
|
|
* of newer ones.
|
|
*/
|
|
if (((sc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS) != sc->sc_rx_handled_idx) {
|
|
sc->sc_rx_loaded_idx++;
|
|
sc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
|
|
map = sc->sc_rx_dmamap[sc->sc_rx_loaded_idx];
|
|
|
|
DPRINTF(("%s: mb8795_rxdma_continue() sc->sc_rx_loaded_idx = %d\nn",
|
|
sc->sc_dev.dv_xname,sc->sc_rx_loaded_idx));
|
|
}
|
|
#if (defined(DIAGNOSTIC))
|
|
else {
|
|
panic("%s: out of receive DMA buffers\n",sc->sc_dev.dv_xname);
|
|
}
|
|
#endif
|
|
|
|
return(map);
|
|
}
|
|
|
|
bus_dmamap_t
|
|
mb8795_txdma_continue(arg)
|
|
void *arg;
|
|
{
|
|
struct mb8795_softc *sc = arg;
|
|
bus_dmamap_t map;
|
|
|
|
DPRINTF(("%s: mb8795_txdma_continue()\n",sc->sc_dev.dv_xname));
|
|
|
|
if (sc->sc_tx_loaded) {
|
|
map = NULL;
|
|
} else {
|
|
map = sc->sc_tx_dmamap;
|
|
sc->sc_tx_loaded++;
|
|
}
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (sc->sc_tx_loaded != 1) {
|
|
panic("%s: sc->sc_tx_loaded is %d",sc->sc_dev.dv_xname,
|
|
sc->sc_tx_loaded);
|
|
}
|
|
#endif
|
|
|
|
return(map);
|
|
}
|
|
|
|
/****************************************************************/
|