0b956d0b8b
counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
8 lines
251 B
C
8 lines
251 B
C
/* $NetBSD: pmc.h,v 1.1 2002/08/07 05:15:34 briggs Exp $ */
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/*
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* Performance counters are "architecturally recommended" on MIPS
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* Some CPUs have them implemented, and some not.
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* Please feel free to add support for those that are implemented.
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*/
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