743 lines
22 KiB
C
743 lines
22 KiB
C
/* $NetBSD: aacreg.h,v 1.1 2002/04/26 02:05:11 ad Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Andrew Doran.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2000 Michael Smith
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* Copyright (c) 2000 Scott Long
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* Copyright (c) 2000 BSDi
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* Copyright (c) 2000 Niklas Hallqvist
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from FreeBSD: aacreg.h,v 1.1 2000/09/13 03:20:34 msmith Exp
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* via OpenBSD: aacreg.h,v 1.3 2001/06/12 15:40:29 niklas Exp
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*/
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/*
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* Data structures defining the interface between the driver and the Adaptec
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* 'FSA' adapters. Note that many field names and comments here are taken
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* verbatim from the Adaptec driver source in order to make comparing the
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* two slightly easier.
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*/
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#ifndef _PCI_AACREG_H_
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#define _PCI_AACREG_H_
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/*
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* Misc. magic numbers.
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*/
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#define AAC_MAX_CONTAINERS 64
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#define AAC_BLOCK_SIZE 512
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/*
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* Communications interface.
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*
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* Where datastructure layouts are closely parallel to the Adaptec sample code,
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* retain their naming conventions (for now) to aid in cross-referencing.
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*/
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/*
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* We establish 4 command queues and matching response queues. Queues must
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* be 16-byte aligned, and are sized as follows:
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*/
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#define AAC_HOST_NORM_CMD_ENTRIES 8 /* cmd adapter->host, normal pri */
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#define AAC_HOST_HIGH_CMD_ENTRIES 4 /* cmd adapter->host, high pri */
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#define AAC_ADAP_NORM_CMD_ENTRIES 512 /* cmd host->adapter, normal pri */
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#define AAC_ADAP_HIGH_CMD_ENTRIES 4 /* cmd host->adapter, high pri */
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#define AAC_HOST_NORM_RESP_ENTRIES 512 /* resp, adapter->host, normal pri */
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#define AAC_HOST_HIGH_RESP_ENTRIES 4 /* resp, adapter->host, high pri */
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#define AAC_ADAP_NORM_RESP_ENTRIES 8 /* resp, host->adapter, normal pri */
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#define AAC_ADAP_HIGH_RESP_ENTRIES 4 /* resp, host->adapter, high pri */
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#define AAC_TOTALQ_LENGTH \
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(AAC_HOST_HIGH_CMD_ENTRIES + AAC_HOST_NORM_CMD_ENTRIES + \
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AAC_ADAP_HIGH_CMD_ENTRIES + AAC_ADAP_NORM_CMD_ENTRIES + \
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AAC_HOST_HIGH_RESP_ENTRIES + AAC_HOST_NORM_RESP_ENTRIES + \
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AAC_ADAP_HIGH_RESP_ENTRIES + AAC_ADAP_NORM_RESP_ENTRIES)
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#define AAC_QUEUE_COUNT 8
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#define AAC_QUEUE_ALIGN 16
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struct aac_queue_entry {
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u_int32_t aq_fib_size; /* FIB size in bytes */
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u_int32_t aq_fib_addr; /* receiver-space address of the FIB */
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} __attribute__ ((__packed__));
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#define AAC_PRODUCER_INDEX 0
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#define AAC_CONSUMER_INDEX 1
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/*
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* Table of queue indices and queues used to communicate with the
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* controller. This structure must be aligned to AAC_QUEUE_ALIGN
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*/
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struct aac_queue_table {
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/* queue consumer/producer indexes (layout mandated by adapter) */
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u_int32_t qt_qindex[AAC_QUEUE_COUNT][2];
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/* queue entry structures (layout mandated by adapter) */
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struct aac_queue_entry qt_HostNormCmdQueue[AAC_HOST_NORM_CMD_ENTRIES];
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struct aac_queue_entry qt_HostHighCmdQueue[AAC_HOST_HIGH_CMD_ENTRIES];
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struct aac_queue_entry qt_AdapNormCmdQueue[AAC_ADAP_NORM_CMD_ENTRIES];
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struct aac_queue_entry qt_AdapHighCmdQueue[AAC_ADAP_HIGH_CMD_ENTRIES];
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struct aac_queue_entry
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qt_HostNormRespQueue[AAC_HOST_NORM_RESP_ENTRIES];
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struct aac_queue_entry
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qt_HostHighRespQueue[AAC_HOST_HIGH_RESP_ENTRIES];
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struct aac_queue_entry
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qt_AdapNormRespQueue[AAC_ADAP_NORM_RESP_ENTRIES];
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struct aac_queue_entry
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qt_AdapHighRespQueue[AAC_ADAP_HIGH_RESP_ENTRIES];
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} __attribute__ ((__packed__));
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/*
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* Adapter Init Structure: this is passed to the adapter with the
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* AAC_MONKER_INITSTRUCT command to point it at our control structures.
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*/
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struct aac_adapter_init {
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u_int32_t InitStructRevision;
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#define AAC_INIT_STRUCT_REVISION 3
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u_int32_t MiniPortRevision;
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u_int32_t FilesystemRevision;
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u_int32_t CommHeaderAddress;
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u_int32_t FastIoCommAreaAddress;
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u_int32_t AdapterFibsPhysicalAddress;
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void *AdapterFibsVirtualAddress;
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u_int32_t AdapterFibsSize;
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u_int32_t AdapterFibAlign;
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u_int32_t PrintfBufferAddress;
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u_int32_t PrintfBufferSize;
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u_int32_t HostPhysMemPages;
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u_int32_t HostElapsedSeconds;
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} __attribute__((__packed__));
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/*
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* Shared data types
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*/
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/*
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* Container types
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*/
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#define CT_NONE 0
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#define CT_VOLUME 1
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#define CT_MIRROR 2
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#define CT_STRIPE 3
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#define CT_RAID5 4
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#define CT_SSRW 5
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#define CT_SSRO 6
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#define CT_MORPH 7
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#define CT_PASSTHRU 8
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#define CT_RAID4 9
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#define CT_RAID10 10 /* stripe of mirror */
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#define CT_RAID00 11 /* stripe of stripe */
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#define CT_VOLUME_OF_MIRRORS 12 /* volume of mirror */
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#define CT_PSEUDO_RAID3 13 /* really raid4 */
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/*
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* Host-addressable object types
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*/
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#define FT_REG 1 /* regular file */
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#define FT_DIR 2 /* directory */
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#define FT_BLK 3 /* "block" device - reserved */
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#define FT_CHR 4 /* "character special" device - reserved */
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#define FT_LNK 5 /* symbolic link */
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#define FT_SOCK 6 /* socket */
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#define FT_FIFO 7 /* fifo */
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#define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
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#define FT_DRIVE 9 /* phys disk - addressable in scsi by bus/target/lun */
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#define FT_SLICE 10 /* virtual disk - raw volume - slice */
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#define FT_PARTITION 11 /* FSA part, inside slice, container building block */
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#define FT_VOLUME 12 /* Container - Volume Set */
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#define FT_STRIPE 13 /* Container - Stripe Set */
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#define FT_MIRROR 14 /* Container - Mirror Set */
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#define FT_RAID5 15 /* Container - Raid 5 Set */
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#define FT_DATABASE 16 /* Storage object with "foreign" content manager */
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/*
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* Host-side scatter/gather list for 32-bit commands.
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*/
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struct aac_sg_entry {
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u_int32_t SgAddress;
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u_int32_t SgByteCount;
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} __attribute__ ((__packed__));
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struct aac_sg_table {
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u_int32_t SgCount;
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struct aac_sg_entry SgEntry[0]; /* XXX */
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} __attribute__ ((__packed__));
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/*
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* Host-side scatter/gather list for 64-bit commands.
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*/
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struct aac_sg_table64 {
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u_int8_t SgCount;
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u_int8_t SgSectorsPerPage;
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u_int16_t SgByteOffset;
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u_int64_t SgEntry[0];
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} __attribute__ ((__packed__));
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/*
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* Container creation data
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*/
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struct aac_container_creation {
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u_int8_t ViaBuildNumber;
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u_int8_t MicroSecond;
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u_int8_t Via; /* 1 = FSU, 2 = API, etc. */
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u_int8_t YearsSince1900;
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u_int32_t Month:4; /* 1-12 */
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u_int32_t Day:6; /* 1-32 */
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u_int32_t Hour:6; /* 0-23 */
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u_int32_t Minute:6; /* 0-59 */
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u_int32_t Second:6; /* 0-59 */
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u_int64_t ViaAdapterSerialNumber;
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} __attribute__ ((__packed__));
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struct FsaRevision {
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union {
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struct {
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u_int8_t dash;
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u_int8_t type;
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u_int8_t minor;
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u_int8_t major;
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} comp;
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u_int32_t ul;
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} external;
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u_int32_t buildNumber;
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} __attribute__((__packed__));
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/*
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* Adapter Information
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*/
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#define CPU_NTSIM 1
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#define CPU_I960 2
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#define CPU_ARM 3
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#define CPU_SPARC 4
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#define CPU_POWERPC 5
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#define CPU_ALPHA 6
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#define CPU_P7 7
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#define CPU_I960_RX 8
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#define CPU__last 9
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#define CPUI960_JX 1
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#define CPUI960_CX 2
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#define CPUI960_HX 3
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#define CPUI960_RX 4
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#define CPUARM_SA110 5
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#define CPUARM_xxx 6
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#define CPUPPC_603e 7
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#define CPUPPC_xxx 8
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#define CPUSUBTYPE__last 9
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#define PLAT_NTSIM 1
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#define PLAT_V3ADU 2
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#define PLAT_CYCLONE 3
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#define PLAT_CYCLONE_HD 4
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#define PLAT_BATBOARD 5
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#define PLAT_BATBOARD_HD 6
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#define PLAT_YOLO 7
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#define PLAT_COBRA 8
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#define PLAT_ANAHEIM 9
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#define PLAT_JALAPENO 10
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#define PLAT_QUEENS 11
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#define PLAT_JALAPENO_DELL 12
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#define PLAT_POBLANO 13
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#define PLAT_POBLANO_OPAL 14
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#define PLAT_POBLANO_SL0 15
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#define PLAT_POBLANO_SL1 16
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#define PLAT_POBLANO_SL2 17
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#define PLAT_POBLANO_XXX 18
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#define PLAT_JALAPENO_P2 19
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#define PLAT_HABANERO 20
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#define PLAT__last 21
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#define OEM_FLAVOR_ADAPTEC 1
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#define OEM_FLAVOR_DELL 2
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#define OEM_FLAVOR_HP 3
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#define OEM_FLAVOR_IBM 4
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#define OEM_FLAVOR_CPQ 5
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#define OEM_FLAVOR_BRAND_X 6
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#define OEM_FLAVOR_BRAND_Y 7
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#define OEM_FLAVOR_BRAND_Z 8
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#define OEM_FLAVOR__last 9
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/*
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* XXX the aac-2622 with no battery present reports PLATFORM_BAT_OPT_PRESENT
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*/
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#define PLATFORM_BAT_REQ_PRESENT 1 /* BATTERY REQUIRED AND PRESENT */
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#define PLATFORM_BAT_REQ_NOTPRESENT 2 /* BATTERY REQUIRED AND NOT PRESENT */
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#define PLATFORM_BAT_OPT_PRESENT 3 /* BATTERY OPTIONAL AND PRESENT */
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#define PLATFORM_BAT_OPT_NOTPRESENT 4 /* BATTERY OPTIONAL AND NOT PRESENT */
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#define PLATFORM_BAT_NOT_SUPPORTED 5 /* BATTERY NOT SUPPORTED */
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/*
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* Structure used to respond to a RequestAdapterInfo fib.
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*/
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struct aac_adapter_info {
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u_int32_t PlatformBase; /* adapter type */
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u_int32_t CpuArchitecture; /* adapter CPU type */
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u_int32_t CpuVariant; /* adapter CPU subtype */
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u_int32_t ClockSpeed; /* adapter CPU clockspeed */
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u_int32_t ExecutionMem; /* adapter Execution Memory size */
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u_int32_t BufferMem; /* adapter Data Memory */
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u_int32_t TotalMem; /* adapter Total Memory */
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struct FsaRevision KernelRevision; /* adapter Kernel SW Revision */
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struct FsaRevision MonitorRevision; /* adapter Monitor/Diag SW Rev */
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struct FsaRevision HardwareRevision; /* TDB */
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struct FsaRevision BIOSRevision; /* adapter BIOS Revision */
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u_int32_t ClusteringEnabled;
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u_int32_t ClusterChannelMask;
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u_int64_t SerialNumber;
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u_int32_t batteryPlatform;
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u_int32_t SupportedOptions; /* supported features of this ctrlr */
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u_int32_t OemVariant;
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} __attribute__((__packed__));
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/*
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* Monitor/Kernel interface.
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*/
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/*
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* Synchronous commands to the monitor/kernel.
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*/
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#define AAC_MONKER_INITSTRUCT 0x05
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#define AAC_MONKER_SYNCFIB 0x0c
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#define AAC_MONKER_GETKERNVER 0x11
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/*
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* Command status values
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*/
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#define ST_OK 0
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#define ST_PERM 1
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#define ST_NOENT 2
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#define ST_IO 5
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#define ST_NXIO 6
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#define ST_E2BIG 7
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#define ST_ACCES 13
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#define ST_EXIST 17
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#define ST_XDEV 18
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#define ST_NODEV 19
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#define ST_NOTDIR 20
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#define ST_ISDIR 21
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#define ST_INVAL 22
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#define ST_FBIG 27
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#define ST_NOSPC 28
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#define ST_ROFS 30
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#define ST_MLINK 31
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#define ST_WOULDBLOCK 35
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#define ST_NAMETOOLONG 63
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#define ST_NOTEMPTY 66
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#define ST_DQUOT 69
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#define ST_STALE 70
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#define ST_REMOTE 71
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#define ST_BADHANDLE 10001
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#define ST_NOT_SYNC 10002
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#define ST_BAD_COOKIE 10003
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#define ST_NOTSUPP 10004
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#define ST_TOOSMALL 10005
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#define ST_SERVERFAULT 10006
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#define ST_BADTYPE 10007
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#define ST_JUKEBOX 10008
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#define ST_NOTMOUNTED 10009
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#define ST_MAINTMODE 10010
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#define ST_STALEACL 10011
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/*
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* Volume manager commands
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*/
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#define VM_Null 0
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#define VM_NameServe 1
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#define VM_ContainerConfig 2
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#define VM_Ioctl 3
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#define VM_FilesystemIoctl 4
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#define VM_CloseAll 5
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#define VM_CtBlockRead 6
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#define VM_CtBlockWrite 7
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#define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
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#define VM_SliceBlockWrite 9
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#define VM_DriveBlockRead 10 /* raw access to physical devices */
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#define VM_DriveBlockWrite 11
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#define VM_EnclosureMgt 12 /* enclosure management */
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#define VM_Unused 13 /* used to be diskset management */
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#define VM_CtBlockVerify 14
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#define VM_CtPerf 15 /* performance test */
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#define VM_CtBlockRead64 16
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#define VM_CtBlockWrite64 17
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#define VM_CtBlockVerify64 18
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/*
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* "Mountable object"
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*/
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struct aac_mntobj {
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u_int32_t ObjectId;
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char FileSystemName[16];
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struct aac_container_creation CreateInfo;
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u_int32_t Capacity;
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u_int32_t VolType;
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u_int32_t ObjType;
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u_int32_t ContentState;
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#define AAC_FSCS_READONLY 0x0002 /* XXX need more information than this */
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union {
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u_int32_t pad[8];
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} ObjExtension;
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u_int32_t AlterEgoId;
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} __attribute__ ((__packed__));
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struct aac_mntinfo {
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u_int32_t Command;
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u_int32_t MntType;
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u_int32_t MntCount;
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} __attribute__ ((__packed__));
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struct aac_mntinforesponse {
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u_int32_t Status;
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u_int32_t MntType;
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u_int32_t MntRespCount;
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struct aac_mntobj MntTable[1];
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} __attribute__ ((__packed__));
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/*
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* Write 'stability' options.
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*/
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#define CSTABLE 1
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#define CUNSTABLE 2
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/*
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* Commit level response for a write request.
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*/
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#define CMFILE_SYNC_NVRAM 1
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#define CMDATA_SYNC_NVRAM 2
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#define CMFILE_SYNC 3
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#define CMDATA_SYNC 4
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#define CMUNSTABLE 5
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/*
|
|
* Block read/write operations. These structures are packed into the 'data'
|
|
* area in the FIB.
|
|
*/
|
|
struct aac_blockread {
|
|
u_int32_t Command; /* not FSACommand! */
|
|
u_int32_t ContainerId;
|
|
u_int32_t BlockNumber;
|
|
u_int32_t ByteCount;
|
|
struct aac_sg_table SgMap; /* variable size */
|
|
} __attribute__ ((__packed__));
|
|
|
|
struct aac_blockread_response {
|
|
u_int32_t Status;
|
|
u_int32_t ByteCount;
|
|
} __attribute__ ((__packed__));
|
|
|
|
struct aac_blockwrite {
|
|
u_int32_t Command; /* not FSACommand! */
|
|
u_int32_t ContainerId;
|
|
u_int32_t BlockNumber;
|
|
u_int32_t ByteCount;
|
|
u_int32_t Stable;
|
|
struct aac_sg_table SgMap; /* variable size */
|
|
} __attribute__ ((__packed__));
|
|
|
|
struct aac_blockwrite_response {
|
|
u_int32_t Status;
|
|
u_int32_t ByteCount;
|
|
u_int32_t Committed;
|
|
} __attribute__ ((__packed__));
|
|
|
|
struct aac_close_command {
|
|
u_int32_t Command;
|
|
u_int32_t ContainerId;
|
|
} __attribute__ ((__packed__));
|
|
|
|
/*
|
|
* Register definitions for the Adaptec AAC-364 'Jalapeno I/II' adapters, based
|
|
* on the SA110 'StrongArm'.
|
|
*/
|
|
|
|
#define AAC_REGSIZE 0x100
|
|
|
|
/* doorbell 0 (adapter->host) */
|
|
#define AAC_SA_DOORBELL0_CLEAR 0x98
|
|
#define AAC_SA_DOORBELL0_SET 0x9c
|
|
#define AAC_SA_DOORBELL0 0x9c
|
|
#define AAC_SA_MASK0_CLEAR 0xa0
|
|
#define AAC_SA_MASK0_SET 0xa4
|
|
|
|
/* doorbell 1 (host->adapter) */
|
|
#define AAC_SA_DOORBELL1_CLEAR 0x9a
|
|
#define AAC_SA_DOORBELL1_SET 0x9e
|
|
#define AAC_SA_MASK1_CLEAR 0xa2
|
|
#define AAC_SA_MASK1_SET 0xa6
|
|
|
|
/* mailbox (20 bytes) */
|
|
#define AAC_SA_MAILBOX 0xa8
|
|
#define AAC_SA_FWSTATUS 0xc4
|
|
|
|
/*
|
|
* Register definitions for the Adaptec 'Pablano' adapters, based on the
|
|
* i960Rx, and other related adapters.
|
|
*/
|
|
|
|
#define AAC_RX_IDBR 0x20 /* inbound doorbell */
|
|
#define AAC_RX_IISR 0x24 /* inbound interrupt status */
|
|
#define AAC_RX_IIMR 0x28 /* inbound interrupt mask */
|
|
#define AAC_RX_ODBR 0x2c /* outbound doorbell */
|
|
#define AAC_RX_OISR 0x30 /* outbound interrupt status */
|
|
#define AAC_RX_OIMR 0x34 /* outbound interrupt mask */
|
|
|
|
#define AAC_RX_MAILBOX 0x50 /* mailbox (20 bytes) */
|
|
#define AAC_RX_FWSTATUS 0x6c
|
|
|
|
/*
|
|
* Common bit definitions for the doorbell registers.
|
|
*/
|
|
|
|
/*
|
|
* Status bits in the doorbell registers.
|
|
*/
|
|
#define AAC_DB_SYNC_COMMAND (1<<0) /* send/completed synchronous FIB */
|
|
#define AAC_DB_COMMAND_READY (1<<1) /* posted one or more commands */
|
|
#define AAC_DB_RESPONSE_READY (1<<2) /* one or more commands complete */
|
|
#define AAC_DB_COMMAND_NOT_FULL (1<<3) /* command queue not full */
|
|
#define AAC_DB_RESPONSE_NOT_FULL (1<<4) /* response queue not full */
|
|
|
|
/*
|
|
* The adapter can request the host print a message by setting the
|
|
* DB_PRINTF flag in DOORBELL0. The driver responds by collecting the
|
|
* message from the printf buffer, clearing the DB_PRINTF flag in
|
|
* DOORBELL0 and setting it in DOORBELL1.
|
|
* (ODBR and IDBR respectively for the i960Rx adapters)
|
|
*/
|
|
#define AAC_DB_PRINTF (1<<5)
|
|
|
|
/*
|
|
* Mask containing the interrupt bits we care about. We don't anticipate
|
|
* (or want) interrupts not in this mask.
|
|
*/
|
|
#define AAC_DB_INTERRUPTS \
|
|
(AAC_DB_COMMAND_READY | AAC_DB_RESPONSE_READY | AAC_DB_PRINTF)
|
|
|
|
/*
|
|
* Queue names
|
|
*
|
|
* Note that we base these at 0 in order to use them as array indices. Adaptec
|
|
* used base 1 for some unknown reason, and sorted them in a different order.
|
|
*/
|
|
#define AAC_HOST_NORM_CMD_QUEUE 0
|
|
#define AAC_HOST_HIGH_CMD_QUEUE 1
|
|
#define AAC_ADAP_NORM_CMD_QUEUE 2
|
|
#define AAC_ADAP_HIGH_CMD_QUEUE 3
|
|
#define AAC_HOST_NORM_RESP_QUEUE 4
|
|
#define AAC_HOST_HIGH_RESP_QUEUE 5
|
|
#define AAC_ADAP_NORM_RESP_QUEUE 6
|
|
#define AAC_ADAP_HIGH_RESP_QUEUE 7
|
|
|
|
/*
|
|
* List structure used to chain FIBs (used by the adapter - we hang FIBs off
|
|
* our private command structure and don't touch these)
|
|
*/
|
|
struct aac_fib_list_entry {
|
|
struct fib_list_entry *Flink;
|
|
struct fib_list_entry *Blink;
|
|
} __attribute__((__packed__));
|
|
|
|
/*
|
|
* FIB (FSA Interface Block?); this is the datastructure passed between the
|
|
* host and adapter.
|
|
*/
|
|
struct aac_fib_header {
|
|
u_int32_t XferState;
|
|
u_int16_t Command;
|
|
u_int8_t StructType;
|
|
u_int8_t Flags;
|
|
u_int16_t Size;
|
|
u_int16_t SenderSize;
|
|
u_int32_t SenderFibAddress;
|
|
u_int32_t ReceiverFibAddress;
|
|
u_int32_t SenderData;
|
|
union {
|
|
struct {
|
|
u_int32_t ReceiverTimeStart;
|
|
u_int32_t ReceiverTimeDone;
|
|
} _s;
|
|
struct aac_fib_list_entry FibLinks;
|
|
} _u;
|
|
} __attribute__((__packed__));
|
|
|
|
#define AAC_FIB_DATASIZE (512 - sizeof(struct aac_fib_header))
|
|
|
|
struct aac_fib {
|
|
struct aac_fib_header Header;
|
|
u_int8_t data[AAC_FIB_DATASIZE];
|
|
} __attribute__((__packed__));
|
|
|
|
/*
|
|
* FIB commands
|
|
*/
|
|
#define TestCommandResponse 1
|
|
#define TestAdapterCommand 2
|
|
|
|
/* Lowlevel and comm commands */
|
|
#define LastTestCommand 100
|
|
#define ReinitHostNormCommandQueue 101
|
|
#define ReinitHostHighCommandQueue 102
|
|
#define ReinitHostHighRespQueue 103
|
|
#define ReinitHostNormRespQueue 104
|
|
#define ReinitAdapNormCommandQueue 105
|
|
#define ReinitAdapHighCommandQueue 107
|
|
#define ReinitAdapHighRespQueue 108
|
|
#define ReinitAdapNormRespQueue 109
|
|
#define InterfaceShutdown 110
|
|
#define DmaCommandFib 120
|
|
#define StartProfile 121
|
|
#define TermProfile 122
|
|
#define SpeedTest 123
|
|
#define TakeABreakPt 124
|
|
#define RequestPerfData 125
|
|
#define SetInterruptDefTimer 126
|
|
#define SetInterruptDefCount 127
|
|
#define GetInterruptDefStatus 128
|
|
#define LastCommCommand 129
|
|
|
|
/* filesystem commands */
|
|
#define NuFileSystem 300
|
|
#define UFS 301
|
|
#define HostFileSystem 302
|
|
#define LastFileSystemCommand 303
|
|
|
|
/* Container Commands */
|
|
#define ContainerCommand 500
|
|
#define ContainerCommand64 501
|
|
|
|
/* Cluster Commands */
|
|
#define ClusterCommand 550
|
|
|
|
/* Scsi Port commands (scsi passthrough) */
|
|
#define ScsiPortCommand 600
|
|
|
|
/* Misc house keeping and generic adapter initiated commands */
|
|
#define AifRequest 700
|
|
#define CheckRevision 701
|
|
#define FsaHostShutdown 702
|
|
#define RequestAdapterInfo 703
|
|
#define IsAdapterPaused 704
|
|
#define SendHostTime 705
|
|
#define LastMiscCommand 706
|
|
|
|
/*
|
|
* FIB types
|
|
*/
|
|
#define AAC_FIBTYPE_TFIB 1
|
|
#define AAC_FIBTYPE_TQE 2
|
|
#define AAC_FIBTYPE_TCTPERF 3
|
|
|
|
/*
|
|
* FIB transfer state
|
|
*/
|
|
#define AAC_FIBSTATE_HOSTOWNED (1<<0) /* owned by the host */
|
|
#define AAC_FIBSTATE_ADAPTEROWNED (1<<1) /* owned by the adapter */
|
|
#define AAC_FIBSTATE_INITIALISED (1<<2) /* initialised */
|
|
#define AAC_FIBSTATE_EMPTY (1<<3) /* empty */
|
|
#define AAC_FIBSTATE_FROMPOOL (1<<4) /* allocated from pool */
|
|
#define AAC_FIBSTATE_FROMHOST (1<<5) /* sent from the host */
|
|
#define AAC_FIBSTATE_FROMADAP (1<<6) /* sent from the adapter */
|
|
#define AAC_FIBSTATE_REXPECTED (1<<7) /* response is expected */
|
|
#define AAC_FIBSTATE_RNOTEXPECTED (1<<8) /* response is not expected */
|
|
#define AAC_FIBSTATE_DONEADAP (1<<9) /* processed by the adapter */
|
|
#define AAC_FIBSTATE_DONEHOST (1<<10) /* processed by the host */
|
|
#define AAC_FIBSTATE_HIGH (1<<11) /* high priority */
|
|
#define AAC_FIBSTATE_NORM (1<<12) /* normal priority */
|
|
#define AAC_FIBSTATE_ASYNC (1<<13)
|
|
#define AAC_FIBSTATE_ASYNCIO (1<<13) /* to be removed */
|
|
#define AAC_FIBSTATE_PAGEFILEIO (1<<14) /* to be removed */
|
|
#define AAC_FIBSTATE_SHUTDOWN (1<<15)
|
|
#define AAC_FIBSTATE_LAZYWRITE (1<<16) /* to be removed */
|
|
#define AAC_FIBSTATE_ADAPMICROFIB (1<<17)
|
|
#define AAC_FIBSTATE_BIOSFIB (1<<18)
|
|
#define AAC_FIBSTATE_FAST_RESPONSE (1<<19) /* fast response capable */
|
|
#define AAC_FIBSTATE_APIFIB (1<<20)
|
|
|
|
/*
|
|
* FIB error values
|
|
*/
|
|
#define AAC_ERROR_NORMAL 0x00
|
|
#define AAC_ERROR_PENDING 0x01
|
|
#define AAC_ERROR_FATAL 0x02
|
|
#define AAC_ERROR_INVALID_QUEUE 0x03
|
|
#define AAC_ERROR_NOENTRIES 0x04
|
|
#define AAC_ERROR_SENDFAILED 0x05
|
|
#define AAC_ERROR_INVALID_QUEUE_PRIORITY 0x06
|
|
#define AAC_ERROR_FIB_ALLOCATION_FAILED 0x07
|
|
#define AAC_ERROR_FIB_DEALLOCATION_FAILED 0x08
|
|
|
|
/*
|
|
* Adapter Status Register
|
|
*
|
|
* Phase Staus mailbox is 32bits:
|
|
* <31:16> = Phase Status
|
|
* <15:0> = Phase
|
|
*
|
|
* The adapter reports its present state through the phase. Only
|
|
* a single phase should be ever be set. Each phase can have multiple
|
|
* phase status bits to provide more detailed information about the
|
|
* state of the adapter.
|
|
*/
|
|
#define AAC_SELF_TEST_FAILED 0x00000004
|
|
#define AAC_UP_AND_RUNNING 0x00000080
|
|
#define AAC_KERNEL_PANIC 0x00000100
|
|
|
|
#endif /* !_PCI_AACREG_H_ */
|