224 lines
6.5 KiB
C
224 lines
6.5 KiB
C
/* $NetBSD: i82365var.h,v 1.15 2000/03/23 07:01:31 thorpej Exp $ */
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/*
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* Copyright (c) 1997 Marc Horowitz. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Marc Horowitz.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/device.h>
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#include <sys/callout.h>
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#include <sys/lock.h>
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#include <dev/pcmcia/pcmciareg.h>
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#include <dev/pcmcia/pcmciachip.h>
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#include <dev/ic/i82365reg.h>
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struct proc;
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struct pcic_event {
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SIMPLEQ_ENTRY(pcic_event) pe_q;
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int pe_type;
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};
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/* pe_type */
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#define PCIC_EVENT_INSERTION 0
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#define PCIC_EVENT_REMOVAL 1
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struct pcic_handle {
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struct device *ph_parent;
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bus_space_tag_t ph_bus_t; /* I/O or MEM? I don't mind */
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bus_space_handle_t ph_bus_h;
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u_int8_t (*ph_read) __P((struct pcic_handle *, int));
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void (*ph_write) __P((struct pcic_handle *, int, u_int8_t));
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int vendor; /* vendor of chip */
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int chip; /* chip index 0 or 1 */
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int sock;
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int flags;
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int laststate;
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int memalloc;
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struct {
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bus_addr_t addr;
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bus_size_t size;
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long offset;
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int kind;
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} mem[PCIC_MEM_WINS];
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int ioalloc;
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struct {
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bus_addr_t addr;
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bus_size_t size;
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int width;
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} io[PCIC_IO_WINS];
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int ih_irq;
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struct device *pcmcia;
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int shutdown;
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struct proc *event_thread;
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SIMPLEQ_HEAD(, pcic_event) events;
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};
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#define PCIC_FLAG_SOCKETP 0x0001
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#define PCIC_FLAG_CARDP 0x0002
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#define PCIC_FLAG_ENABLED 0x0004
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#define PCIC_LASTSTATE_PRESENT 0x0002
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#define PCIC_LASTSTATE_HALF 0x0001
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#define PCIC_LASTSTATE_EMPTY 0x0000
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#define C0SA 0
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#define C0SB PCIC_SOCKET_OFFSET
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#define C1SA PCIC_CHIP_OFFSET
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#define C1SB PCIC_CHIP_OFFSET + PCIC_SOCKET_OFFSET
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#define PCIC_VENDOR_UNKNOWN 0
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#define PCIC_VENDOR_I82365SLR0 1
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#define PCIC_VENDOR_I82365SLR1 2
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#define PCIC_VENDOR_CIRRUS_PD6710 3
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#define PCIC_VENDOR_CIRRUS_PD672X 4
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/*
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* This is sort of arbitrary. It merely needs to be "enough". It can be
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* overridden in the conf file, anyway.
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*/
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#define PCIC_MEM_PAGES 4
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#define PCIC_MEMSIZE PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
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#define PCIC_NSLOTS 4
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struct pcic_softc {
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struct device dev;
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bus_space_tag_t memt;
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bus_space_handle_t memh;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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struct callout poll_ch;
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int poll_established;
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pcmcia_chipset_tag_t pct;
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struct lock sc_pcic_lock;
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/* this needs to be large enough to hold PCIC_MEM_PAGES bits */
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int subregionmask;
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#define PCIC_MAX_MEM_PAGES (8 * sizeof(int))
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/* used by memory window mapping functions */
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bus_addr_t membase;
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/*
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* used by io window mapping functions. These can actually overlap
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* with another pcic, since the underlying extent mapper will deal
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* with individual allocations. This is here to deal with the fact
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* that different busses have different real widths (different pc
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* hardware seems to use 10 or 12 bits for the I/O bus).
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*/
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bus_addr_t iobase;
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bus_addr_t iosize;
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int irq;
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void *ih;
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struct pcic_handle handle[PCIC_NSLOTS];
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/* for use by underlying chip code for discovering irqs */
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int intr_detect, intr_false;
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int intr_mask[PCIC_NSLOTS / 2]; /* probed intterupts if possible */
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};
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int pcic_ident_ok __P((int));
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int pcic_vendor __P((struct pcic_handle *));
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char *pcic_vendor_to_string __P((int));
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void pcic_attach __P((struct pcic_softc *));
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void pcic_attach_sockets __P((struct pcic_softc *));
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void pcic_attach_sockets_finish __P((struct pcic_softc *));
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int pcic_intr __P((void *arg));
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/*
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static inline int pcic_read __P((struct pcic_handle *, int));
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static inline void pcic_write __P((struct pcic_handle *, int, u_int8_t));
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*/
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int pcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t,
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struct pcmcia_mem_handle *));
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void pcic_chip_mem_free __P((pcmcia_chipset_handle_t,
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struct pcmcia_mem_handle *));
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int pcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
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bus_size_t, struct pcmcia_mem_handle *, bus_addr_t *, int *));
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void pcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int));
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int pcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t,
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bus_size_t, bus_size_t, struct pcmcia_io_handle *));
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void pcic_chip_io_free __P((pcmcia_chipset_handle_t,
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struct pcmcia_io_handle *));
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int pcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
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bus_size_t, struct pcmcia_io_handle *, int *));
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void pcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int));
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void pcic_chip_socket_enable __P((pcmcia_chipset_handle_t));
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void pcic_chip_socket_disable __P((pcmcia_chipset_handle_t));
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#if 0
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static __inline int pcic_read __P((struct pcic_handle *, int));
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static __inline int
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pcic_read(h, idx)
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struct pcic_handle *h;
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int idx;
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{
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if (idx != -1)
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bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX,
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h->sock + idx);
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return (bus_space_read_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA));
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}
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static __inline void pcic_write __P((struct pcic_handle *, int, int));
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static __inline void
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pcic_write(h, idx, data)
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struct pcic_handle *h;
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int idx;
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int data;
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{
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if (idx != -1)
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bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX,
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h->sock + idx);
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bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA, (data));
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}
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#else
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#define pcic_read(h, idx) \
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(*(h)->ph_read)((h), (idx))
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#define pcic_write(h, idx, data) \
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(*(h)->ph_write)((h), (idx), (data))
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#endif
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