242 lines
6.7 KiB
C
242 lines
6.7 KiB
C
/* $NetBSD: omap_rtc.c,v 1.5 2011/07/01 20:30:21 dyoung Exp $ */
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/*
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* OMAP RTC driver, based on i80321_timer.c.
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*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Microsoft
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: omap_rtc.c,v 1.5 2011/07/01 20:30:21 dyoung Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/time.h>
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#include <sys/device.h>
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#include <dev/clock_subr.h>
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#include <sys/bus.h>
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#include <machine/intr.h>
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#include <arm/omap/omap_reg.h>
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#include <arm/omap/omap_tipb.h>
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/* RTC year values relative to this year */
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#define BASEYEAR 2000
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/* Register offsets and bit fields. */
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#define SECONDS_REG 0x00
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#define MINUTES_REG 0x04
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#define HOURS_REG 0x08
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#define DAYS_REG 0x0c
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#define MONTHS_REG 0x10
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#define YEARS_REG 0x14
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#define WEEKS_REG 0x18
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#define ALARM_SECONDS_REG 0x20
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#define ALARM_MINUTES_REG 0x24
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#define ALARM_HOURS_REG 0x28
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#define ALARM_DAYS_REG 0x2c
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#define ALARM_MONTHS_REG 0x30
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#define ALARM_YEARS_REG 0x34
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#define RTC_CTRL_REG 0x40
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#define STOP_RTC 0
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#define RTC_STATUS_REG 0x44
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#define ALARM 6
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#define BUSY 0
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#define RTC_INTERRUPTS_REG 0x48
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#define IT_ALARM 3
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static int omaprtc_match(device_t, cfdata_t, void *);
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static void omaprtc_attach(device_t, device_t, void *);
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struct omaprtc_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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int sc_intr;
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void *sc_irqcookie;
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struct todr_chip_handle sc_todr;
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};
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CFATTACH_DECL_NEW(omaprtc, sizeof(struct omaprtc_softc),
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omaprtc_match, omaprtc_attach, NULL, NULL);
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static int omaprtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
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static int omaprtc_settime(todr_chip_handle_t, struct clock_ymdhms *);
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#define rtc_is_busy() (bus_space_read_1(sc->sc_iot, sc->sc_ioh, \
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RTC_STATUS_REG) & 1<<BUSY)
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static int
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omaprtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
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{
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struct omaprtc_softc *sc = tch->cookie;
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int s;
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/* Wait for RTC_STATUS_REG:BUSY to go low to
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* guarantee our read is correct. BUSY will
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* only be high for one 32kHz period (30.5us)
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* each second, so we'll usually pass right
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* through.
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*
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* Watch RTC_CTRL_REG:STOP_RTC as well so
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* we don't spin forever if someone disables the RTC.
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*
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* Turn interrupts off, because we are only allowed
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* to read/write the registers for 1/2 of a 32kHz
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* clock period (= 15us) after detecting that BUSY
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* is low.
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*/
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s = disable_interrupts(I32_bit);
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while (rtc_is_busy()) {
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;
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}
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dt->dt_year =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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YEARS_REG)) + BASEYEAR;
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dt->dt_mon =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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MONTHS_REG));
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dt->dt_wday =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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WEEKS_REG) & 0x0f);
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dt->dt_day =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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DAYS_REG));
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dt->dt_sec =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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SECONDS_REG));
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dt->dt_hour =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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HOURS_REG));
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dt->dt_min =
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FROMBCD(bus_space_read_1(sc->sc_iot,
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sc->sc_ioh,
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MINUTES_REG));
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restore_interrupts(s);
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return 0;
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}
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static int
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omaprtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
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{
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struct omaprtc_softc *sc = tch->cookie;
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int s;
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s = disable_interrupts(I32_bit);
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while (rtc_is_busy()) {
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;
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}
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/* It's ok to write these without stopping the
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* RTC, because the BUSY mechanism lets us guarantee
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* that we're not in the middle of, e.g., rolling
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* seconds into minutes.
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*/
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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YEARS_REG, TOBCD(dt->dt_year - BASEYEAR));
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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MONTHS_REG, TOBCD(dt->dt_mon));
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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WEEKS_REG, TOBCD(dt->dt_wday & 0x0f));
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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DAYS_REG, TOBCD(dt->dt_day));
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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SECONDS_REG, TOBCD(dt->dt_sec));
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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HOURS_REG, TOBCD(dt->dt_hour));
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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MINUTES_REG, TOBCD(dt->dt_min));
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restore_interrupts(s);
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return 0;
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}
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static int
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omaprtc_match(device_t parent, cfdata_t match, void *aux)
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{
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struct tipb_attach_args *tipb = aux;
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if (tipb->tipb_addr == -1)
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panic("omaprtc must have addr specified in config.");
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if (tipb->tipb_size == 0)
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tipb->tipb_size = 2048; /* Per the OMAP TRM. */
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/* We implicitly trust the config file. */
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return (1);
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}
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void
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omaprtc_attach(device_t parent, device_t self, void *aux)
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{
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struct omaprtc_softc *sc = device_private(self);
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struct tipb_attach_args *tipb = aux;
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sc->sc_iot = tipb->tipb_iot;
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sc->sc_intr = tipb->tipb_intr;
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if (bus_space_map(tipb->tipb_iot, tipb->tipb_addr, tipb->tipb_size, 0,
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&sc->sc_ioh))
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panic("%s: Cannot map registers", device_xname(self));
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aprint_normal(": OMAP RTC\n");
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aprint_naive("\n");
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/*
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* Start RTC (STOP_RTC=1 starts it, go figure), 24 hour mode,
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* no autocompensation, no rounding, 32KHz clock enabled,
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* cannot use split power, no test mode.
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*/
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_CTRL_REG,
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1 << STOP_RTC);
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime_ymdhms = omaprtc_gettime;
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sc->sc_todr.todr_settime_ymdhms = omaprtc_settime;
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todr_attach(&sc->sc_todr);
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}
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