254 lines
8.1 KiB
C
254 lines
8.1 KiB
C
/* $NetBSD: am335x_prcm.c,v 1.6 2013/08/17 00:40:10 matt Exp $ */
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/*
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* TI OMAP Power, Reset, and Clock Management on the AM335x
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*/
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Taylor R. Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: am335x_prcm.c,v 1.6 2013/08/17 00:40:10 matt Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <sys/pmf.h>
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#include <arm/omap/am335x_prcm.h>
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#include <arm/omap/omap2_reg.h>
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#include <arm/omap/omap2_prcm.h>
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#include <arm/omap/omap_var.h>
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#define AM335X_CLKCTRL_MODULEMODE_MASK __BITS(0, 1)
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#define AM335X_CLKCTRL_MODULEMODE_DISABLED 0
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#define AM335X_CLKCTRL_MODULEMODE_ENABLE 2
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static void
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am335x_prcm_check_clkctrl(bus_size_t cm_module,
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bus_size_t clkctrl_reg, uint32_t v)
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{
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#ifdef DIAGNOSTIC
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uint32_t u = prcm_read_4(cm_module, clkctrl_reg);
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if (__SHIFTOUT(u, AM335X_CLKCTRL_MODULEMODE_MASK) !=
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__SHIFTOUT(v, AM335X_CLKCTRL_MODULEMODE_MASK))
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aprint_error("clkctrl didn't take: %"PRIx32" -/-> %"PRIx32"\n",
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u, v);
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#else
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(void)cm_module;
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(void)clkctrl_reg;
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(void)v;
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#endif
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}
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void
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prcm_module_enable(const struct omap_module *om)
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{
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bus_size_t cm_module = om->om_prcm_cm_module;
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bus_size_t clkctrl_reg = om->om_prcm_cm_clkctrl_reg;
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uint32_t clkctrl;
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clkctrl = prcm_read_4(cm_module, clkctrl_reg);
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clkctrl &=~ AM335X_CLKCTRL_MODULEMODE_MASK;
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clkctrl |= __SHIFTIN(AM335X_CLKCTRL_MODULEMODE_ENABLE,
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AM335X_CLKCTRL_MODULEMODE_MASK);
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prcm_write_4(cm_module, clkctrl_reg, clkctrl);
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am335x_prcm_check_clkctrl(cm_module, clkctrl_reg, clkctrl);
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}
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void
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prcm_module_disable(const struct omap_module *om)
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{
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bus_size_t cm_module = om->om_prcm_cm_module;
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bus_size_t clkctrl_reg = om->om_prcm_cm_clkctrl_reg;
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uint32_t clkctrl;
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clkctrl = prcm_read_4(cm_module, clkctrl_reg);
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clkctrl &=~ AM335X_CLKCTRL_MODULEMODE_MASK;
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clkctrl |= __SHIFTIN(AM335X_CLKCTRL_MODULEMODE_DISABLED,
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AM335X_CLKCTRL_MODULEMODE_MASK);
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prcm_write_4(cm_module, clkctrl_reg, clkctrl);
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am335x_prcm_check_clkctrl(cm_module, clkctrl_reg, clkctrl);
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}
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static const uint16_t mpu_frequencies[] = {
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550,
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600,
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650,
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700,
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720,
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800,
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900,
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1000
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};
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static int mpu_frequency;
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void
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prcm_mpu_pll_config(u_int mpupll_m)
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{
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uint32_t clkmode = prcm_read_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_CLKMODE_DPLL_MPU);
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uint32_t clksel = prcm_read_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_CLKSEL_DPLL_MPU);
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//uint32_t div_m2 = prcm_read_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_DIV_M2_DPLL_MPU);
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/* Request the DPLL be put into bypass mode */
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prcm_write_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_CLKMODE_DPLL_MPU, AM335X_PRCM_CM_CLKMODE_DPLL_MN_BYP_MODE);
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/* Wait for it to go into bypass */
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while (prcm_read_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_IDLEST_DPLL_MPU) != AM335X_PRCM_CM_IDLEST_DPLL_ST_DPLL_CLK_MN_BYPASS) {
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/* nothing */
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}
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/* Replace multipler */
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clksel &= ~AM335X_PRCM_CM_CLKSEL_DPLL_MULT;
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clksel |= __SHIFTIN(mpupll_m, AM335X_PRCM_CM_CLKSEL_DPLL_MULT);
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prcm_write_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_CLKSEL_DPLL_MPU, clksel);
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/* Exit bypass mode */
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clkmode |= AM335X_PRCM_CM_CLKMODE_DPLL_LOCK_MODE;
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prcm_write_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_CLKMODE_DPLL_MPU, clkmode);
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/* Wait for the DPLL to lock */
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while (prcm_read_4(AM335X_PRCM_CM_WKUP, AM335X_PRCM_CM_IDLEST_DPLL_MPU) != AM335X_PRCM_CM_IDLEST_DPLL_ST_DPLL_CLK_LOCKED) {
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/* nothing */
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}
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}
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static int
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mpu_current_frequency_sysctl_helper(SYSCTLFN_ARGS)
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{
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struct sysctlnode node = *rnode;
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int freq = mpu_frequency;
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int old_freq = freq;
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KASSERTMSG(curcpu()->ci_data.cpu_cc_freq == mpu_frequency * 1000000,
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"cc_freq %"PRIu64" mpu_freq %u000000",
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curcpu()->ci_data.cpu_cc_freq, mpu_frequency);
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node.sysctl_data = &freq;
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int error = sysctl_lookup(SYSCTLFN_CALL(&node));
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if (error || newp == NULL)
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return error;
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KASSERT(old_freq == mpu_frequency);
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error = EINVAL;
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for (size_t i = 0; i < __arraycount(mpu_frequencies); i++) {
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if (mpu_frequencies[i] == freq) {
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error = 0;
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break;
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}
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}
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if (error)
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return EINVAL;
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if (freq != old_freq) {
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const int s = splhigh();
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prcm_mpu_pll_config(freq);
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curcpu()->ci_data.cpu_cc_freq = freq * 1000000;
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mpu_frequency = freq;
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splx(s);
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aprint_normal_dev(curcpu()->ci_dev,
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"frequency changed from %d MHz to %d MHz\n",
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old_freq, freq);
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pmf_event_inject(NULL, PMFE_SPEED_CHANGED);
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}
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return 0;
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}
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SYSCTL_SETUP(sysctl_am335x_machdep_setup, "sysctl am335x machdep subtree setup")
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{
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const struct sysctlnode *freqnode, *node;
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static char mpu_available_frequencies[__arraycount(mpu_frequencies)*6];
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__CTASSERT(__arraycount(mpu_frequencies) == 8);
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snprintf(mpu_available_frequencies, sizeof(mpu_available_frequencies),
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"%u %u %u %u %u %u %u %u",
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mpu_frequencies[0], mpu_frequencies[1], mpu_frequencies[2],
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mpu_frequencies[3], mpu_frequencies[4], mpu_frequencies[5],
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mpu_frequencies[6], mpu_frequencies[7]);
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mpu_frequency = curcpu()->ci_data.cpu_cc_freq / 1000000;
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sysctl_createv(clog, 0, NULL, &node,
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CTLFLAG_PERMANENT,
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CTLTYPE_NODE, "machdep", NULL,
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NULL, 0, NULL, 0,
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CTL_MACHDEP, CTL_EOL);
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sysctl_createv(clog, 0, &node, &freqnode,
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CTLFLAG_PERMANENT,
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CTLTYPE_NODE, "frequency", NULL,
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NULL, 0, NULL, 0,
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CTL_CREATE, CTL_EOL);
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sysctl_createv(clog, 0, &freqnode, NULL,
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CTLFLAG_PERMANENT,
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CTLTYPE_STRING, "available", NULL,
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NULL, 0, mpu_available_frequencies,
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strlen(mpu_available_frequencies),
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CTL_CREATE, CTL_EOL);
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sysctl_createv(clog, 0, &freqnode, NULL,
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CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
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CTLTYPE_INT, "current", NULL,
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mpu_current_frequency_sysctl_helper, 0, NULL, 0,
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CTL_CREATE, CTL_EOL);
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}
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void
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am335x_sys_clk(bus_space_handle_t ctlmode_ioh)
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{
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static const uint32_t sys_clks[4] = {
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[0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000
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};
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const uint32_t control_status = bus_space_read_4(&omap_bs_tag,
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ctlmode_ioh, CTLMOD_CONTROL_STATUS);
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omap_sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)];
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}
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void
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am335x_cpu_clk(void)
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{
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const bus_size_t cm_wkup = AM335X_PRCM_CM_WKUP;
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const uint32_t clksel = prcm_read_4(cm_wkup, AM335X_PRCM_CM_CLKSEL_DPLL_MPU);
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const uint32_t div_m2 = prcm_read_4(cm_wkup, AM335X_PRCM_CM_DIV_M2_DPLL_MPU);
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const uint32_t m = __SHIFTOUT(clksel, AM335X_PRCM_CM_CLKSEL_DPLL_MULT);
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const uint32_t n = __SHIFTOUT(clksel, AM335X_PRCM_CM_CLKSEL_DPLL_DIV);
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const uint32_t m2 = __SHIFTOUT(div_m2, AM335X_PRCM_CM_DIV_M2_DPLL_CLKOUT_DIV);
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/* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */
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curcpu()->ci_data.cpu_cc_freq = (m * ((uint64_t)omap_sys_clk / (n + 1))) / m2;
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printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n",
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__func__, curcpu()->ci_data.cpu_cc_freq,
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omap_sys_clk, m, n, n+1, m2);
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}
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