352 lines
9.2 KiB
C
352 lines
9.2 KiB
C
/* $NetBSD: sa11x0_ost.c,v 1.30 2012/08/12 17:21:29 nonaka Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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* Copyright (c) 1997 Causality Limited.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by IWAMOTO Toshihiro and Ichiro FUKUHARA.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sa11x0_ost.c,v 1.30 2012/08/12 17:21:29 nonaka Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/device.h>
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#include <sys/bus.h>
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#include <machine/intr.h>
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#include <arm/cpufunc.h>
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#include <arm/sa11x0/sa11x0_reg.h>
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#include <arm/sa11x0/sa11x0_var.h>
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#include <arm/sa11x0/sa11x0_ostreg.h>
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#include <arm/sa11x0/sa11x0_ostvar.h>
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static int saost_match(device_t, cfdata_t, void *);
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static void saost_attach(device_t, device_t, void *);
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static void saost_tc_init(void);
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static uint32_t gettick(void);
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static int clockintr(void *);
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static int statintr(void *);
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struct saost_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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uint32_t sc_clock_count;
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uint32_t sc_statclock_count;
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uint32_t sc_statclock_step;
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};
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static struct saost_softc *saost_sc = NULL;
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#if defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250)
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#include <arm/xscale/pxa2x0cpu.h>
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static uint32_t freq;
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#define TIMER_FREQUENCY freq
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#elif defined(CPU_XSCALE_PXA270)
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#define TIMER_FREQUENCY 3250000 /* PXA270 uses 3.25MHz */
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#else
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#define TIMER_FREQUENCY 3686400 /* 3.6864MHz */
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#endif
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#ifndef STATHZ
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#define STATHZ 64
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#endif
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CFATTACH_DECL_NEW(saost, sizeof(struct saost_softc),
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saost_match, saost_attach, NULL, NULL);
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static int
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saost_match(device_t parent, cfdata_t match, void *aux)
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{
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struct sa11x0_attach_args *sa = aux;
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if (strcmp(sa->sa_name, match->cf_name) != 0)
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return 0;
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return 1;
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}
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static void
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saost_attach(device_t parent, device_t self, void *aux)
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{
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struct saost_softc *sc = device_private(self);
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struct sa11x0_attach_args *sa = aux;
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aprint_normal("\n");
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sc->sc_dev = self;
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sc->sc_iot = sa->sa_iot;
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saost_sc = sc;
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if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0,
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&sc->sc_ioh))
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panic("%s: Cannot map registers", device_xname(self));
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/* disable all channel and clear interrupt status */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_IR, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_SR, 0xf);
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aprint_normal_dev(self, "SA-11x0 OS Timer\n");
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}
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static int
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clockintr(void *arg)
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{
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struct saost_softc *sc = saost_sc;
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struct clockframe *frame = arg;
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uint32_t oscr, nextmatch, oldmatch;
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int s;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_SR, 1);
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/* schedule next clock intr */
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oldmatch = sc->sc_clock_count;
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nextmatch = oldmatch + TIMER_FREQUENCY / hz;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR0, nextmatch);
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oscr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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if ((nextmatch > oldmatch &&
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(oscr > nextmatch || oscr < oldmatch)) ||
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(nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) {
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/*
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* we couldn't set the matching register in time.
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* just set it to some value so that next interrupt happens.
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* XXX is it possible to compensate lost interrupts?
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*/
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s = splhigh();
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oscr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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nextmatch = oscr + 10;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR0, nextmatch);
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splx(s);
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}
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sc->sc_clock_count = nextmatch;
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hardclock(frame);
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return 1;
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}
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static int
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statintr(void *arg)
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{
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struct saost_softc *sc = saost_sc;
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struct clockframe *frame = arg;
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uint32_t oscr, nextmatch, oldmatch;
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int s;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_SR, 2);
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/* schedule next clock intr */
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oldmatch = sc->sc_statclock_count;
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nextmatch = oldmatch + sc->sc_statclock_step;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR1, nextmatch);
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oscr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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if ((nextmatch > oldmatch &&
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(oscr > nextmatch || oscr < oldmatch)) ||
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(nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) {
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/*
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* we couldn't set the matching register in time.
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* just set it to some value so that next interrupt happens.
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* XXX is it possible to compensate lost interrupts?
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*/
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s = splhigh();
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oscr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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nextmatch = oscr + 10;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR1, nextmatch);
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splx(s);
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}
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sc->sc_statclock_count = nextmatch;
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statclock(frame);
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return 1;
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}
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void
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setstatclockrate(int schz)
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{
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struct saost_softc *sc = saost_sc;
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uint32_t count;
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sc->sc_statclock_step = TIMER_FREQUENCY / schz;
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count = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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count += sc->sc_statclock_step;
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sc->sc_statclock_count = count;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR1, count);
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}
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void
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cpu_initclocks(void)
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{
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struct saost_softc *sc = saost_sc;
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stathz = STATHZ;
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profhz = stathz;
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#if defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250)
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TIMER_FREQUENCY = (CPU_IS_PXA250) ? 3686400 : 3250000;
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#endif
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sc->sc_statclock_step = TIMER_FREQUENCY / stathz;
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aprint_normal("clock: hz=%d stathz=%d\n", hz, stathz);
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/* Use the channels 0 and 1 for hardclock and statclock, respectively */
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sc->sc_clock_count = TIMER_FREQUENCY / hz;
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sc->sc_statclock_count = TIMER_FREQUENCY / stathz;
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sa11x0_intr_establish(0, 26, 1, IPL_CLOCK, clockintr, 0);
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sa11x0_intr_establish(0, 27, 1, IPL_CLOCK, statintr, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_SR, 0xf);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_IR, 3);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR0,
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sc->sc_clock_count);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR1,
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sc->sc_statclock_count);
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/* Zero the counter value */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_CR, 0);
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saost_tc_init();
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}
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static u_int
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saost_tc_get_timecount(struct timecounter *tc)
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{
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return (u_int)gettick();
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}
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static void
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saost_tc_init(void)
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{
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static struct timecounter saost_tc = {
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.tc_get_timecount = saost_tc_get_timecount,
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.tc_counter_mask = ~0,
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.tc_name = "saost_count",
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#if !(defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250))
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.tc_frequency = TIMER_FREQUENCY,
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#endif
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.tc_quality = 100,
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};
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#if defined(CPU_XSCALE_PXA270) && defined(CPU_XSCALE_PXA250)
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saost_tc.tc_frequency = TIMER_FREQUENCY,
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#endif
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tc_init(&saost_tc);
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}
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static uint32_t
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gettick(void)
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{
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struct saost_softc *sc = saost_sc;
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uint32_t counter;
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u_int saved_ints;
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saved_ints = disable_interrupts(I32_bit);
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counter = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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restore_interrupts(saved_ints);
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return counter;
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}
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void
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delay(u_int usecs)
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{
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uint32_t xtick, otick, delta;
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int csec, usec;
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csec = usecs / 10000;
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usec = usecs % 10000;
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usecs = (TIMER_FREQUENCY / 100) * csec
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+ (TIMER_FREQUENCY / 100) * usec / 10000;
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if (saost_sc == NULL) {
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volatile int k;
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int j;
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/* clock isn't initialized yet */
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for (; usecs > 0; usecs--)
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for (j = 100; j > 0; j--, k--)
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continue;
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return;
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}
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otick = gettick();
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while (1) {
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xtick = gettick();
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delta = xtick - otick;
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if (delta > usecs)
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break;
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usecs -= delta;
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otick = xtick;
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}
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}
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void
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saost_reset(void)
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{
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struct saost_softc *sc = saost_sc;
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uint32_t counter;
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uint32_t saved_ints;
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saved_ints = disable_interrupts(I32_bit|F32_bit);
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counter = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAOST_CR);
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counter += TIMER_FREQUENCY;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_MR3, counter);
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/* Enable watchdog */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAOST_WR, 1);
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delay(1 * 1000 * 1000);
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restore_interrupts(saved_ints);
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}
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