297 lines
8.2 KiB
C
297 lines
8.2 KiB
C
/* $NetBSD: crime.c,v 1.22 2005/12/10 07:00:40 tsutsui Exp $ */
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/*
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* Copyright (c) 2004 Christopher SEKIYA
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* Copyright (c) 2000 Soren S. Jorvang
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the
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* NetBSD Project. See http://www.NetBSD.org/ for
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* information about NetBSD.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* O2 CRIME
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.22 2005/12/10 07:00:40 tsutsui Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <machine/cpu.h>
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#include <machine/locore.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/machtype.h>
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#include <machine/sysconf.h>
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#include <sgimips/dev/crimevar.h>
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#include <sgimips/dev/crimereg.h>
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#include <sgimips/mace/macevar.h>
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#include "locators.h"
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static int crime_match(struct device *, struct cfdata *, void *);
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static void crime_attach(struct device *, struct device *, void *);
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void crime_bus_reset(void);
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void crime_watchdog_reset(void);
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void crime_watchdog_disable(void);
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void crime_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
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void *crime_intr_establish(int, int, int (*)(void *), void *);
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extern void mace_intr(int); /* XXX */
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static bus_space_tag_t crm_iot;
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static bus_space_handle_t crm_ioh;
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CFATTACH_DECL(crime, sizeof(struct crime_softc),
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crime_match, crime_attach, NULL, NULL);
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#define CRIME_NINTR 32 /* XXX */
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struct {
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int (*func)(void *);
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void *arg;
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} crime[CRIME_NINTR];
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static int
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crime_match(struct device *parent, struct cfdata *match, void *aux)
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{
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/*
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* The CRIME is in the O2.
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*/
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if (mach_type == MACH_SGI_IP32)
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return (1);
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return (0);
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}
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static void
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crime_attach(struct device *parent, struct device *self, void *aux)
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{
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struct mainbus_attach_args *ma = aux;
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u_int64_t crm_id;
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u_int64_t baseline;
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u_int32_t cps;
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crm_iot = SGIMIPS_BUS_SPACE_CRIME;
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if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
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BUS_SPACE_MAP_LINEAR, &crm_ioh))
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panic("crime_attach: can't map I/O space");
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crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
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aprint_naive(": system ASIC");
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switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) {
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case 0x0b:
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aprint_normal(": rev 1.5");
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break;
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case 0x0a:
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if ((crm_id >> 32) == 0)
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aprint_normal(": rev 1.1");
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else if ((crm_id >> 32) == 1)
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aprint_normal(": rev 1.3");
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else
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aprint_normal(": rev 1.4");
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break;
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case 0x00:
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aprint_normal(": Petty CRIME");
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break;
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default:
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aprint_normal(": Unknown CRIME");
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break;
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}
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aprint_normal(" (CRIME_ID: %llx)\n", crm_id);
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/* reset CRIME CPU & memory error registers */
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crime_bus_reset();
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bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, 0);
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baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK;
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cps = mips3_cp0_count_read();
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while (((bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK)
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- baseline) < 50 * 1000000 / 15)
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continue;
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cps = mips3_cp0_count_read() - cps;
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cps = cps / 5;
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/* Counter on R4k/R4400/R4600/R5k counts at half the CPU frequency */
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curcpu()->ci_cpu_freq = cps * 2 * hz;
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curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz);
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curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000);
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MIPS_SET_CI_RECIPRICAL(curcpu());
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/* Turn on memory error and crime error interrupts.
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All others turned on as devices are registered. */
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
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CRIME_INT_MEMERR |
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CRIME_INT_CRMERR |
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CRIME_INT_VICE |
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CRIME_INT_VID_OUT |
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CRIME_INT_VID_IN2 |
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CRIME_INT_VID_IN1);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
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platform.bus_reset = crime_bus_reset;
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platform.watchdog_reset = crime_watchdog_reset;
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platform.watchdog_disable = crime_watchdog_disable;
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platform.watchdog_enable = crime_watchdog_reset;
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platform.intr_establish = crime_intr_establish;
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platform.intr0 = crime_intr;
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}
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/*
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* XXX: sharing interrupts?
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*/
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void *
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crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
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{
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if (irq < 16)
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return mace_intr_establish(irq, level, func, arg);
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if (crime[irq].func != NULL)
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return NULL; /* panic("Cannot share CRIME interrupts!"); */
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crime[irq].func = func;
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crime[irq].arg = arg;
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crime_intr_mask(irq);
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return (void *)&crime[irq];
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}
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void
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crime_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
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{
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u_int64_t crime_intmask;
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u_int64_t crime_intstat;
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u_int64_t crime_ipending;
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int i;
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crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
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crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
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crime_ipending = (crime_intstat & crime_intmask);
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if (crime_ipending & 0xffff)
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mace_intr(crime_ipending & 0xffff);
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if (crime_ipending & 0xffff0000) {
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/*
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* CRIME interrupts for CPU and memory errors
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*/
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if (crime_ipending & CRIME_INT_MEMERR) {
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u_int64_t address =
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bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_ADDR);
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u_int64_t status1 =
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bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT);
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printf("crime: memory error address %llx"
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" status %llx\n", address << 2, status1);
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crime_bus_reset();
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}
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if (crime_ipending & CRIME_INT_CRMERR) {
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u_int64_t stat =
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bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT);
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printf("crime: cpu error %llx at"
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" address %llx\n", stat,
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bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_ADDR));
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crime_bus_reset();
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}
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}
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crime_ipending &= 0xff00;
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if (crime_ipending)
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for (i = 0; i < CRIME_NINTR; i++) {
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if ((crime_ipending & (1 << i)) && crime[i].func != NULL)
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(*crime[i].func)(crime[i].arg);
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}
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}
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void
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crime_intr_mask(unsigned int intr)
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{
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u_int64_t mask;
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mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
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mask |= (1 << intr);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
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}
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void
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crime_intr_unmask(unsigned int intr)
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{
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u_int64_t mask;
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mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
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mask &= ~(1 << intr);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
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}
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void
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crime_bus_reset(void)
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{
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bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
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}
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void
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crime_watchdog_reset(void)
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{
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/* enable watchdog timer, clear it */
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bus_space_write_8(crm_iot, crm_ioh,
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CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
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}
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void
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crime_watchdog_disable(void)
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{
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u_int64_t reg;
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bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
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reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
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& ~CRIME_CONTROL_DOG_ENABLE;
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bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
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}
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