eda05c6413
Patch by Slava Semushin <slava.semushin@gmail.com> Again, this was tested by comparing obj files from a pristine and a patched source tree against an i386/ALL kernel, and also for src/sbin/fsck_ffs, src/sbin/fsdb and src/usr.sbin/makefs. Only changes in assert() line numbers were detected in 'objdump -d' output.
195 lines
6.3 KiB
C
195 lines
6.3 KiB
C
/* $NetBSD: smc93cx6.c,v 1.13 2007/01/29 01:52:45 hubertf Exp $ */
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/*
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* Interface for the 93C66/56/46/26/06 serial eeprom parts.
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*
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* Copyright (c) 1995, 1996 Daniel M. Eischen
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Daniel M. Eischen.
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* 4. Modifications may be freely made to this file if the above conditions
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* are met.
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*
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* $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $
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*/
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/*
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* The instruction set of the 93C66/56/46/26/06 chips are as follows:
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*
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* Start OP *
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* Function Bit Code Address** Data Description
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* -------------------------------------------------------------------
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* READ 1 10 A5 - A0 Reads data stored in memory,
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* starting at specified address
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* EWEN 1 00 11XXXX Write enable must precede
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* all programming modes
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* ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
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* WRITE 1 01 A5 - A0 D15 - D0 Writes register
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* ERAL 1 00 10XXXX Erase all registers
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* WRAL 1 00 01XXXX D15 - D0 Writes to all registers
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* EWDS 1 00 00XXXX Disables all programming
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* instructions
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* *Note: A value of X for address is a don't care condition.
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* **Note: There are 8 address bits for the 93C56/66 chips unlike
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* the 93C46/26/06 chips which have 6 address bits.
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*
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* The 93C46 has a four wire interface: clock, chip select, data in, and
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* data out. In order to perform one of the above functions, you need
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* to enable the chip select for a clock period (typically a minimum of
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* 1 usec, with the clock high and low a minimum of 750 and 250 nsec
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* respectively). While the chip select remains high, you can clock in
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* the instructions (above) starting with the start bit, followed by the
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* OP code, Address, and Data (if needed). For the READ instruction, the
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* requested 16-bit register contents is read from the data out line but
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* is preceded by an initial zero (leading 0, followed by 16-bits, MSB
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* first). The clock cycling from low to high initiates the next data
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* bit to be sent from the chip.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: smc93cx6.c,v 1.13 2007/01/29 01:52:45 hubertf Exp $");
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#ifndef __NetBSD__
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#include "opt_aic7xxx.h"
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#ifdef __NetBSD__
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#include <dev/ic/smc93cx6var.h>
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#else
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <dev/aic7xxx/93cx6.h>
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#endif
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/*
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* Right now, we only have to read the SEEPROM. But we make it easier to
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* add other 93Cx6 functions.
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*/
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static struct seeprom_cmd {
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unsigned char len;
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unsigned char bits[3];
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} seeprom_read = {3, {1, 1, 0}};
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/* XXX bus barriers */
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#define CLOCK_PULSE(sd, rdy) do { \
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/* \
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* Wait for the SEERDY to go high; about 800 ns. \
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*/ \
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int cpi = 1000; \
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if (rdy == 0) { \
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DELAY(4); /* more than long enough */ \
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break; \
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} \
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while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && cpi-- > 0) { \
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; /* Do nothing */ \
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} \
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(void)SEEPROM_INB(sd); /* Clear clock */ \
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} while (0)
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/*
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* Read the serial EEPROM and returns 1 if successful and 0 if
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* not successful.
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*/
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int
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read_seeprom(sd, buf, start_addr, count)
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struct seeprom_descriptor *sd;
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u_int16_t *buf;
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bus_size_t start_addr;
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bus_size_t count;
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{
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int i = 0;
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u_int k = 0;
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u_int16_t v;
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u_int32_t temp;
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/*
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* Read the requested registers of the seeprom. The loop
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* will range from 0 to count-1.
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*/
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for (k = start_addr; k < count + start_addr; k++) {
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/* Send chip select for one clock cycle. */
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temp = sd->sd_MS ^ sd->sd_CS;
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SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
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CLOCK_PULSE(sd, sd->sd_RDY);
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/*
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* Now we're ready to send the read command followed by the
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* address of the 16-bit register we want to read.
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*/
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for (i = 0; i < seeprom_read.len; i++) {
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if (seeprom_read.bits[i] != 0)
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temp ^= sd->sd_DO;
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SEEPROM_OUTB(sd, temp);
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CLOCK_PULSE(sd, sd->sd_RDY);
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SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
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CLOCK_PULSE(sd, sd->sd_RDY);
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if (seeprom_read.bits[i] != 0)
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temp ^= sd->sd_DO;
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}
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/* Send the 6 or 8 bit address (MSB first, LSB last). */
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for (i = (sd->sd_chip - 1); i >= 0; i--) {
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if ((k & (1 << i)) != 0)
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temp ^= sd->sd_DO;
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SEEPROM_OUTB(sd, temp);
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CLOCK_PULSE(sd, sd->sd_RDY);
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SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
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CLOCK_PULSE(sd, sd->sd_RDY);
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if ((k & (1 << i)) != 0)
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temp ^= sd->sd_DO;
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}
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/*
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* Now read the 16 bit register. An initial 0 precedes the
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* register contents which begins with bit 15 (MSB) and ends
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* with bit 0 (LSB). The initial 0 will be shifted off the
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* top of our word as we let the loop run from 0 to 16.
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*/
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v = 0;
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for (i = 16; i >= 0; i--) {
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SEEPROM_OUTB(sd, temp);
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CLOCK_PULSE(sd, sd->sd_RDY);
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v <<= 1;
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if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
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v |= 1;
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SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
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CLOCK_PULSE(sd, sd->sd_RDY);
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}
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buf[k - start_addr] = v;
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/* Reset the chip select for the next command cycle. */
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temp = sd->sd_MS;
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SEEPROM_OUTB(sd, temp);
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CLOCK_PULSE(sd, sd->sd_RDY);
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SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
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CLOCK_PULSE(sd, sd->sd_RDY);
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SEEPROM_OUTB(sd, temp);
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CLOCK_PULSE(sd, sd->sd_RDY);
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}
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#ifdef AHC_DUMP_EEPROM
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printf("\nSerial EEPROM:\n\t");
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for (k = 0; k < count; k = k + 1) {
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if (((k % 8) == 0) && (k != 0)) {
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printf ("\n\t");
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}
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printf (" 0x%x", buf[k]);
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}
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printf ("\n");
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#endif
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return (1);
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}
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