c4780f2706
which is safer than the loop there used to be here. wi_mwrite_bap: if wi_write_bap fails, don't keep on going: this way you avoid writing garbage to the radio. First time you see an odd-length mbuf, copy the remainder of the chain to sc_txbuf and from there to the MAC. This way, you do not read an mbuf past the end of its data (occasionally you will cross a page doing that!) and you avoid expensive, excess seeks in the radio's own buffer chain. wi_rx_intr: clamp the frame length told to us by the driver to the most bytes we can fit in our mbuf cluster. I am still getting e-mails from my testers telling me how much better this makes things.
207 lines
6.5 KiB
C
207 lines
6.5 KiB
C
/* $NetBSD: wivar.h,v 1.28 2003/01/09 08:49:40 dyoung Exp $ */
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/*
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* Copyright (c) 1997, 1998, 1999
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* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* FreeBSD driver ported to NetBSD by Bill Sommerfeld in the back of the
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* Oslo IETF plenary meeting.
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*/
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struct wi_softc {
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struct device sc_dev;
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struct ieee80211com sc_ic;
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void *sc_ih; /* interrupt handler */
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int (*sc_enable)(struct wi_softc *);
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void (*sc_disable)(struct wi_softc *);
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int sc_attached;
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int sc_enabled;
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int sc_firmware_type;
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#define WI_NOTYPE 0
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#define WI_LUCENT 1
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#define WI_INTERSIL 2
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#define WI_SYMBOL 3
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int sc_pri_firmware_ver; /* Primary firm vers */
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int sc_sta_firmware_ver; /* Station firm vers */
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int sc_pci; /* attach to PCI-Bus */
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bus_space_tag_t sc_iot; /* bus cookie */
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bus_space_handle_t sc_ioh; /* bus i/o handle */
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struct ifmedia sc_media;
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caddr_t sc_drvbpf;
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int sc_flags;
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int sc_bap_id;
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int sc_bap_off;
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u_int16_t sc_dbm_adjust;
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u_int16_t sc_max_datalen;
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u_int16_t sc_frag_thresh;
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u_int16_t sc_rts_thresh;
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u_int16_t sc_system_scale;
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u_int16_t sc_tx_rate;
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u_int16_t sc_cnfauthmode;
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u_int16_t sc_roaming_mode;
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u_int16_t sc_microwave_oven;
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int sc_nodelen;
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char sc_nodename[IEEE80211_NWID_LEN];
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int sc_buflen;
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#define WI_NTXBUF 3
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struct sc_txdesc {
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int d_fid;
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int d_len;
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} sc_txd[WI_NTXBUF];
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int sc_txnext;
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int sc_txcur;
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int sc_tx_timer;
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int sc_scan_timer;
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int sc_syn_timer;
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struct wi_counters sc_stats;
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u_int16_t sc_ibss_port;
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struct wi_apinfo sc_aps[MAXAPINFO];
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int sc_naps;
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int sc_false_syns;
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u_int16_t sc_txbuf[IEEE80211_MAX_LEN/2];
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};
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#define sc_if sc_ic.ic_if
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/* maximum consecutive false change-of-BSSID indications */
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#define WI_MAX_FALSE_SYNS 10
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#define WI_SCAN_INQWAIT 3 /* wait sec before inquire */
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#define WI_SCAN_WAIT 5 /* maximum scan wait */
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/* Values for wi_flags. */
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#define WI_FLAGS_ATTACHED 0x0001
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#define WI_FLAGS_INITIALIZED 0x0002
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#define WI_FLAGS_OUTRANGE 0x0004
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#define WI_FLAGS_HAS_MOR 0x0010
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#define WI_FLAGS_HAS_ROAMING 0x0020
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#define WI_FLAGS_HAS_DIVERSITY 0x0040
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#define WI_FLAGS_HAS_SYSSCALE 0x0080
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#define WI_FLAGS_BUG_AUTOINC 0x0100
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#define WI_FLAGS_HAS_FRAGTHR 0x0200
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#define WI_FLAGS_HAS_DBMADJUST 0x0400
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struct wi_card_ident {
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u_int16_t card_id;
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char *card_name;
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u_int8_t firm_type;
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};
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/*
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* register space access macros
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*/
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#ifdef WI_AT_BIGENDIAN_BUS_HACK
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/*
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* XXX - ugly hack for sparc bus_space_* macro deficiencies:
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* assume the bus we are accessing is big endian.
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*/
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg) , htole32(val))
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), htole16(val))
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), val)
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#define CSR_READ_4(sc, reg) \
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le32toh(bus_space_read_4(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg)))
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#define CSR_READ_2(sc, reg) \
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le16toh(bus_space_read_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg)))
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg))
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#else
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg) , val)
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), val)
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), val)
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg))
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#define CSR_READ_2(sc, reg) \
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bus_space_read_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg))
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#define CSR_READ_1(sc, reg) \
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bus_space_read_1(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg))
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#endif
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#ifndef __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_write_stream_2 bus_space_write_2
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#define bus_space_write_multi_stream_2 bus_space_write_multi_2
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#define bus_space_read_stream_2 bus_space_read_2
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#define bus_space_read_multi_stream_2 bus_space_read_multi_2
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#endif
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#define CSR_WRITE_STREAM_2(sc, reg, val) \
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bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), val)
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#define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \
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bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), val, count)
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#define CSR_READ_STREAM_2(sc, reg) \
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bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg))
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#define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count) \
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bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, \
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(sc->sc_pci? reg * 2: reg), buf, count)
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int wi_attach(struct wi_softc *);
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int wi_detach(struct wi_softc *);
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int wi_activate(struct device *, enum devact);
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int wi_intr(void *arg);
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void wi_power(struct wi_softc *, int);
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void wi_shutdown(struct wi_softc *);
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