44b1e07ec9
- different set of device control registers. - non-standard access to the time base. - 16 byte cache lines. Approved by: Eduardo Horvath <eeh@netbsd.org> |
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.. | ||
bus.h | ||
cpu.h | ||
dcr403cgx.h | ||
dcr405gp.h | ||
ibm4xx_intr.h | ||
ibm405gp.h | ||
Makefile | ||
mal405gp.h | ||
pci_machdep.h | ||
pmap.h | ||
pte.h | ||
tlb.h | ||
vmparam.h |