77a6866508
to do uncached memory access during VM operations (which can be quite expensive on some CPUs). We currently write-back PTEs as soon as they're modified; there is some room for optimization (to write them back in larger chunks). For PTEs in the APTE space (i.e. PTEs for pmaps that describe another process's address space), PTEs must also be evicted from the cache complete (PTEs in PTE space will be evicted durint a context switch).
836 lines
25 KiB
C
836 lines
25 KiB
C
/* $NetBSD: iq80310_machdep.c,v 1.44 2002/08/24 02:16:33 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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* Copyright (c) 1997,1998 Causality Limited.
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* All rights reserved.
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*
|
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* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
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* are met:
|
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* 1. Redistributions of source code must retain the above copyright
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|
* notice, this list of conditions and the following disclaimer.
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|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Machine dependant functions for kernel setup for Intel IQ80310 evaluation
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* boards using RedBoot firmware.
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*/
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#include "opt_ddb.h"
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#include "opt_pmap_debug.h"
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/exec.h>
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#include <sys/proc.h>
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#include <sys/msgbuf.h>
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#include <sys/reboot.h>
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#include <sys/termios.h>
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#include <dev/cons.h>
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#include <machine/db_machdep.h>
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#include <ddb/db_sym.h>
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#include <ddb/db_extern.h>
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#include <machine/bootconfig.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <arm/undefined.h>
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#include <arm/arm32/machdep.h>
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#include <arm/xscale/i80312reg.h>
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#include <arm/xscale/i80312var.h>
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#include <dev/pci/ppbreg.h>
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#include <evbarm/iq80310/iq80310reg.h>
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#include <evbarm/iq80310/iq80310var.h>
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#include <evbarm/iq80310/obiovar.h>
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#include "opt_ipkdb.h"
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/*
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* Address to call from cpu_reset() to reset the machine.
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* This is machine architecture dependant as it varies depending
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* on where the ROM appears when you turn the MMU off.
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*/
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u_int cpu_reset_address = 0;
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|
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/* Define various stack sizes in pages */
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#define IRQ_STACK_SIZE 1
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#define ABT_STACK_SIZE 1
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#ifdef IPKDB
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#define UND_STACK_SIZE 2
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#else
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#define UND_STACK_SIZE 1
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#endif
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BootConfig bootconfig; /* Boot config storage */
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char *boot_args = NULL;
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char *boot_file = NULL;
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vm_offset_t physical_start;
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vm_offset_t physical_freestart;
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vm_offset_t physical_freeend;
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vm_offset_t physical_end;
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u_int free_pages;
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vm_offset_t pagetables_start;
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int physmem = 0;
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/*int debug_flags;*/
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#ifndef PMAP_STATIC_L1S
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int max_processes = 64; /* Default number */
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#endif /* !PMAP_STATIC_L1S */
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/* Physical and virtual addresses for some global pages */
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pv_addr_t systempage;
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pv_addr_t irqstack;
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pv_addr_t undstack;
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pv_addr_t abtstack;
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pv_addr_t kernelstack;
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pv_addr_t minidataclean;
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vm_offset_t msgbufphys;
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extern u_int data_abort_handler_address;
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extern u_int prefetch_abort_handler_address;
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extern u_int undefined_handler_address;
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#ifdef PMAP_DEBUG
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extern int pmap_debug_level;
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#endif
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#define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
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#define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
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#define KERNEL_PT_KERNEL_NUM 2
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/* L2 table for mapping i80312 */
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#define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
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/* L2 tables for mapping kernel VM */
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#define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
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#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
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#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
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pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
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struct user *proc0paddr;
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/* Prototypes */
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void consinit(void);
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#include "com.h"
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#if NCOM > 0
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#endif
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/*
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* Define the default console speed for the board. This is generally
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* what the firmware provided with the board defaults to.
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*/
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#ifndef CONSPEED
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#define CONSPEED B115200
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#endif /* ! CONSPEED */
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#ifndef CONUNIT
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#define CONUNIT 0
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#endif
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#ifndef CONMODE
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#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
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#endif
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int comcnspeed = CONSPEED;
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int comcnmode = CONMODE;
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int comcnunit = CONUNIT;
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/*
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* void cpu_reboot(int howto, char *bootstr)
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*
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* Reboots the system
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*
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* Deal with any syncing, unmounting, dumping and shutdown hooks,
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* then reset the CPU.
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*/
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void
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cpu_reboot(int howto, char *bootstr)
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{
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#ifdef DIAGNOSTIC
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/* info */
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printf("boot: howto=%08x curproc=%p\n", howto, curproc);
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#endif
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/*
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* If we are still cold then hit the air brakes
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* and crash to earth fast
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*/
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if (cold) {
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doshutdownhooks();
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printf("The operating system has halted.\n");
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printf("Please press any key to reboot.\n\n");
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cngetc();
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printf("rebooting...\n");
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cpu_reset();
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/*NOTREACHED*/
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}
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/* Disable console buffering */
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/*
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* If RB_NOSYNC was not specified sync the discs.
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* Note: Unless cold is set to 1 here, syslogd will die during the
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* unmount. It looks like syslogd is getting woken up only to find
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* that it cannot page part of the binary in as the filesystem has
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* been unmounted.
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*/
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if (!(howto & RB_NOSYNC))
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bootsync();
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/* Say NO to interrupts */
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splhigh();
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/* Do a dump if requested. */
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if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
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dumpsys();
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/* Run any shutdown hooks */
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doshutdownhooks();
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/* Make sure IRQ's are disabled */
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IRQdisable;
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if (howto & RB_HALT) {
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iq80310_7seg('.', '.');
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printf("The operating system has halted.\n");
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printf("Please press any key to reboot.\n\n");
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cngetc();
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}
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printf("rebooting...\n");
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cpu_reset();
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/*NOTREACHED*/
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}
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/*
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* Mapping table for core kernel memory. This memory is mapped at init
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* time with section mappings.
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*/
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struct l1_sec_map {
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vaddr_t va;
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vaddr_t pa;
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vsize_t size;
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vm_prot_t prot;
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int cache;
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} l1_sec_table[] = {
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/*
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* Map the on-board devices VA == PA so that we can access them
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* with the MMU on or off.
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*/
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{
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IQ80310_OBIO_BASE,
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IQ80310_OBIO_BASE,
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IQ80310_OBIO_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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0,
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0,
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0,
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0,
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0,
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}
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};
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/*
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* u_int initarm(...)
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*
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* Initial entry point on startup. This gets called before main() is
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* entered.
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* It should be responsible for setting up everything that must be
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* in place when main is called.
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* This includes
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* Taking a copy of the boot configuration structure.
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* Initialising the physical console so characters can be printed.
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* Setting up page tables for the kernel
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* Relocating the kernel to the bottom of physical memory
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*/
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u_int
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initarm(void *arg)
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{
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extern vaddr_t xscale_cache_clean_addr;
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extern vsize_t xscale_minidata_clean_size;
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int loop;
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int loop1;
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u_int l1pagetable;
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pv_addr_t kernel_l1pt;
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pv_addr_t kernel_ptpt;
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paddr_t memstart;
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psize_t memsize;
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|
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/*
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* Clear out the 7-segment display. Whee, the first visual
|
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* indication that we're running kernel code.
|
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*/
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iq80310_7seg(' ', ' ');
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|
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/*
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* Heads up ... Setup the CPU / MMU / TLB functions
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*/
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if (set_cpufuncs())
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panic("cpu not recognized!");
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|
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/* Calibrate the delay loop. */
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iq80310_calibrate_delay();
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|
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/*
|
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* Since we map the on-board devices VA==PA, and the kernel
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* is running VA==PA, it's possible for us to initialize
|
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* the console now.
|
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*/
|
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consinit();
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|
|
/* Talk to the user */
|
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printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
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|
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/*
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* Reset the secondary PCI bus. RedBoot doesn't stop devices
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* on the PCI bus before handing us control, so we have to
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* do this.
|
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*
|
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* XXX This is arguably a bug in RedBoot, and doing this reset
|
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* XXX could be problematic in the future if we encounter an
|
|
* XXX application where the PPB in the i80312 is used as a
|
|
* XXX PPB.
|
|
*/
|
|
{
|
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uint32_t reg;
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|
|
printf("Resetting secondary PCI bus...\n");
|
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reg = bus_space_read_4(&obio_bs_tag,
|
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I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
|
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bus_space_write_4(&obio_bs_tag,
|
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I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
|
|
reg | PPB_BC_SECONDARY_RESET);
|
|
delay(10 * 1000); /* 10ms enough? */
|
|
bus_space_write_4(&obio_bs_tag,
|
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I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
|
|
reg);
|
|
}
|
|
|
|
/*
|
|
* We are currently running with the MMU enabled and the
|
|
* entire address space mapped VA==PA, except for the
|
|
* first 64M of RAM is also double-mapped at 0xc0000000.
|
|
* There is an L1 page table at 0xa0004000.
|
|
*/
|
|
|
|
/*
|
|
* Fetch the SDRAM start/size from the i80312 SDRAM configration
|
|
* registers.
|
|
*/
|
|
i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
|
|
&memstart, &memsize);
|
|
|
|
printf("initarm: Configuring system ...\n");
|
|
|
|
/* Fake bootconfig structure for the benefit of pmap.c */
|
|
/* XXX must make the memory description h/w independant */
|
|
bootconfig.dramblocks = 1;
|
|
bootconfig.dram[0].address = memstart;
|
|
bootconfig.dram[0].pages = memsize / NBPG;
|
|
|
|
/*
|
|
* Set up the variables that define the availablilty of
|
|
* physical memory. For now, we're going to set
|
|
* physical_freestart to 0xa0200000 (where the kernel
|
|
* was loaded), and allocate the memory we need downwards.
|
|
* If we get too close to the L1 table that we set up, we
|
|
* will panic. We will update physical_freestart and
|
|
* physical_freeend later to reflect what pmap_bootstrap()
|
|
* wants to see.
|
|
*
|
|
* XXX pmap_bootstrap() needs an enema.
|
|
*/
|
|
physical_start = bootconfig.dram[0].address;
|
|
physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
|
|
|
|
physical_freestart = 0xa0009000UL;
|
|
physical_freeend = 0xa0200000UL;
|
|
|
|
physmem = (physical_end - physical_start) / NBPG;
|
|
|
|
/* Tell the user about the memory */
|
|
printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
|
|
physical_start, physical_end - 1);
|
|
|
|
/*
|
|
* Okay, the kernel starts 2MB in from the bottom of physical
|
|
* memory. We are going to allocate our bootstrap pages downwards
|
|
* from there.
|
|
*
|
|
* We need to allocate some fixed page tables to get the kernel
|
|
* going. We allocate one page directory and a number of page
|
|
* tables and store the physical addresses in the kernel_pt_table
|
|
* array.
|
|
*
|
|
* The kernel page directory must be on a 16K boundary. The page
|
|
* tables must be on 4K bounaries. What we do is allocate the
|
|
* page directory on the first 16K boundary that we encounter, and
|
|
* the page tables on 4K boundaries otherwise. Since we allocate
|
|
* at least 3 L2 page tables, we are guaranteed to encounter at
|
|
* least one 16K aligned region.
|
|
*/
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Allocating page tables\n");
|
|
#endif
|
|
|
|
free_pages = (physical_freeend - physical_freestart) / NBPG;
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
|
|
physical_freestart, free_pages, free_pages);
|
|
#endif
|
|
|
|
/* Define a macro to simplify memory allocation */
|
|
#define valloc_pages(var, np) \
|
|
alloc_pages((var).pv_pa, (np)); \
|
|
(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
|
|
|
|
#define alloc_pages(var, np) \
|
|
physical_freeend -= ((np) * NBPG); \
|
|
if (physical_freeend < physical_freestart) \
|
|
panic("initarm: out of memory"); \
|
|
(var) = physical_freeend; \
|
|
free_pages -= (np); \
|
|
memset((char *)(var), 0, ((np) * NBPG));
|
|
|
|
loop1 = 0;
|
|
kernel_l1pt.pv_pa = 0;
|
|
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
|
|
/* Are we 16KB aligned for an L1 ? */
|
|
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
|
|
&& kernel_l1pt.pv_pa == 0) {
|
|
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG);
|
|
} else {
|
|
alloc_pages(kernel_pt_table[loop1].pv_pa,
|
|
L2_TABLE_SIZE / NBPG);
|
|
kernel_pt_table[loop1].pv_va =
|
|
kernel_pt_table[loop1].pv_pa;
|
|
++loop1;
|
|
}
|
|
}
|
|
|
|
/* This should never be able to happen but better confirm that. */
|
|
if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
|
|
panic("initarm: Failed to align the kernel page directory\n");
|
|
|
|
/*
|
|
* Allocate a page for the system page mapped to V0x00000000
|
|
* This page will just contain the system vectors and can be
|
|
* shared by all processes.
|
|
*/
|
|
alloc_pages(systempage.pv_pa, 1);
|
|
|
|
/* Allocate a page for the page table to map kernel page tables. */
|
|
valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG);
|
|
|
|
/* Allocate stacks for all modes */
|
|
valloc_pages(irqstack, IRQ_STACK_SIZE);
|
|
valloc_pages(abtstack, ABT_STACK_SIZE);
|
|
valloc_pages(undstack, UND_STACK_SIZE);
|
|
valloc_pages(kernelstack, UPAGES);
|
|
|
|
/* Allocate enough pages for cleaning the Mini-Data cache. */
|
|
KASSERT(xscale_minidata_clean_size <= NBPG);
|
|
valloc_pages(minidataclean, 1);
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
|
|
irqstack.pv_va);
|
|
printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
|
|
abtstack.pv_va);
|
|
printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
|
|
undstack.pv_va);
|
|
printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
|
|
kernelstack.pv_va);
|
|
#endif
|
|
|
|
/*
|
|
* XXX Defer this to later so that we can reclaim the memory
|
|
* XXX used by the RedBoot page tables.
|
|
*/
|
|
alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
|
|
|
|
/*
|
|
* Ok we have allocated physical pages for the primary kernel
|
|
* page tables
|
|
*/
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
|
|
#endif
|
|
|
|
/*
|
|
* Now we start construction of the L1 page table
|
|
* We start by mapping the L2 page tables into the L1.
|
|
* This means that we can replace L1 mappings later on if necessary
|
|
*/
|
|
l1pagetable = kernel_l1pt.pv_pa;
|
|
|
|
/* Map the L2 pages tables in the L1 page table */
|
|
pmap_link_l2pt(l1pagetable, 0x00000000,
|
|
&kernel_pt_table[KERNEL_PT_SYS]);
|
|
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
|
|
pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
|
|
&kernel_pt_table[KERNEL_PT_KERNEL + loop]);
|
|
pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
|
|
&kernel_pt_table[KERNEL_PT_IOPXS]);
|
|
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
|
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
|
|
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
|
|
pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
|
|
|
|
/* update the top of the kernel VM */
|
|
pmap_curmaxkvaddr =
|
|
KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Mapping kernel\n");
|
|
#endif
|
|
|
|
/* Now we fill in the L2 pagetable for the kernel static code/data */
|
|
{
|
|
extern char etext[], _end[];
|
|
size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
|
|
size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
|
|
u_int logical;
|
|
|
|
textsize = (textsize + PGOFSET) & ~PGOFSET;
|
|
totalsize = (totalsize + PGOFSET) & ~PGOFSET;
|
|
|
|
logical = 0x00200000; /* offset of kernel in RAM */
|
|
|
|
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
|
|
physical_start + logical, textsize,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
|
|
physical_start + logical, totalsize - textsize,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
}
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Constructing L2 page tables\n");
|
|
#endif
|
|
|
|
/* Map the stack pages */
|
|
pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
|
|
IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
|
|
ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
|
|
UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
|
UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
|
|
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
|
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
|
|
/* Map the Mini-Data cache clean area. */
|
|
xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
|
|
minidataclean.pv_pa);
|
|
|
|
/* Map the page table that maps the kernel pages */
|
|
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
|
|
|
/*
|
|
* Map entries in the page table used to map PTE's
|
|
* Basically every kernel page table gets mapped here
|
|
*/
|
|
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
|
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
|
|
pmap_map_entry(l1pagetable,
|
|
PTE_BASE + ((KERNEL_BASE +
|
|
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
}
|
|
pmap_map_entry(l1pagetable,
|
|
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
|
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
|
pmap_map_entry(l1pagetable,
|
|
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
|
pmap_map_entry(l1pagetable,
|
|
PTE_BASE + ((KERNEL_VM_BASE +
|
|
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
|
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
|
|
/* Map the vector page. */
|
|
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
|
|
|
/*
|
|
* Map devices we can map w/ section mappings.
|
|
*/
|
|
loop = 0;
|
|
while (l1_sec_table[loop].size) {
|
|
vm_size_t sz;
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
|
|
l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
|
|
l1_sec_table[loop].va);
|
|
#endif
|
|
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
|
|
pmap_map_section(l1pagetable,
|
|
l1_sec_table[loop].va + sz,
|
|
l1_sec_table[loop].pa + sz,
|
|
l1_sec_table[loop].prot,
|
|
l1_sec_table[loop].cache);
|
|
++loop;
|
|
}
|
|
|
|
/*
|
|
* Map the PCI I/O spaces and i80312 registers. These are too
|
|
* small to be mapped w/ section mappings.
|
|
*/
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
|
I80312_PCI_XLATE_PIOW_BASE,
|
|
I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
|
|
IQ80310_PIOW_VBASE);
|
|
#endif
|
|
pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
|
|
I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
|
I80312_PCI_XLATE_SIOW_BASE,
|
|
I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
|
|
IQ80310_SIOW_VBASE);
|
|
#endif
|
|
pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
|
|
I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
|
I80312_PMMR_BASE,
|
|
I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
|
|
IQ80310_80312_VBASE);
|
|
#endif
|
|
pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
|
|
I80312_PMMR_BASE, I80312_PMMR_SIZE,
|
|
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
|
|
|
/*
|
|
* Give the XScale global cache clean code an appropriately
|
|
* sized chunk of unmapped VA space starting at 0xff000000
|
|
* (our device mappings end before this address).
|
|
*/
|
|
xscale_cache_clean_addr = 0xff000000U;
|
|
|
|
/*
|
|
* Now we have the real page tables in place so we can switch to them.
|
|
* Once this is done we will be running with the REAL kernel page
|
|
* tables.
|
|
*/
|
|
|
|
/*
|
|
* Update the physical_freestart/physical_freeend/free_pages
|
|
* variables.
|
|
*/
|
|
{
|
|
extern char _end[];
|
|
|
|
physical_freestart = physical_start +
|
|
(((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
|
|
KERNEL_BASE);
|
|
physical_freeend = physical_end;
|
|
free_pages = (physical_freeend - physical_freestart) / NBPG;
|
|
}
|
|
|
|
/* Switch tables */
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
|
|
physical_freestart, free_pages, free_pages);
|
|
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
|
#endif
|
|
setttb(kernel_l1pt.pv_pa);
|
|
cpu_tlb_flushID();
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("done!\n");
|
|
#endif
|
|
|
|
#ifdef VERBOSE_INIT_ARM
|
|
printf("bootstrap done.\n");
|
|
#endif
|
|
|
|
arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
|
|
|
|
/*
|
|
* Pages were allocated during the secondary bootstrap for the
|
|
* stacks for different CPU modes.
|
|
* We must now set the r13 registers in the different CPU modes to
|
|
* point to these stacks.
|
|
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
|
|
* of the stack memory.
|
|
*/
|
|
printf("init subsystems: stacks ");
|
|
|
|
set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
|
|
set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
|
|
set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
|
|
|
|
/*
|
|
* Well we should set a data abort handler.
|
|
* Once things get going this will change as we will need a proper
|
|
* handler.
|
|
* Until then we will use a handler that just panics but tells us
|
|
* why.
|
|
* Initialisation of the vectors will just panic on a data abort.
|
|
* This just fills in a slighly better one.
|
|
*/
|
|
printf("vectors ");
|
|
data_abort_handler_address = (u_int)data_abort_handler;
|
|
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
|
|
undefined_handler_address = (u_int)undefinedinstruction_bounce;
|
|
|
|
/* Initialise the undefined instruction handlers */
|
|
printf("undefined ");
|
|
undefined_init();
|
|
|
|
/* Load memory into UVM. */
|
|
printf("page ");
|
|
uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
|
|
uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
|
|
atop(physical_freestart), atop(physical_freeend),
|
|
VM_FREELIST_DEFAULT);
|
|
|
|
/* Boot strap pmap telling it where the kernel page table is */
|
|
printf("pmap ");
|
|
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
|
|
|
/* Setup the IRQ system */
|
|
printf("irq ");
|
|
iq80310_intr_init();
|
|
printf("done.\n");
|
|
|
|
#ifdef IPKDB
|
|
/* Initialise ipkdb */
|
|
ipkdb_init();
|
|
if (boothowto & RB_KDB)
|
|
ipkdb_connect(0);
|
|
#endif
|
|
|
|
#ifdef DDB
|
|
db_machine_init();
|
|
|
|
/* Firmware doesn't load symbols. */
|
|
ddb_init(0, NULL, NULL);
|
|
|
|
if (boothowto & RB_KDB)
|
|
Debugger();
|
|
#endif
|
|
|
|
/* We return the new stack pointer address */
|
|
return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
|
|
}
|
|
|
|
void
|
|
consinit(void)
|
|
{
|
|
static const bus_addr_t comcnaddrs[] = {
|
|
IQ80310_UART2, /* com0 (J9) */
|
|
IQ80310_UART1, /* com1 (J10) */
|
|
};
|
|
static int consinit_called;
|
|
|
|
if (consinit_called != 0)
|
|
return;
|
|
|
|
consinit_called = 1;
|
|
|
|
#if NCOM > 0
|
|
if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
|
|
COM_FREQ, comcnmode))
|
|
panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
|
|
#else
|
|
panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
|
|
#endif
|
|
}
|