b5a8c6922a
(eg ARM920), the mode in which the processor operates is governed by the use of both the PT_C and PT_B bits: PT_C=1,PT_B=1 -> Write-back PT_C=1,PT_B=0 -> Write-through To support this define pte_cache_mode (initialized to PT_C|PT_B) and use that when enabling cacheing for a page. |
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bin | ||
crypto | ||
dist | ||
distrib | ||
etc | ||
games | ||
gnu | ||
include | ||
lib | ||
libexec | ||
regress | ||
sbin | ||
share | ||
sys | ||
tools | ||
usr.bin | ||
usr.sbin | ||
Makefile | ||
Makefile.inc | ||
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