218 lines
7.3 KiB
C
218 lines
7.3 KiB
C
/* $NetBSD: ucb1200reg.h,v 1.2 2000/01/12 14:56:22 uch Exp $ */
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/*
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* Copyright (c) 2000, by UCHIYAMA Yasushi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the developer may NOT be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* PHILIPS UCB1200 Advanced modem/audio analog front-end
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*/
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/* Internal register. access via SIB */
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#define UCB1200_IO_DATA_REG 0
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#define UCB1200_IO_DIR_REG 1
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#define UCB1200_POSINTEN_REG 2
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#define UCB1200_NEGINTEN_REG 3
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#define UCB1200_INTSTAT_REG 4
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#define UCB1200_TELECOMCTRLA_REG 5
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#define UCB1200_TELECOMCTRLB_REG 6
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#define UCB1200_AUDIOCTRLA_REG 7
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#define UCB1200_AUDIOCTRLB_REG 8
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#define UCB1200_TSCTRL_REG 9
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#define UCB1200_ADCCTRL_REG 10
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#define UCB1200_ADCDATA_REG 11
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#define UCB1200_ID_REG 12
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#define UCB1200_MODE_REG 13
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#define UCB1200_RESERVED_REG 14
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#define UCB1200_NULL_REG 15 /* always returns 0xffff */
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/*
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* I/O port data register
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*/
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#define UCB1200_IO_DATA_SPEAKER 0x100 /* XXX general? */
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/*
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* Telecom control register A
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*/
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#define UCB1200_TELECOMCTRLA_DIV_MIN 16
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#define UCB1200_TELECOMCTRLA_DIV_MAX 127
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#define UCB1200_TELECOMCTRLA_DIV_SHIFT 0
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#define UCB1200_TELECOMCTRLA_DIV_MASK 0x7f
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#define UCB1200_TELECOMCTRLA_DIV(cr) \
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(((cr) >> UCB1200_TELECOMCTRLA_DIV_SHIFT) & \
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UCB1200_TELECOMCTRLA_DIV_MASK)
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#define UCB1200_TELECOMCTRLA_DIV_SET(cr, val) \
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((cr) | (((val) << UCB1200_TELECOMCTRLA_DIV_SHIFT) & \
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(UCB1200_TELECOMCTRLA_DIV_MASK << UCB1200_TELECOMCTRLA_DIV_SHIFT)))
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#define UCB1200_TELECOMCTRLA_LOOP 0x0080
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/*
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* Telecom control register B
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*/
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#define UCB1200_TELECOMCTRLB_VBF 0x0008
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#define UCB1200_TELECOMCTRLB_CLIPSTATCLR 0x0010
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#define UCB1200_TELECOMCTRLB_ATT 0x0040
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#define UCB1200_TELECOMCTRLB_STS 0x0800
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#define UCB1200_TELECOMCTRLB_MUTE 0x2000
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#define UCB1200_TELECOMCTRLB_INEN 0x4000
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#define UCB1200_TELECOMCTRLB_OUTEN 0x8000
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/*
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* Audio control register A
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*/
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#define UCB1200_AUDIOCTRLA_DIV_MIN 6
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#define UCB1200_AUDIOCTRLA_DIV_MAX 127
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#define UCB1200_AUDIOCTRLA_DIV_SHIFT 0
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#define UCB1200_AUDIOCTRLA_DIV_MASK 0x7f
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#define UCB1200_AUDIOCTRLA_DIV(cr) \
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(((cr) >> UCB1200_AUDIOCTRLA_DIV_SHIFT) & \
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UCB1200_AUDIOCTRLA_DIV_MASK)
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#define UCB1200_AUDIOCTRLA_DIV_SET(cr, val) \
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((cr) | (((val) << UCB1200_AUDIOCTRLA_DIV_SHIFT) & \
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(UCB1200_AUDIOCTRLA_DIV_MASK << UCB1200_AUDIOCTRLA_DIV_SHIFT)))
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#define UCB1200_AUDIOCTRLA_GAIN_SHIFT 7
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#define UCB1200_AUDIOCTRLA_GAIN_MASK 0x1f
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#define UCB1200_AUDIOCTRLA_GAIN(cr) \
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(((cr) >> UCB1200_AUDIOCTRLA_GAIN_SHIFT) & \
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UCB1200_AUDIOCTRLA_GAIN_MASK)
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#define UCB1200_AUDIOCTRLA_GAIN_SET(cr, val) \
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((cr) | (((val) << UCB1200_AUDIOCTRLA_GAIN_SHIFT) & \
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(UCB1200_AUDIOCTRLA_GAIN_MASK << UCB1200_AUDIOCTRLA_GAIN_SHIFT)))
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/*
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* Audio control register B
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*/
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#define UCB1200_AUDIOCTRLB_ATT_MIN 0
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#define UCB1200_AUDIOCTRLB_ATT_MAX 0x1f
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#define UCB1200_AUDIOCTRLB_ATT_SHIFT 0
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#define UCB1200_AUDIOCTRLB_ATT_MASK 0x1f
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#define UCB1200_AUDIOCTRLB_ATT(cr) \
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(((cr) >> UCB1200_AUDIOCTRLB_ATT_SHIFT) & \
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UCB1200_AUDIOCTRLB_ATT_MASK)
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#define UCB1200_AUDIOCTRLB_ATT_SET(cr, val) \
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((cr) | (((val) << UCB1200_AUDIOCTRLB_ATT_SHIFT) & \
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(UCB1200_AUDIOCTRLB_ATT_MASK << UCB1200_AUDIOCTRLB_ATT_SHIFT)))
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#define UCB1200_AUDIOCTRLB_CLIPSTATCLR 0x0040
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#define UCB1200_AUDIOCTRLB_LOOP 0x0100
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#define UCB1200_AUDIOCTRLB_MUTE 0x2000
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#define UCB1200_AUDIOCTRLB_INEN 0x4000
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#define UCB1200_AUDIOCTRLB_OUTEN 0x8000
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/*
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* Touch screen control register
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*/
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#define UCB1200_TSCTRL_MXLOW 0x00002000
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#define UCB1200_TSCTRL_PXLOW 0x00001000
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#define UCB1200_TSCTRL_BIAS 0x00000800
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#define UCB1200_TSCTRL_MODE_SHIFT 8
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#define UCB1200_TSCTRL_MODE_MASK 0x7f
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#define UCB1200_TSCTRL_MODE(cr) \
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(((cr) >> UCB1200_TSCTRL_MODE_SHIFT) & \
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UCB1200_TSCTRL_MODE_MASK)
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#define UCB1200_TSCTRL_MODE_INTERRUPT 0
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#define UCB1200_TSCTRL_MODE_PRESSURE (1 << UCB1200_TSCTRL_MODE_SHIFT)
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#define UCB1200_TSCTRL_MODE_POSITION0 (2 << UCB1200_TSCTRL_MODE_SHIFT)
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#define UCB1200_TSCTRL_MODE_POSITION1 (3 << UCB1200_TSCTRL_MODE_SHIFT)
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#define UCB1200_TSCTRL_PYGND 0x00000080
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#define UCB1200_TSCTRL_MYGND 0x00000040
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#define UCB1200_TSCTRL_PXGND 0x00000020
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#define UCB1200_TSCTRL_MXGND 0x00000010
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#define UCB1200_TSCTRL_PYPWR 0x00000008
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#define UCB1200_TSCTRL_MYPWR 0x00000004
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#define UCB1200_TSCTRL_PXPWR 0x00000002
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#define UCB1200_TSCTRL_MXPWR 0x00000001
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/* touch screen modes */
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#define UCB1200_TSCTRL_YPOSITION \
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(UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXGND | \
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UCB1200_TSCTRL_MODE_POSITION0 | UCB1200_TSCTRL_BIAS)
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#define UCB1200_TSCTRL_XPOSITION \
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(UCB1200_TSCTRL_PYPWR | UCB1200_TSCTRL_MYGND | \
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UCB1200_TSCTRL_MODE_POSITION0 | UCB1200_TSCTRL_BIAS)
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#define UCB1200_TSCTRL_PRESSURE \
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(UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXPWR | \
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UCB1200_TSCTRL_PYGND | UCB1200_TSCTRL_MYGND | \
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UCB1200_TSCTRL_MODE_PRESSURE | UCB1200_TSCTRL_BIAS)
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#define UCB1200_TSCTRL_INTERRUPT \
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(UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXPWR | \
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UCB1200_TSCTRL_PYGND | UCB1200_TSCTRL_MYGND | \
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UCB1200_TSCTRL_MODE_INTERRUPT)
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#define UCB1200_TSCTRL_PRESSURE1
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#define UCB1200_TSCTRL_PRESSURE2
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#define UCB1200_TSCTRL_PRESSURE3
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#define UCB1200_TSCTRL_PRESSURE4
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#define UCB1200_TSCTRL_PRESSURE5
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#define UCB1200_TSCTRL_XRESISTANCE
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#define UCB1200_TSCTRL_YRESISTANCE
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/*
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* ADC control register
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*/
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#define UCB1200_ADCCTRL_ENABLE 0x8000
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#define UCB1200_ADCCTRL_START 0x0080
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#define UCB1200_ADCCTRL_EXTREF 0x0020
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#define UCB1200_ADCCTRL_INPUT_SHIFT 2
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#define UCB1200_ADCCTRL_INPUT_MASK 0x7
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#define UCB1200_ADCCTRL_INPUT_SET(cr, val) \
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((cr) | (((val) << UCB1200_ADCCTRL_INPUT_SHIFT) & \
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(UCB1200_ADCCTRL_INPUT_MASK << UCB1200_ADCCTRL_INPUT_SHIFT)))
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#define UCB1200_ADCCTRL_INPUT_TSPX 0x0
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#define UCB1200_ADCCTRL_INPUT_TSMX 0x1
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#define UCB1200_ADCCTRL_INPUT_TSPY 0x2
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#define UCB1200_ADCCTRL_INPUT_TSMY 0x3
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#define UCB1200_ADCCTRL_INPUT_AD0 0x4
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#define UCB1200_ADCCTRL_INPUT_AD1 0x5
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#define UCB1200_ADCCTRL_INPUT_AD2 0x6
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#define UCB1200_ADCCTRL_INPUT_AD3 0x7
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#define UCB1200_ADCCTRL_VREFBYP 0x0002
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#define UCB1200_ADCCTRL_SYNCMODE 0x0001
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/*
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* ADC data register
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*/
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#define UCB1200_ADCDATA_INPROGRESS 0x8000
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#define UCB1200_ADCDATA_SHIFT 5
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#define UCB1200_ADCDATA_MASK 0x3ff
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#define UCB1200_ADCDATA(cr) \
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(((cr) >> UCB1200_ADCDATA_SHIFT) & \
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UCB1200_ADCDATA_MASK)
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/*
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* ID register
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*/
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/* Version 4, Device 0, Supplier 1 */
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#define UCB1200_ID 0x1004
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/* TOSHIBA TC35413F */
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#define TC35413F_ID 0x9712
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