117 lines
3.5 KiB
C
117 lines
3.5 KiB
C
/* $NetBSD: v360reg.h,v 1.1 2001/10/27 16:20:29 rearnsha Exp $ */
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/*-
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* Copyright (c) 2001 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* V3 V360EPI Local Bus <-> PCI bridge.
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*/
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#define V360_PCI_VENDOR 0x00
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#define V360_PCI_DEVICE 0x02
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#define V360_PCI_CMD 0x04
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#define V360_PCI_STAT 0x06
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#define V360_PCI_CC_REV 0x08
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#define V360_PCI_HDR_CFG 0x0c
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#define V360_PCI_IO_BASE 0x10
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#define V360_PCI_BASE0 0x14
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#define V360_PCI_BASE1 0x18
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#define V360_PCI_SUB_VENDOR 0x2c
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#define V360_PCI_SUB_ID 0x2e
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#define V360_PCI_ROM 0x30
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#define V360_PCI_BPARAM 0x3c
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#define V360_PCI_MAP0 0x40
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#define V360_PCI_MAP1 0x44
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#define V360_PCI_INT_STAT 0x48
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#define V360_PCI_INT_CFG 0x4c
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#define V360_LB_BASE0 0x54
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#define V360_LB_BASE1 0x58
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#define V360_LB_MAP0 0x5e
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#define V360_LB_MAP1 0x62
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#define V360_LB_BASE2 0x64
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#define V360_LB_MAP2 0x66
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#define V360_LB_SIZE 0x68
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#define V360_LB_IO_BASE 0x6e
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#define V360_FIFO_CFG 0x70
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#define V360_FIFO_PRIORITY 0x72
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#define V360_FIFO_STAT 0x74
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#define V360_LB_ISTAT 0x76
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#define V360_LB_IMASK 0x77
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#define V360_SYSTEM 0x78
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#define V360_LB_CFG 0x7a
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#define V360_PCI_CFG 0x7c
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#define V360_DMA_PCI_ADDR0 0x80
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#define V360_DMA_LOCAL_ADDR0 0x84
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#define V360_DMA_LENGTH0 0x88
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#define V360_DMA_CSR0 0x8b
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#define V360_DMA_CTLB_ADDR0 0x8c
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#define V360_DMA_PCI_ADDR1 0x90
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#define V360_DMA_LOCAL_ADDR1 0x94
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#define V360_DMA_LENGTH1 0x98
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#define V360_DMA_CSR1 0x9b
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#define V360_DMA_CTLB_ADDR1 0x9c
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#define V360_MAIL_DATA0 0xc0
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#define V360_MAIL_DATA1 0xc1
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#define V360_MAIL_DATA2 0xc2
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#define V360_MAIL_DATA3 0xc3
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#define V360_MAIL_DATA4 0xc4
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#define V360_MAIL_DATA5 0xc5
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#define V360_MAIL_DATA6 0xc6
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#define V360_MAIL_DATA7 0xc7
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#define V360_MAIL_DATA8 0xc8
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#define V360_MAIL_DATA9 0xc9
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#define V360_MAIL_DATA10 0xca
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#define V360_MAIL_DATA11 0xcb
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#define V360_MAIL_DATA12 0xcc
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#define V360_MAIL_DATA13 0xcd
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#define V360_MAIL_DATA14 0xce
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#define V360_MAIL_DATA15 0xcf
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#define V360_PCI_MAIL_IEWR 0xd0
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#define V360_PCI_MAIL_IERD 0xd2
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#define V360_LB_MAIL_IEWR 0xd4
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#define V360_LB_MAIL_IERd 0xd6
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#define V360_MAIL_WR_STAT 0xd8
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#define V360_MAIL_RD_STAT 0xda
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#define V360_QBA_MAP 0xdc
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#define V360_DMA_DELAY 0xe0
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