75 lines
3.0 KiB
C
75 lines
3.0 KiB
C
/* $NetBSD: isadmareg.h,v 1.8 2008/04/28 20:23:52 martin Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_ISA_ISADMAREG_H_
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#define _DEV_ISA_ISADMAREG_H_
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#include <dev/ic/i8237reg.h>
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/*
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* By default, ISA DMA controllers can do 64k or 128k transfers, depending
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* on the width of the channel being used. However, this may be modified
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* by our parent based on bus constraints, etc. Clients of ISA DMA should
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* query the ISA DMA to determine the maximum transfer size allowed.
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*/
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#define ISA_DMA_MAXSIZE_8BIT (64 * 1024)
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#define ISA_DMA_MAXSIZE_16BIT (ISA_DMA_MAXSIZE_8BIT * 2)
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#define ISA_DMA_MAXSIZE_DEFAULT(chan) \
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(((chan) & 4) ? ISA_DMA_MAXSIZE_16BIT : ISA_DMA_MAXSIZE_8BIT)
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/*
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* Register definitions for DMA controller 1 (channels 0..3):
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*/
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#define DMA1_CHN(c) (1*(2*(c))) /* addr reg for channel c */
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#define DMA1_SR (1*8) /* status register */
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#define DMA1_SMSK (1*10) /* single mask register */
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#define DMA1_MODE (1*11) /* mode register */
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#define DMA1_FFC (1*12) /* clear first/last FF */
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#define DMA1_MASK (1*15) /* mask register */
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#define DMA1_IOSIZE (1*16)
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/*
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* Register definitions for DMA controller 2 (channels 4..7):
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*/
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#define DMA2_CHN(c) (2*(2*(c))) /* addr reg for channel c */
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#define DMA2_SR (2*8) /* status register */
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#define DMA2_SMSK (2*10) /* single mask register */
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#define DMA2_MODE (2*11) /* mode register */
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#define DMA2_FFC (2*12) /* clear first/last FF */
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#define DMA2_MASK (2*15) /* mask register */
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#define DMA2_IOSIZE (2*16)
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#endif /* _DEV_ISA_ISADMAREG_H_ */
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