728 lines
22 KiB
C
728 lines
22 KiB
C
/* $NetBSD: sdtemp.c,v 1.33 2018/02/22 10:09:12 msaitoh Exp $ */
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/*
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* Copyright (c) 2009 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Goyette.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sdtemp.c,v 1.33 2018/02/22 10:09:12 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kmem.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/endian.h>
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#include <sys/module.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/sdtemp_reg.h>
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struct sdtemp_softc {
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device_t sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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struct sysmon_envsys *sc_sme;
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envsys_data_t *sc_sensor;
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sysmon_envsys_lim_t sc_deflims;
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uint32_t sc_defprops;
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int sc_resolution;
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uint16_t sc_mfgid;
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uint16_t sc_devid;
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uint16_t sc_devid_masked;
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uint16_t sc_capability;
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};
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static int sdtemp_match(device_t, cfdata_t, void *);
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static void sdtemp_attach(device_t, device_t, void *);
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static int sdtemp_detach(device_t, int);
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CFATTACH_DECL_NEW(sdtemp, sizeof(struct sdtemp_softc),
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sdtemp_match, sdtemp_attach, sdtemp_detach, NULL);
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static void sdtemp_refresh(struct sysmon_envsys *, envsys_data_t *);
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static void sdtemp_get_limits(struct sysmon_envsys *, envsys_data_t *,
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sysmon_envsys_lim_t *, uint32_t *);
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static void sdtemp_set_limits(struct sysmon_envsys *, envsys_data_t *,
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sysmon_envsys_lim_t *, uint32_t *);
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#ifdef NOT_YET
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static int sdtemp_read_8(struct sdtemp_softc *, uint8_t, uint8_t *);
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static int sdtemp_write_8(struct sdtemp_softc *, uint8_t, uint8_t);
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#endif /* NOT YET */
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static int sdtemp_read_16(struct sdtemp_softc *, uint8_t, uint16_t *);
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static int sdtemp_write_16(struct sdtemp_softc *, uint8_t, uint16_t);
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static uint32_t sdtemp_decode_temp(struct sdtemp_softc *, uint16_t);
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static bool sdtemp_pmf_suspend(device_t, const pmf_qual_t *);
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static bool sdtemp_pmf_resume(device_t, const pmf_qual_t *);
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/* Device dependent config functions */
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static void sdtemp_config_mcp(struct sdtemp_softc *);
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static void sdtemp_config_idt(struct sdtemp_softc *);
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struct sdtemp_dev_entry {
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const uint16_t sdtemp_mfg_id;
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const uint16_t sdtemp_devrev;
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const uint16_t sdtemp_mask;
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void (*sdtemp_config)(struct sdtemp_softc *);
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const char *sdtemp_desc;
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};
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/* Convert sysmon_envsys uKelvin value to simple degC */
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#define __UK2C(uk) (((uk) - 273150000) / 1000000)
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/* List of devices known to conform to JEDEC JC42.4 */
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#define CMCP sdtemp_config_mcp
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#define CIDT sdtemp_config_idt
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static const struct sdtemp_dev_entry
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sdtemp_dev_table[] = {
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{ AT_MANUFACTURER_ID, AT_30TS00_DEVICE_ID, AT_30TS00_MASK, NULL,
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"Atmel AT30TS00" },
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{ AT2_MANUFACTURER_ID, AT2_30TSE004_DEVICE_ID, AT2_30TSE004_MASK, NULL,
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"Atmel AT30TSE004" },
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{ GT_MANUFACTURER_ID, GT_30TS00_DEVICE_ID, GT_30TS00_MASK, NULL,
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"Giantec GT30TS00" },
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{ GT2_MANUFACTURER_ID, GT2_34TS02_DEVICE_ID, GT2_34TS02_MASK, NULL,
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"Giantec GT34TS02" },
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{ MAXIM_MANUFACTURER_ID, MAX_6604_DEVICE_ID, MAX_6604_MASK, NULL,
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"Maxim MAX6604" },
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{ MAXIM_MANUFACTURER_ID, MAX_6604_2_DEVICE_ID, MAX_6604_MASK, NULL,
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"Maxim MAX6604" },
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{ MCP_MANUFACTURER_ID, MCP_9804_DEVICE_ID, MCP_9804_MASK, CMCP,
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"Microchip Tech MCP9804" },
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{ MCP_MANUFACTURER_ID, MCP_9805_DEVICE_ID, MCP_9805_MASK, NULL,
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"Microchip Tech MCP9805/MCP9843" },
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{ MCP_MANUFACTURER_ID, MCP_98242_DEVICE_ID, MCP_98242_MASK, CMCP,
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"Microchip Tech MCP98242" },
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{ MCP_MANUFACTURER_ID, MCP_98243_DEVICE_ID, MCP_98243_MASK, CMCP,
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"Microchip Tech MCP98243" },
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{ MCP_MANUFACTURER_ID, MCP_98244_DEVICE_ID, MCP_98244_MASK, CMCP,
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"Microchip Tech MCP98244" },
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{ MCP2_MANUFACTURER_ID, MCP2_EMC1501_DEVICE_ID, MCP2_EMC1501_MASK, NULL,
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"Microchip Tech EMC1501" },
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{ ADT_MANUFACTURER_ID, ADT_7408_DEVICE_ID, ADT_7408_MASK, NULL,
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"Analog Devices ADT7408" },
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{ NXP_MANUFACTURER_ID, NXP_SE98_DEVICE_ID, NXP_SE98_MASK, NULL,
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"NXP Semiconductors SE97B/SE98" },
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{ NXP_MANUFACTURER_ID, NXP_SE97_DEVICE_ID, NXP_SE97_MASK, NULL,
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"NXP Semiconductors SE97" },
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{ STTS_MANUFACTURER_ID, STTS_424E_DEVICE_ID, STTS_424E_MASK, NULL,
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"STmicroelectronics STTS424E" },
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{ STTS_MANUFACTURER_ID, STTS_424_DEVICE_ID, STTS_424_MASK, NULL,
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"STmicroelectronics STTS424" },
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{ STTS_MANUFACTURER_ID, STTS_2002_DEVICE_ID, STTS_2002_MASK, NULL,
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"STmicroelectronics STTS2002" },
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{ STTS_MANUFACTURER_ID, STTS_2004_DEVICE_ID, STTS_2004_MASK, NULL,
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"STmicroelectronics STTS2004" },
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{ STTS_MANUFACTURER_ID, STTS_3000_DEVICE_ID, STTS_3000_MASK, NULL,
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"STmicroelectronics STTS3000" },
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{ CAT_MANUFACTURER_ID, CAT_34TS02_DEVICE_ID, CAT_34TS02_MASK, NULL,
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"Catalyst CAT34TS02/CAT6095" },
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{ CAT_MANUFACTURER_ID, CAT_34TS02C_DEVICE_ID, CAT_34TS02C_MASK, NULL,
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"Catalyst CAT34TS02C" },
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{ CAT_MANUFACTURER_ID, CAT_34TS04_DEVICE_ID, CAT_34TS04_MASK, NULL,
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"Catalyst CAT34TS04" },
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{ IDT_MANUFACTURER_ID, IDT_TSE2004GB2_DEVICE_ID,IDT_TSE2004GB2_MASK, NULL,
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"Integrated Device Technology TSE2004GB2" },
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{ IDT_MANUFACTURER_ID, IDT_TS3000B3_DEVICE_ID, IDT_TS3000B3_MASK, CIDT,
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"Integrated Device Technology TS3000B3/TSE2002B3" },
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{ IDT_MANUFACTURER_ID, IDT_TS3000GB0_DEVICE_ID, IDT_TS3000GB0_MASK, CIDT,
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"Integrated Device Technology TS3000GB0" },
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{ IDT_MANUFACTURER_ID, IDT_TS3000GB2_DEVICE_ID, IDT_TS3000GB2_MASK, CIDT,
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"Integrated Device Technology TS3000GB2" },
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{ IDT_MANUFACTURER_ID, IDT_TS3001GB2_DEVICE_ID, IDT_TS3001GB2_MASK, CIDT,
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"Integrated Device Technology TS3001GB2" },
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/*
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* Don't change the location of the following two entries. Device specific
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* entry must be located at above.
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*/
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{ 0, TSE2004AV_ID, TSE2004AV_MASK, NULL,
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"TSE2004av compliant device (generic driver)" },
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{ 0, 0, 0, NULL, "Unknown" }
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};
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#undef CMCP
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#undef CIDT
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static const char *temp_resl[] = {
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"0.5C",
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"0.25C",
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"0.125C",
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"0.0625C"
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};
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static int
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sdtemp_lookup(uint16_t mfg, uint16_t devrev)
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{
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int i;
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for (i = 0; sdtemp_dev_table[i].sdtemp_mfg_id; i++) {
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if (mfg != sdtemp_dev_table[i].sdtemp_mfg_id)
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continue;
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if ((devrev & sdtemp_dev_table[i].sdtemp_mask) ==
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sdtemp_dev_table[i].sdtemp_devrev)
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break;
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}
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/* Check TSE2004av */
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if ((sdtemp_dev_table[i].sdtemp_mfg_id == 0)
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&& (SDTEMP_IS_TSE2004AV(devrev) == 0))
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i++; /* Unknown */
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return i;
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}
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static int
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sdtemp_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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uint16_t mfgid, devid, cap;
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struct sdtemp_softc sc;
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int i, error;
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sc.sc_tag = ia->ia_tag;
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sc.sc_address = ia->ia_addr;
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if ((ia->ia_addr & SDTEMP_ADDRMASK) != SDTEMP_ADDR)
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return 0;
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/* Verify that we can read the manufacturer ID, Device ID and the capability */
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iic_acquire_bus(sc.sc_tag, 0);
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error = sdtemp_read_16(&sc, SDTEMP_REG_MFG_ID, &mfgid) |
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sdtemp_read_16(&sc, SDTEMP_REG_DEV_REV, &devid) |
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sdtemp_read_16(&sc, SDTEMP_REG_CAPABILITY, &cap);
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iic_release_bus(sc.sc_tag, 0);
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if (error)
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return 0;
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i = sdtemp_lookup(mfgid, devid);
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if ((sdtemp_dev_table[i].sdtemp_mfg_id == 0) &&
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(sdtemp_dev_table[i].sdtemp_devrev == 0)) {
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aprint_debug("sdtemp: No match for mfg 0x%04x dev 0x%02x "
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"rev 0x%02x at address 0x%02x\n", mfgid, devid >> 8,
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devid & 0xff, sc.sc_address);
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return 0;
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}
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/*
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* Check by SDTEMP_IS_TSE2004AV() might not be enough, so check the alarm
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* capability, too.
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*/
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if ((cap & SDTEMP_CAP_HAS_ALARM) == 0)
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return 0;
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return 1;
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}
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static void
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sdtemp_attach(device_t parent, device_t self, void *aux)
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{
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struct sdtemp_softc *sc = device_private(self);
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struct i2c_attach_args *ia = aux;
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uint16_t mfgid, devid;
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int i, error;
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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sc->sc_dev = self;
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iic_acquire_bus(sc->sc_tag, 0);
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if ((error = sdtemp_read_16(sc, SDTEMP_REG_MFG_ID, &mfgid)) != 0 ||
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(error = sdtemp_read_16(sc, SDTEMP_REG_DEV_REV, &devid)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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aprint_error(": attach error %d\n", error);
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return;
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}
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sc->sc_mfgid = mfgid;
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sc->sc_devid = devid;
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i = sdtemp_lookup(mfgid, devid);
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sc->sc_devid_masked = devid & sdtemp_dev_table[i].sdtemp_mask;
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aprint_naive(": Temp Sensor\n");
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aprint_normal(": %s Temp Sensor\n", sdtemp_dev_table[i].sdtemp_desc);
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if (sdtemp_dev_table[i].sdtemp_mfg_id == 0) {
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if (SDTEMP_IS_TSE2004AV(devid))
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aprint_normal_dev(self, "TSE2004av compliant. "
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"Manufacturer ID 0x%04hx, Device revision 0x%02x\n",
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mfgid, devid & TSE2004AV_REV);
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else {
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aprint_error_dev(self,
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"mfg 0x%04x dev 0x%02x rev 0x%02x at addr 0x%02x\n",
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mfgid, devid >> 8, devid & 0xff, ia->ia_addr);
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iic_release_bus(sc->sc_tag, 0);
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aprint_error_dev(self, "It should no happen. "
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"Why attach() found me?\n");
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return;
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}
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}
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error = sdtemp_read_16(sc, SDTEMP_REG_CAPABILITY, &sc->sc_capability);
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aprint_debug_dev(self, "capability reg = %04x\n", sc->sc_capability);
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sc->sc_resolution
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= __SHIFTOUT(sc->sc_capability, SDTEMP_CAP_RESOLUTION);
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/*
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* Call device dependent function here. Currently, it's used for
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* the resolution.
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*
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* IDT's devices and some Microchip's devices have the resolution
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* register in the vendor specific registers area. The devices'
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* resolution bits in the capability register are not the maximum
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* resolution but the current vaule of the setting.
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*/
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if (sdtemp_dev_table[i].sdtemp_config != NULL)
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sdtemp_dev_table[i].sdtemp_config(sc);
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aprint_normal_dev(self, "%s accuracy",
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(sc->sc_capability & SDTEMP_CAP_ACCURACY_1C) ? "high" : "default");
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if ((sc->sc_capability & SDTEMP_CAP_WIDER_RANGE) != 0)
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aprint_normal(", wider range");
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aprint_normal(", %s resolution", temp_resl[sc->sc_resolution]);
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if ((sc->sc_capability & SDTEMP_CAP_VHV) != 0)
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aprint_debug(", high voltage standoff");
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aprint_debug(", %s timeout",
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(sc->sc_capability & SDTEMP_CAP_TMOUT) ? "25-35ms" : "10-60ms");
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if ((sc->sc_capability & SDTEMP_CAP_EVSD) != 0)
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aprint_normal(", event with shutdown");
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aprint_normal("\n");
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/*
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* Alarm capability is required; if not present, this is likely
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* not a real sdtemp device.
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*/
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if (error != 0 || (sc->sc_capability & SDTEMP_CAP_HAS_ALARM) == 0) {
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iic_release_bus(sc->sc_tag, 0);
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aprint_error_dev(self,
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"required alarm capability not present!\n");
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return;
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}
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/* Set the configuration to defaults. */
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error = sdtemp_write_16(sc, SDTEMP_REG_CONFIG, 0);
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if (error != 0) {
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iic_release_bus(sc->sc_tag, 0);
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aprint_error_dev(self, "error %d writing config register\n",
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error);
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return;
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}
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iic_release_bus(sc->sc_tag, 0);
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/* Hook us into the sysmon_envsys subsystem */
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sc->sc_sme = sysmon_envsys_create();
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sc->sc_sme->sme_name = device_xname(self);
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sc->sc_sme->sme_cookie = sc;
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sc->sc_sme->sme_refresh = sdtemp_refresh;
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sc->sc_sme->sme_get_limits = sdtemp_get_limits;
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sc->sc_sme->sme_set_limits = sdtemp_set_limits;
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sc->sc_sensor = kmem_zalloc(sizeof(envsys_data_t), KM_NOSLEEP);
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if (!sc->sc_sensor) {
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aprint_error_dev(self, "unable to allocate sc_sensor\n");
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goto bad2;
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}
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/* Initialize sensor data. */
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sc->sc_sensor->units = ENVSYS_STEMP;
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sc->sc_sensor->state = ENVSYS_SINVALID;
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sc->sc_sensor->flags |= ENVSYS_FMONLIMITS;
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(void)strlcpy(sc->sc_sensor->desc, device_xname(self),
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sizeof(sc->sc_sensor->desc));
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snprintf(sc->sc_sensor->desc, sizeof(sc->sc_sensor->desc),
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"DIMM %d temperature", sc->sc_address - SDTEMP_ADDR);
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/* Now attach the sensor */
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if (sysmon_envsys_sensor_attach(sc->sc_sme, sc->sc_sensor)) {
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aprint_error_dev(self, "unable to attach sensor\n");
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goto bad;
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}
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/* Register the device */
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error = sysmon_envsys_register(sc->sc_sme);
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if (error) {
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aprint_error_dev(self, "error %d registering with sysmon\n",
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error);
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goto bad;
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}
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if (!pmf_device_register(self, sdtemp_pmf_suspend, sdtemp_pmf_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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/* Retrieve and display hardware monitor limits */
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sdtemp_get_limits(sc->sc_sme, sc->sc_sensor, &sc->sc_deflims,
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&sc->sc_defprops);
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aprint_normal_dev(self, "Hardware limits: ");
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i = 0;
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if (sc->sc_defprops & PROP_WARNMIN) {
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aprint_normal("low %dC",
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__UK2C(sc->sc_deflims.sel_warnmin));
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i++;
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}
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if (sc->sc_defprops & PROP_WARNMAX) {
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aprint_normal("%shigh %dC ", (i)?", ":"",
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__UK2C(sc->sc_deflims.sel_warnmax));
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i++;
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}
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if (sc->sc_defprops & PROP_CRITMAX) {
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aprint_normal("%scritical %dC ", (i)?", ":"",
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__UK2C(sc->sc_deflims.sel_critmax));
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i++;
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}
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aprint_normal("%s\n", (i)?"":"none set");
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return;
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bad:
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kmem_free(sc->sc_sensor, sizeof(envsys_data_t));
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bad2:
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sysmon_envsys_destroy(sc->sc_sme);
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}
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static int
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sdtemp_detach(device_t self, int flags)
|
|
{
|
|
struct sdtemp_softc *sc = device_private(self);
|
|
|
|
pmf_device_deregister(self);
|
|
|
|
if (sc->sc_sme)
|
|
sysmon_envsys_unregister(sc->sc_sme);
|
|
if (sc->sc_sensor)
|
|
kmem_free(sc->sc_sensor, sizeof(envsys_data_t));
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Retrieve current limits from device, and encode in uKelvins */
|
|
static void
|
|
sdtemp_get_limits(struct sysmon_envsys *sme, envsys_data_t *edata,
|
|
sysmon_envsys_lim_t *limits, uint32_t *props)
|
|
{
|
|
struct sdtemp_softc *sc = sme->sme_cookie;
|
|
uint16_t lim;
|
|
|
|
*props = 0;
|
|
iic_acquire_bus(sc->sc_tag, 0);
|
|
if (sdtemp_read_16(sc, SDTEMP_REG_LOWER_LIM, &lim) == 0 && lim != 0) {
|
|
limits->sel_warnmin = sdtemp_decode_temp(sc, lim);
|
|
*props |= PROP_WARNMIN;
|
|
}
|
|
if (sdtemp_read_16(sc, SDTEMP_REG_UPPER_LIM, &lim) == 0 && lim != 0) {
|
|
limits->sel_warnmax = sdtemp_decode_temp(sc, lim);
|
|
*props |= PROP_WARNMAX;
|
|
}
|
|
if (sdtemp_read_16(sc, SDTEMP_REG_CRIT_LIM, &lim) == 0 && lim != 0) {
|
|
limits->sel_critmax = sdtemp_decode_temp(sc, lim);
|
|
*props |= PROP_CRITMAX;
|
|
}
|
|
iic_release_bus(sc->sc_tag, 0);
|
|
if (*props != 0)
|
|
*props |= PROP_DRIVER_LIMITS;
|
|
}
|
|
|
|
/* Send current limit values to the device */
|
|
static void
|
|
sdtemp_set_limits(struct sysmon_envsys *sme, envsys_data_t *edata,
|
|
sysmon_envsys_lim_t *limits, uint32_t *props)
|
|
{
|
|
uint16_t val;
|
|
struct sdtemp_softc *sc = sme->sme_cookie;
|
|
|
|
if (limits == NULL) {
|
|
limits = &sc->sc_deflims;
|
|
props = &sc->sc_defprops;
|
|
}
|
|
iic_acquire_bus(sc->sc_tag, 0);
|
|
if (*props & PROP_WARNMIN) {
|
|
val = __UK2C(limits->sel_warnmin);
|
|
(void)sdtemp_write_16(sc, SDTEMP_REG_LOWER_LIM,
|
|
(val << 4) & SDTEMP_TEMP_MASK);
|
|
}
|
|
if (*props & PROP_WARNMAX) {
|
|
val = __UK2C(limits->sel_warnmax);
|
|
(void)sdtemp_write_16(sc, SDTEMP_REG_UPPER_LIM,
|
|
(val << 4) & SDTEMP_TEMP_MASK);
|
|
}
|
|
if (*props & PROP_CRITMAX) {
|
|
val = __UK2C(limits->sel_critmax);
|
|
(void)sdtemp_write_16(sc, SDTEMP_REG_CRIT_LIM,
|
|
(val << 4) & SDTEMP_TEMP_MASK);
|
|
}
|
|
iic_release_bus(sc->sc_tag, 0);
|
|
|
|
/*
|
|
* If at least one limit is set that we can handle, and no
|
|
* limits are set that we cannot handle, tell sysmon that
|
|
* the driver will take care of monitoring the limits!
|
|
*/
|
|
if (*props & (PROP_CRITMIN | PROP_BATTCAP | PROP_BATTWARN))
|
|
*props &= ~PROP_DRIVER_LIMITS;
|
|
else if (*props & PROP_LIMITS)
|
|
*props |= PROP_DRIVER_LIMITS;
|
|
else
|
|
*props &= ~PROP_DRIVER_LIMITS;
|
|
}
|
|
|
|
#ifdef NOT_YET /* All registers on these sensors are 16-bits */
|
|
|
|
/* Read a 8-bit value from a register */
|
|
static int
|
|
sdtemp_read_8(struct sdtemp_softc *sc, uint8_t reg, uint8_t *valp)
|
|
{
|
|
int error;
|
|
|
|
error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
|
|
sc->sc_address, ®, 1, valp, sizeof(*valp), 0);
|
|
|
|
return error;
|
|
}
|
|
|
|
static int
|
|
sdtemp_write_8(struct sdtemp_softc *sc, uint8_t reg, uint8_t val)
|
|
{
|
|
return iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
|
|
sc->sc_address, ®, 1, &val, sizeof(val), 0);
|
|
}
|
|
#endif /* NOT_YET */
|
|
|
|
/* Read a 16-bit value from a register */
|
|
static int
|
|
sdtemp_read_16(struct sdtemp_softc *sc, uint8_t reg, uint16_t *valp)
|
|
{
|
|
int error;
|
|
|
|
error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
|
|
sc->sc_address, ®, 1, valp, sizeof(*valp), 0);
|
|
if (error)
|
|
return error;
|
|
|
|
*valp = be16toh(*valp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
sdtemp_write_16(struct sdtemp_softc *sc, uint8_t reg, uint16_t val)
|
|
{
|
|
uint16_t temp;
|
|
|
|
temp = htobe16(val);
|
|
return iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
|
|
sc->sc_address, ®, 1, &temp, sizeof(temp), 0);
|
|
}
|
|
|
|
static uint32_t
|
|
sdtemp_decode_temp(struct sdtemp_softc *sc, uint16_t temp)
|
|
{
|
|
uint32_t val;
|
|
int32_t stemp;
|
|
|
|
/* Get only the temperature bits */
|
|
temp &= SDTEMP_TEMP_MASK;
|
|
|
|
/* If necessary, extend the sign bit */
|
|
if ((sc->sc_capability & SDTEMP_CAP_WIDER_RANGE) &&
|
|
(temp & SDTEMP_TEMP_NEGATIVE))
|
|
temp |= SDTEMP_TEMP_SIGN_EXT;
|
|
|
|
/* Mask off only bits valid within current resolution */
|
|
temp &= ~(0x7 >> sc->sc_resolution);
|
|
|
|
/* Treat as signed and extend to 32-bits */
|
|
stemp = (int16_t)temp;
|
|
|
|
/* Now convert from 0.0625 (1/16) deg C increments to microKelvins */
|
|
val = (stemp * 62500) + 273150000;
|
|
|
|
return val;
|
|
}
|
|
|
|
static void
|
|
sdtemp_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
|
|
{
|
|
struct sdtemp_softc *sc = sme->sme_cookie;
|
|
uint16_t val;
|
|
int error;
|
|
|
|
iic_acquire_bus(sc->sc_tag, 0);
|
|
error = sdtemp_read_16(sc, SDTEMP_REG_AMBIENT_TEMP, &val);
|
|
iic_release_bus(sc->sc_tag, 0);
|
|
|
|
if (error) {
|
|
edata->state = ENVSYS_SINVALID;
|
|
return;
|
|
}
|
|
|
|
edata->value_cur = sdtemp_decode_temp(sc, val);
|
|
|
|
/* Now check for limits */
|
|
if ((edata->upropset & PROP_DRIVER_LIMITS) == 0)
|
|
edata->state = ENVSYS_SVALID;
|
|
else if ((val & SDTEMP_ABOVE_CRIT) &&
|
|
(edata->upropset & PROP_CRITMAX))
|
|
edata->state = ENVSYS_SCRITOVER;
|
|
else if ((val & SDTEMP_ABOVE_UPPER) &&
|
|
(edata->upropset & PROP_WARNMAX))
|
|
edata->state = ENVSYS_SWARNOVER;
|
|
else if ((val & SDTEMP_BELOW_LOWER) &&
|
|
(edata->upropset & PROP_WARNMIN))
|
|
edata->state = ENVSYS_SWARNUNDER;
|
|
else
|
|
edata->state = ENVSYS_SVALID;
|
|
}
|
|
|
|
/*
|
|
* power management functions
|
|
*
|
|
* We go into "shutdown" mode at suspend time, and return to normal
|
|
* mode upon resume. This reduces power consumption by disabling
|
|
* the A/D converter.
|
|
*/
|
|
|
|
static bool
|
|
sdtemp_pmf_suspend(device_t dev, const pmf_qual_t *qual)
|
|
{
|
|
struct sdtemp_softc *sc = device_private(dev);
|
|
int error;
|
|
uint16_t config;
|
|
|
|
iic_acquire_bus(sc->sc_tag, 0);
|
|
error = sdtemp_read_16(sc, SDTEMP_REG_CONFIG, &config);
|
|
if (error == 0) {
|
|
config |= SDTEMP_CONFIG_SHUTDOWN_MODE;
|
|
error = sdtemp_write_16(sc, SDTEMP_REG_CONFIG, config);
|
|
}
|
|
iic_release_bus(sc->sc_tag, 0);
|
|
return (error == 0);
|
|
}
|
|
|
|
static bool
|
|
sdtemp_pmf_resume(device_t dev, const pmf_qual_t *qual)
|
|
{
|
|
struct sdtemp_softc *sc = device_private(dev);
|
|
int error;
|
|
uint16_t config;
|
|
|
|
iic_acquire_bus(sc->sc_tag, 0);
|
|
error = sdtemp_read_16(sc, SDTEMP_REG_CONFIG, &config);
|
|
if (error == 0) {
|
|
config &= ~SDTEMP_CONFIG_SHUTDOWN_MODE;
|
|
error = sdtemp_write_16(sc, SDTEMP_REG_CONFIG, config);
|
|
}
|
|
iic_release_bus(sc->sc_tag, 0);
|
|
return (error == 0);
|
|
}
|
|
|
|
/* Device dependent config functions */
|
|
|
|
static void
|
|
sdtemp_config_mcp(struct sdtemp_softc *sc)
|
|
{
|
|
int rv;
|
|
uint8_t resolreg;
|
|
|
|
/* Note that MCP9805 has no resolution register */
|
|
switch (sc->sc_devid_masked) {
|
|
case MCP_9804_DEVICE_ID:
|
|
case MCP_98242_DEVICE_ID:
|
|
case MCP_98243_DEVICE_ID:
|
|
resolreg = SDTEMP_REG_MCP_RESOLUTION_9804;
|
|
break;
|
|
case MCP_98244_DEVICE_ID:
|
|
resolreg = SDTEMP_REG_MCP_RESOLUTION_98244;
|
|
break;
|
|
default:
|
|
aprint_error("%s: %s: unknown device ID (%04hx)\n",
|
|
device_xname(sc->sc_dev), __func__, sc->sc_devid_masked);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Set resolution to the max.
|
|
*
|
|
* Even if it fails, the resolution will be the default. It's not a
|
|
* fatal error.
|
|
*/
|
|
rv = sdtemp_write_16(sc, resolreg, SDTEMP_CAP_RESOLUTION_MAX);
|
|
if (rv == 0)
|
|
sc->sc_resolution = SDTEMP_CAP_RESOLUTION_MAX;
|
|
else
|
|
aprint_error("%s: error %d writing resolution register\n",
|
|
device_xname(sc->sc_dev), rv);
|
|
}
|
|
|
|
static void
|
|
sdtemp_config_idt(struct sdtemp_softc *sc)
|
|
{
|
|
int rv;
|
|
|
|
/*
|
|
* Set resolution to the max.
|
|
*
|
|
* Even if it fails, the resolution will be the default. It's not a
|
|
* fatal error.
|
|
*/
|
|
rv = sdtemp_write_16(sc, SDTEMP_REG_IDT_RESOLUTION,
|
|
__SHIFTIN(SDTEMP_CAP_RESOLUTION_MAX, SDTEMP_CAP_RESOLUTION));
|
|
if (rv == 0)
|
|
sc->sc_resolution = SDTEMP_CAP_RESOLUTION_MAX;
|
|
else
|
|
aprint_error("%s: error %d writing resolution register\n",
|
|
device_xname(sc->sc_dev), rv);
|
|
}
|
|
|
|
MODULE(MODULE_CLASS_DRIVER, sdtemp, "i2cexec,sysmon_envsys");
|
|
|
|
#ifdef _MODULE
|
|
#include "ioconf.c"
|
|
#endif
|
|
|
|
static int
|
|
sdtemp_modcmd(modcmd_t cmd, void *opaque)
|
|
{
|
|
int error = 0;
|
|
|
|
switch (cmd) {
|
|
case MODULE_CMD_INIT:
|
|
#ifdef _MODULE
|
|
error = config_init_component(cfdriver_ioconf_sdtemp,
|
|
cfattach_ioconf_sdtemp, cfdata_ioconf_sdtemp);
|
|
#endif
|
|
return error;
|
|
case MODULE_CMD_FINI:
|
|
#ifdef _MODULE
|
|
error = config_fini_component(cfdriver_ioconf_sdtemp,
|
|
cfattach_ioconf_sdtemp, cfdata_ioconf_sdtemp);
|
|
#endif
|
|
return error;
|
|
default:
|
|
return ENOTTY;
|
|
}
|
|
}
|