b2bff5fc7f
keep receive ethernet crc and set M_HASFCS change bus_dma MD fields to keep xfer_len for entire map instead of per segment turn off automatic dma restarts in preparation for changing scsi driver to handle them. add dma debugging routines to keep history of dma states tweak checking for unusual dma limit register
258 lines
9.7 KiB
C
258 lines
9.7 KiB
C
/* $NetBSD: bus_dma.h,v 1.6 2001/04/16 14:12:13 dbj Exp $ */
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/*
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* This file was extracted from from alpha/include/bus.h
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* and should probably be resynced when needed.
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* Darrin B. Jewell <dbj@netbsd.org> Sat Jul 31 06:11:33 UTC 1999
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* original cvs id: NetBSD: bus.h,v 1.29 1999/06/18 04:49:24 cgd Exp
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*/
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/*-
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* Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef _NEXT68K_BUS_DMA_H_
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#define _NEXT68K_BUS_DMA_H_
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/*
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* Bus DMA methods.
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*/
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/*
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* Flags used in various bus DMA methods.
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*/
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#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
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#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
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#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
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#define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
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#define BUS_DMA_STREAMING 0x08 /* hint: sequential, unidirectional */
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#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
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#define BUS_DMA_BUS2 0x20
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#define BUS_DMA_BUS3 0x40
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#define BUS_DMA_BUS4 0x80
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/* Forwards needed by prototypes below. */
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struct mbuf;
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struct uio;
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/*
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* Operations performed by bus_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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typedef struct next68k_bus_dma_tag *bus_dma_tag_t;
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typedef struct next68k_bus_dmamap *bus_dmamap_t;
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/*
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* bus_dma_segment_t
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*
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* Describes a single contiguous DMA transaction. Values
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* are suitable for programming into DMA registers.
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*/
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struct next68k_bus_dma_segment {
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bus_addr_t ds_addr; /* DMA address */
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bus_size_t ds_len; /* length of transfer */
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};
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typedef struct next68k_bus_dma_segment bus_dma_segment_t;
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/*
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* bus_dma_tag_t
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*
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* A machine-dependent opaque type describing the implementation of
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* DMA for a given bus.
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*/
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struct next68k_bus_dma_tag {
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void *_cookie; /* cookie used in the guts */
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/*
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* Some chipsets have a built-in boundary constraint, independent
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* of what the device requests. This allows that boundary to
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* be specified. If the device has a more restrictive contraint,
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* the map will use that, otherwise this boundary will be used.
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* This value is ignored if 0.
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*/
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bus_size_t _boundary;
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/*
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* DMA mapping methods.
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*/
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int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *));
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void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
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int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int));
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int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int));
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int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int));
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int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int));
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void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
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void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
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bus_addr_t, bus_size_t, int));
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/*
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* DMA memory utility functions.
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*/
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int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
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bus_size_t, bus_dma_segment_t *, int, int *, int));
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void (*_dmamem_free) __P((bus_dma_tag_t,
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bus_dma_segment_t *, int));
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int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, caddr_t *, int));
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void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
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paddr_t (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
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int, off_t, int, int));
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};
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#define bus_dmamap_create(t, s, n, m, b, f, p) \
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(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
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#define bus_dmamap_destroy(t, p) \
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(*(t)->_dmamap_destroy)((t), (p))
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#define bus_dmamap_load(t, m, b, s, p, f) \
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(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
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#define bus_dmamap_load_mbuf(t, m, b, f) \
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(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
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#define bus_dmamap_load_uio(t, m, u, f) \
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(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
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#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
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(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
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#define bus_dmamap_unload(t, p) \
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(*(t)->_dmamap_unload)((t), (p))
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#define bus_dmamap_sync(t, p, o, l, ops) \
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(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
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#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
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(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
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#define bus_dmamem_free(t, sg, n) \
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(*(t)->_dmamem_free)((t), (sg), (n))
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#define bus_dmamem_map(t, sg, n, s, k, f) \
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(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
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#define bus_dmamem_unmap(t, k, s) \
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(*(t)->_dmamem_unmap)((t), (k), (s))
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#define bus_dmamem_mmap(t, sg, n, o, p, f) \
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(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
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/*
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* bus_dmamap_t
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*
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* Describes a DMA mapping.
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*/
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struct next68k_bus_dmamap {
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/*
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* PRIVATE MEMBERS: not for use by machine-independent code.
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*/
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bus_size_t _dm_size; /* largest DMA transfer mappable */
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int _dm_segcnt; /* number of segs this map can map */
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bus_size_t _dm_maxsegsz; /* largest possible segment */
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bus_size_t _dm_boundary; /* don't cross this */
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int _dm_flags; /* misc. flags */
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/*
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* PUBLIC MEMBERS: these are used by machine-independent code.
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*/
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bus_size_t dm_mapsize; /* size of the mapping */
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int dm_nsegs; /* # valid segments in mapping */
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bus_dma_segment_t dm_segs[1]; /* segments; variable length */
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/* Machine dependant fields: */
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bus_size_t dm_xfer_len; /* length of successful transfer */
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};
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#ifdef _NEXT68K_BUS_DMA_PRIVATE
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int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
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bus_size_t, int, bus_dmamap_t *));
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void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
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int _bus_dmamap_load_direct __P((bus_dma_tag_t, bus_dmamap_t,
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void *, bus_size_t, struct proc *, int));
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int _bus_dmamap_load_mbuf_direct __P((bus_dma_tag_t,
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bus_dmamap_t, struct mbuf *, int));
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int _bus_dmamap_load_uio_direct __P((bus_dma_tag_t,
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bus_dmamap_t, struct uio *, int));
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int _bus_dmamap_load_raw_direct __P((bus_dma_tag_t,
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bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int));
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void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
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void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
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bus_size_t, int));
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int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
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bus_size_t alignment, bus_size_t boundary,
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bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
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void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs));
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int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs, size_t size, caddr_t *kvap, int flags));
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void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
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size_t size));
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paddr_t _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs, off_t off, int prot, int flags));
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#endif /* _NEXT68K_BUS_DMA_PRIVATE */
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#endif /* _NEXT68K_BUS_DMA_H_ */
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