449 lines
16 KiB
C
449 lines
16 KiB
C
/* $NetBSD: bus.h,v 1.3 1997/12/01 07:11:34 sakamoto Exp $ */
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/* $OpenBSD: bus.h,v 1.1 1997/10/13 10:53:42 pefo Exp $ */
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/*
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Jason R. Thorpe. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997 Per Fogelstrom. All rights reserved.
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* Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _BEBOX_BUS_H_
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#define _BEBOX_BUS_H_
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#include <machine/pio.h>
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/*
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* Values for the Be bus space tag, not to be used directly by MI code.
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*/
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#define BEBOX_BUS_SPACE_IO 0x80000000 /* space is i/o space */
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#define BEBOX_BUS_SPACE_MEM 0xC0000000 /* space is mem space */
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#define BEBOX_BUS_REVERSE 1
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/*
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* Bus access types.
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*/
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typedef u_int32_t bus_addr_t;
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typedef u_int32_t bus_size_t;
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typedef u_int32_t bus_space_handle_t;
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typedef struct bebox_bus_space *bus_space_tag_t;
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struct bebox_bus_space {
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u_int32_t bus_base;
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u_int8_t bus_reverse; /* Reverse bytes */
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};
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extern struct bebox_bus_space bebox_bus_io, bebox_bus_mem;
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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#ifdef __STDC__
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#define CAT(a,b) a##b
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#define CAT3(a,b,c) a##b##c
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#else
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#define CAT(a,b) a/**/b
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#define CAT3(a,b,c) a/**/b/**/c
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#endif
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/*
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* Access methods for bus resources
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*/
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#define bus_space_map(t, addr, size, cacheable, bshp) \
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((*(bshp) = (t)->bus_base + (addr)), 0)
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#define bus_space_unmap(t, bsh, size)
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#define bus_space_subregion(t, addr, size, cacheable, bshp) \
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((*(bshp) = (t)->bus_base + (addr)), 0)
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#define bus_space_read(n,m) \
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static __inline CAT3(u_int,m,_t) \
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CAT(bus_space_read_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
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bus_addr_t ba) \
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{ \
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if(bst->bus_reverse) \
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return CAT3(in,m,rb)((volatile CAT3(u_int,m,_t) *)(bsh + (ba))); \
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else \
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return CAT(in,m)((volatile CAT3(u_int,m,_t) *)(bsh + (ba))); \
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}
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bus_space_read(1,8)
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bus_space_read(2,16)
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bus_space_read(4,32)
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#define bus_space_read_8 !!! bus_space_read_8 unimplemented !!!
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#define bus_space_read_multi_1(t, h, o, a, c) do { \
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insb((u_int8_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_read_multi_2(t, h, o, a, c) do { \
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insw((u_int16_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_read_multi_4(t, h, o, a, c) do { \
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insl((u_int32_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_read_multi_8 !!! bus_space_read_multi_8 not implemented !!!
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#define bus_space_write(n,m) \
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static __inline void \
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CAT(bus_space_write_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
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bus_addr_t ba, CAT3(u_int,m,_t) x) \
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{ \
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if(bst->bus_reverse) \
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CAT3(out,m,rb)((volatile CAT3(u_int,m,_t) *)(bsh + (ba)), x); \
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else \
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CAT(out,m)((volatile CAT3(u_int,m,_t) *)(bsh + (ba)), x); \
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}
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bus_space_write(1,8)
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bus_space_write(2,16)
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bus_space_write(4,32)
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#define bus_space_write_8 !!! bus_space_write_8 unimplemented !!!
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#define bus_space_write_multi_1(t, h, o, a, c) do { \
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outsb((u_int8_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_write_multi_2(t, h, o, a, c) do { \
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outsw((u_int16_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_write_multi_4(t, h, o, a, c) do { \
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outsl((u_int32_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_write_multi_8 !!! bus_space_write_multi_8 not implemented !!!
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/*
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* void bus_space_read_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* u_intN_t *addr, size_t count));
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*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle and starting at `offset' and copy into
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* buffer provided.
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*/
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#if 0 /* Cause a link error for bus_space_read_region_8 */
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#define bus_space_read_region_1(t, h, o, a, c) do { \
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} while (0)
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#define bus_space_read_region_2(t, h, o, a, c) do { \
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} while (0)
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#define bus_space_read_region_4(t, h, o, a, c) do { \
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} while (0)
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#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
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#endif
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/*
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* void bus_space_write_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* const u_intN_t *addr, size_t count));
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*
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* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
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* to bus space described by tag/handle starting at `offset'.
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*/
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#if 0 /* Cause a link error for bus_space_write_region_8 */
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#define bus_space_write_region_1(t, h, o, a, c) do { \
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} while (0)
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#define bus_space_write_region_2(t, h, o, a, c) do { \
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} while (0)
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#define bus_space_write_region_4(t, h, o, a, c) do { \
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} while (0)
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#define bus_space_write_region_8 \
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!!! bus_space_write_region_8 unimplemented !!!
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#endif
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/*
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* void bus_space_set_multi_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
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* size_t count));
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*
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* Write the 1, 2, 4, or 8 byte value `val' to bus space described
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* by tag/handle/offset `count' times.
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*/
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/* XXX IMPLEMENT bus_space_set_multi_N() XXX */
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/*
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* void bus_space_set_region_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
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* size_t count));
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*
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* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
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* by tag/handle starting at `offset'.
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*/
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/* XXX IMPLEMENT bus_space_set_region_N() XXX */
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/*
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* void bus_space_copy_N __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh1, bus_size_t off1,
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* bus_space_handle_t bsh2, bus_size_t off2,
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* size_t count));
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*
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* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
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* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
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*/
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/* XXX IMPLEMENT bus_space_copy_N() XXX */
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/*
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* Bus read/write barrier methods.
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*
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* void bus_space_barrier __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* bus_size_t len, int flags));
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*
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* Note: the i386 does not currently require barriers, but we must
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* provide the flags to MI code.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
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#define BUS_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_BARRIER_WRITE 0x02 /* force write barrier */
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/*
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* Bus DMA methods.
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*/
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/*
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* Flags used in various bus DMA methods.
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*/
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#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
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#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
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#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
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#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
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#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
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#define BUS_DMA_BUS2 0x20
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#define BUS_DMA_BUS3 0x40
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#define BUS_DMA_BUS4 0x80
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/* Forwards needed by prototypes below. */
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struct mbuf;
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struct uio;
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/*
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* bus_dmasync_op_t
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*
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* Operations performed by bus_dmamap_sync().
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*/
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typedef enum {
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BUS_DMASYNC_PREREAD,
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BUS_DMASYNC_POSTREAD,
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BUS_DMASYNC_PREWRITE,
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BUS_DMASYNC_POSTWRITE,
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} bus_dmasync_op_t;
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typedef struct bebox_bus_dma_tag *bus_dma_tag_t;
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typedef struct bebox_bus_dmamap *bus_dmamap_t;
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/*
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* bus_dma_segment_t
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*
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* Describes a single contiguous DMA transaction. Values
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* are suitable for programming into DMA registers.
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*/
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struct bebox_bus_dma_segment {
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bus_addr_t ds_addr; /* DMA address */
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bus_size_t ds_len; /* length of transfer */
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};
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typedef struct bebox_bus_dma_segment bus_dma_segment_t;
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/*
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* bus_dma_tag_t
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*
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* A machine-dependent opaque type describing the implementation of
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* DMA for a given bus.
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*/
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struct bebox_bus_dma_tag {
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void *_cookie; /* cookie used in the guts */
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/*
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* DMA mapping methods.
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*/
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int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *));
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void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
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int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int));
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int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int));
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int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int));
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int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int));
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void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
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void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dmasync_op_t));
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/*
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* DMA memory utility functions.
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*/
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int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
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bus_size_t, bus_dma_segment_t *, int, int *, int));
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void (*_dmamem_free) __P((bus_dma_tag_t,
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bus_dma_segment_t *, int));
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int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, caddr_t *, int));
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void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
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int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
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int, int, int, int));
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};
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#define bus_dmamap_create(t, s, n, m, b, f, p) \
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(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
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#define bus_dmamap_destroy(t, p) \
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(*(t)->_dmamap_destroy)((t), (p))
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#define bus_dmamap_load(t, m, b, s, p, f) \
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(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
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#define bus_dmamap_load_mbuf(t, m, b, f) \
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(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
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#define bus_dmamap_load_uio(t, m, u, f) \
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(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
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#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
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(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
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#define bus_dmamap_unload(t, p) \
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(*(t)->_dmamap_unload)((t), (p))
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#define bus_dmamap_sync(t, p, o) \
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(void)((t)->_dmamap_sync ? \
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(*(t)->_dmamap_sync)((t), (p), (o)) : (void)0)
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#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
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(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
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#define bus_dmamem_free(t, sg, n) \
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(*(t)->_dmamem_free)((t), (sg), (n))
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#define bus_dmamem_map(t, sg, n, s, k, f) \
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(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
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#define bus_dmamem_unmap(t, k, s) \
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(*(t)->_dmamem_unmap)((t), (k), (s))
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#define bus_dmamem_mmap(t, sg, n, o, p, f) \
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(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
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/*
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* bus_dmamap_t
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*
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* Describes a DMA mapping.
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*/
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struct bebox_bus_dmamap {
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/*
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* PRIVATE MEMBERS: not for use my machine-independent code.
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*/
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bus_size_t _dm_size; /* largest DMA transfer mappable */
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int _dm_segcnt; /* number of segs this map can map */
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bus_size_t _dm_maxsegsz; /* largest possible segment */
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bus_size_t _dm_boundary; /* don't cross this */
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int _dm_flags; /* misc. flags */
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void *_dm_cookie; /* cookie for bus-specific functions */
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/*
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* PUBLIC MEMBERS: these are used by machine-independent code.
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*/
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int dm_nsegs; /* # valid segments in mapping */
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bus_dma_segment_t dm_segs[1]; /* segments; variable length */
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};
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#ifdef _BEBOX_BUS_DMA_PRIVATE
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int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
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bus_size_t, int, bus_dmamap_t *));
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void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
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int _bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int));
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int _bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int));
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int _bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int));
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int _bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int));
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void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
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void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t));
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int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
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bus_size_t alignment, bus_size_t boundary,
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bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
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void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs));
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int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs, size_t size, caddr_t *kvap, int flags));
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void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
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size_t size));
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int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs, int off, int prot, int flags));
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int _bus_dmamem_alloc_range __P((bus_dma_tag_t tag, bus_size_t size,
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bus_size_t alignment, bus_size_t boundary,
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bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
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vm_offset_t low, vm_offset_t high));
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#endif /* _BEBOX_BUS_DMA_PRIVATE */
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#endif /* _BEBOX_BUS_H_ */
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