162 lines
4.6 KiB
C
162 lines
4.6 KiB
C
/* $NetBSD: cpus.h,v 1.5 1997/10/14 09:20:08 mark Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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* Copyright (c) 1995 Brini.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* cpus.h
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*
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* cpu device header file
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*
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* Created : 26/12/95
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*/
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#ifndef _LOCORE
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#include <sys/param.h>
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#endif
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/* If hydra is defined then we take into consideration the slave CPU's available */
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#ifdef HYDRA
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#define MAX_CPUS 6
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#define MAX_SLAVE_CPUS 4
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#define MAX_FOREIGN_CPUS 1
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#else
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#define MAX_CPUS 2
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#define MAX_SLAVE_CPUS 0
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#define MAX_FOREIGN_CPUS 1
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#endif
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#define CPU_MASTER 0
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#define CPU_486 1
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#define CPU_SLAVE 2
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#define CPU_CLASS_NONE 0 /* No CPU */
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#define CPU_CLASS_ARM 1 /* ARM 6/7/8 */
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#define CPU_CLASS_SARM 2 /* Guess */
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#define CPU_CLASS_I486 3 /* 486/586 */
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#define CPU_HOST_NONE 0 /* No host */
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#define CPU_HOST_MAINBUS 1 /* Hosted via motherboard */
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#define CPU_HOST_HYDRA 2 /* Hosted via hydra multiprocessor board */
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#define CPU_FLAG_PRESENT 0x01
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#define CPU_FLAG_HALTED 0x02
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#define FPU_CLASS_NONE 0 /* no Floating point support */
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#define FPU_CLASS_FPE 1 /* Floating point emulator installed */
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#define FPU_CLASS_FPA 2 /* Floating point accelerator installed */
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#define FPU_CLASS_FPU 3 /* Floating point unit installed */
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#define FPU_TYPE_SP_FPE 1 /* Single precision FPE */
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#define FPU_TYPE_ARMLTD_FPE 2 /* ARM Ltd FPE */
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#define FPU_TYPE_FPA11 0x81 /* ID of FPA11 */
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#ifndef _LOCORE
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/* Define the structure used to describe a cpu */
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typedef struct cpu_arm {
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u_int cpu_id; /* The CPU id */
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u_int cpu_ctrl; /* The CPU control register */
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u_int cpu_svc_r13; /* local data */
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u_int cpu_und_r13; /* local data */
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u_int cpu_abt_r13; /* local data */
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u_int cpu_irq_r13; /* local data */
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} cpu_arm_t;
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typedef struct cpu_sarm {
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u_int cpu_id; /* The CPU id */
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u_int cpu_ctrl; /* The CPU control register */
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} cpu_sarm_t;
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typedef struct cpu_i486 {
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u_int cpu_id; /* The CPU id */
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u_int cpu_ctrl; /* The CPU control register */
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} cpu_i486_t;
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typedef struct _cpu {
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/* These are generic CPU variables */
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u_int cpu_class; /* The CPU class */
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u_int cpu_type; /* The CPU type */
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u_int cpu_host; /* The CPU host interface */
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u_int cpu_flags; /* The CPU flags */
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char cpu_model[256]; /* Text description of CPU */
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/* These are generic FPU variables */
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u_int fpu_class; /* The FPU class */
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u_int fpu_type; /* The FPU type */
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u_int fpu_flags; /* The FPU flags */
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char fpu_model[256]; /* Text description of FPU */
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/* These are ARM specific variables */
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u_int cpu_id; /* The CPU id */
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u_int cpu_ctrl; /* The CPU control register */
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u_int cpu_svc_r13; /* local data */
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u_int cpu_und_r13; /* local data */
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u_int cpu_abt_r13; /* local data */
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u_int cpu_irq_r13; /* local data */
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/* Not used yet */
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union {
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cpu_arm_t cpu_arm;
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cpu_sarm_t cpu_sarm;
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cpu_i486_t cpu_i486;
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} cpu_local;
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void *cpu_cd; /* CPU dependant data */
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} cpu_t;
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struct cpu_softc {
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struct device sc_device;
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int sc_open;
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};
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#ifdef _KERNEL
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/* Array of cpu structures, one per possible cpu */
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extern cpu_t cpus[MAX_CPUS];
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#endif /* _KERNEL */
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#endif /* _LOCORE */
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/* End of hydra.h */
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