101 lines
4.1 KiB
C
101 lines
4.1 KiB
C
/* $NetBSD: memeccreg.h,v 1.1 1998/09/18 20:18:10 pk Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ECC memory control.
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*/
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/* Register offsets */
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#define ECC_EN_REG 0
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#define ECC_FSR_REG 8
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#define ECC_AFR0_REG 16
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#define ECC_AFR1_REG 20
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#define ECC_DIAG_REG 24
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/* ECC Memory Enable register */
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#define ECC_EN_EE 0x00000001 /* Enable ECC checking */
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#define ECC_EN_EI 0x00000002 /* Interrupt on correctable error */
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#define ECC_EN_VER 0x0f000000 /* Version */
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#define ECC_EN_IMPL 0xf0000000 /* Implementation Id */
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/* ECC Memory Fault Status register */
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#define ECC_FSR_CE 0x00000001 /* Correctable error */
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#define ECC_FSR_TO 0x00000004 /* Timeout on write */
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#define ECC_FSR_UE 0x00000008 /* Uncorrectable error */
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#define ECC_FSR_DW 0x000000f0 /* Index of double word in block */
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#define ECC_FSR_SYND 0x0000ff00 /* Syndrome for correctable error */
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#define ECC_FSR_ME 0x00010000 /* Multiple errors */
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#define ECC_FSR_BITS "\177\020" \
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"b\0CE\0b\2TO\0b\3UE\0" \
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"f\4\4DW\0f\10\10SYNDROME\0b\20ME\0"
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/*
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* ECC Memory Fault Address registers
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* There are two of these. The first has bits 32-35 of the faulting
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* physical address and assorted MBus bits. The second has bits
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* 0-31 of the faulting physical address.
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*/
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#define ECC_AFR_PAH 0x0000000f /* PA[31-35] */
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#define ECC_AFR_TYPE 0x000000f0 /* Transaction type */
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#define ECC_AFR_SIZE 0x00000700 /* Transaction size */
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#define ECC_AFR_C 0x00000800 /* Mapped cacheable */
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#define ECC_AFR_LOCK 0x00001000 /* Error occurred in atomic cycle */
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#define ECC_AFR_MBL 0x00002000 /* Boot mode */
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#define ECC_AFR_VA 0x003fc000 /* VA[12-19] (superset bits) */
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#define ECC_AFR_S 0x08000000 /* Access was in supervisor mode */
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#define ECC_AFR_MID 0xf0000000 /* Module code */
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#define ECC_AFR_BITS "\177\020" \
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"f\0\4VAH\0f\4\4TYPE\0f\10\3SIZE\0" \
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"b\13C\0b\14LOCK\0b\15MBL\0" \
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"f\16\10VA\0b\33S\0f\34\4MID\0"
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/* ECC Diagnostic register */
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#define ECC_DR_CBX 0x00000001
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#define ECC_DR_CB0 0x00000002
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#define ECC_DR_CB1 0x00000004
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#define ECC_DR_CB2 0x00000008
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#define ECC_DR_CB4 0x00000010
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#define ECC_DR_CB8 0x00000020
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#define ECC_DR_CB16 0x00000040
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#define ECC_DR_CB32 0x00000080
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#define ECC_DR_DMODE 0x00000c00
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#define ECC_DR_BITS "\177\020" \
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"f\12\2DMODE\0=\0NORMAL\0=\1GEN\0=\2DETECT\0" \
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"f\0\8CHECK BITS\0"
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