361 lines
9.4 KiB
C
361 lines
9.4 KiB
C
/* $NetBSD: motoi2c.c,v 1.4 2011/04/17 15:14:59 phx Exp $ */
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/*-
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* Copyright (c) 2007, 2010 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Matt Thomas.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: motoi2c.c,v 1.4 2011/04/17 15:14:59 phx Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <sys/intr.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/motoi2creg.h>
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#include <dev/i2c/motoi2cvar.h>
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#ifdef DEBUG
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int motoi2c_debug = 0;
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#define DPRINTF(x) if (motoi2c_debug) printf x
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#else
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#define DPRINTF(x)
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#endif
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static int motoi2c_acquire_bus(void *, int);
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static void motoi2c_release_bus(void *, int);
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static int motoi2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
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void *, size_t, int);
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static int motoi2c_busy_wait(struct motoi2c_softc *, uint8_t);
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static const struct i2c_controller motoi2c = {
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.ic_acquire_bus = motoi2c_acquire_bus,
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.ic_release_bus = motoi2c_release_bus,
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.ic_exec = motoi2c_exec,
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};
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static const struct motoi2c_settings motoi2c_default_settings = {
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.i2c_adr = MOTOI2C_ADR_DEFAULT,
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.i2c_fdr = MOTOI2C_FDR_DEFAULT,
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.i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT,
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};
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#define I2C_READ(r) ((*sc->sc_iord)(sc, (r)))
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#define I2C_WRITE(r,v) ((*sc->sc_iowr)(sc, (r), (v)))
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#define I2C_SETCLR(r, s, c) \
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((*sc->sc_iowr)(sc, (r), ((*sc->sc_iord)(sc, (r)) | (s)) & ~(c)))
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static uint8_t
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motoi2c_iord1(struct motoi2c_softc *sc, bus_size_t off)
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{
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return bus_space_read_1(sc->sc_iot, sc->sc_ioh, off);
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}
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static void
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motoi2c_iowr1(struct motoi2c_softc *sc, bus_size_t off, uint8_t data)
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{
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, data);
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}
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void
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motoi2c_attach_common(device_t self, struct motoi2c_softc *sc,
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const struct motoi2c_settings *i2c)
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{
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struct i2cbus_attach_args iba;
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mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
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if (i2c == NULL)
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i2c = &motoi2c_default_settings;
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sc->sc_i2c = motoi2c;
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sc->sc_i2c.ic_cookie = sc;
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if (sc->sc_iord == NULL)
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sc->sc_iord = motoi2c_iord1;
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if (sc->sc_iowr == NULL)
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sc->sc_iowr = motoi2c_iowr1;
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memset(&iba, 0, sizeof(iba));
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iba.iba_tag = &sc->sc_i2c;
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I2C_WRITE(I2CCR, 0); /* reset before changing anything */
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I2C_WRITE(I2CDFSRR, i2c->i2c_dfsrr); /* sampling units */
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I2C_WRITE(I2CFDR, i2c->i2c_fdr); /* divider 3072 (0x31) */
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I2C_WRITE(I2CADR, i2c->i2c_adr); /* our slave address is 0x7f */
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I2C_WRITE(I2CSR, 0); /* clear status flags */
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config_found_ia(self, "i2cbus", &iba, iicbus_print);
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}
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static int
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motoi2c_acquire_bus(void *v, int flags)
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{
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struct motoi2c_softc * const sc = v;
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mutex_enter(&sc->sc_buslock);
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I2C_WRITE(I2CCR, CR_MEN); /* enable the I2C module */
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return 0;
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}
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static void
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motoi2c_release_bus(void *v, int flags)
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{
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struct motoi2c_softc * const sc = v;
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I2C_WRITE(I2CCR, 0); /* reset before changing anything */
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mutex_exit(&sc->sc_buslock);
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}
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/* busy waiting for byte data transfer completion */
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static int
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motoi2c_busy_wait(struct motoi2c_softc *sc, uint8_t cr)
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{
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uint8_t sr;
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u_int timo;
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int error = 0;
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timo = 1000;
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while (((sr = I2C_READ(I2CSR)) & SR_MIF) == 0 && --timo)
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DELAY(10);
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if (timo == 0) {
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DPRINTF(("%s: timeout (sr=%#x, cr=%#x)\n",
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__func__, sr, I2C_READ(I2CCR)));
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error = ETIMEDOUT;
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}
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/*
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* RXAK is only valid when transmitting.
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*/
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if ((cr & CR_MTX) && (sr & SR_RXAK)) {
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DPRINTF(("%s: missing rx ack (%#x): spin=%u\n",
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__func__, sr, 1000 - timo));
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error = EIO;
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}
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I2C_WRITE(I2CSR, 0);
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return error;
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}
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int
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motoi2c_intr(void *v)
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{
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struct motoi2c_softc * const sc = v;
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panic("%s(%p)", __func__, sc);
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return 0;
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}
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int
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motoi2c_exec(void *v, i2c_op_t op, i2c_addr_t addr,
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const void *cmdbuf, size_t cmdlen,
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void *databuf, size_t datalen,
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int flags)
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{
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struct motoi2c_softc * const sc = v;
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uint8_t sr;
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uint8_t cr;
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int error;
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sr = I2C_READ(I2CSR);
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cr = I2C_READ(I2CCR);
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#if 0
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DPRINTF(("%s(%#x,%#x,%p,%zu,%p,%zu,%#x): sr=%#x cr=%#x\n",
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__func__, op, addr, cmdbuf, cmdlen, databuf, datalen, flags,
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sr, cr));
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#endif
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if ((cr & CR_MSTA) == 0 && (sr & SR_MBB) != 0) {
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/* wait for bus becoming available */
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u_int timo = 100;
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do {
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DELAY(10);
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} while (--timo > 0 && ((sr = I2C_READ(I2CSR)) & SR_MBB) != 0);
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if (timo == 0) {
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DPRINTF(("%s: bus is busy (%#x)\n", __func__, sr));
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return ETIMEDOUT;
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}
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}
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/* reset interrupt and arbitration-lost flags (all others are RO) */
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I2C_WRITE(I2CSR, 0);
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sr = I2C_READ(I2CSR);
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/*
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* Generate start (or restart) condition
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*/
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/* CR_RTSA is write-only and transitory */
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uint8_t rsta = (cr & CR_MSTA ? CR_RSTA : 0);
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cr = CR_MEN | CR_MTX | CR_MSTA;
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I2C_WRITE(I2CCR, cr | rsta);
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DPRINTF(("%s: started: sr=%#x cr=%#x/%#x\n",
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__func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR)));
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sr = I2C_READ(I2CSR);
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if (sr & SR_MAL) {
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DPRINTF(("%s: lost bus: sr=%#x cr=%#x/%#x\n",
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__func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR)));
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I2C_WRITE(I2CCR, 0);
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DELAY(10);
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I2C_WRITE(I2CCR, CR_MEN | CR_MTX | CR_MSTA);
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DELAY(10);
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sr = I2C_READ(I2CSR);
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if (sr & SR_MAL) {
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error = EBUSY;
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goto out;
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}
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DPRINTF(("%s: reacquired bus: sr=%#x cr=%#x/%#x\n",
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__func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR)));
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}
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/* send target address and transfer direction */
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uint8_t addr_byte = (addr << 1)
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| (cmdlen == 0 && I2C_OP_READ_P(op) ? 1 : 0);
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I2C_WRITE(I2CDR, addr_byte);
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error = motoi2c_busy_wait(sc, cr);
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if (error) {
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DPRINTF(("%s: error sending address: %d\n", __func__, error));
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if (error == EIO)
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error = ENXIO;
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goto out;
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}
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const uint8_t *cmdptr = cmdbuf;
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for (size_t i = 0; i < cmdlen; i++) {
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I2C_WRITE(I2CDR, *cmdptr++);
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error = motoi2c_busy_wait(sc, cr);
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if (error) {
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DPRINTF(("%s: error sending cmd byte %zu (cr=%#x/%#x):"
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" %d\n", __func__, i, I2C_READ(I2CCR), cr, error));
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goto out;
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}
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}
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if (cmdlen > 0 && I2C_OP_READ_P(op)) {
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KASSERT(cr & CR_MTX);
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KASSERT((cr & CR_TXAK) == 0);
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I2C_WRITE(I2CCR, cr | CR_RSTA);
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#if 0
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DPRINTF(("%s: restarted(read): sr=%#x cr=%#x(%#x)\n",
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__func__, I2C_READ(I2CSR), cr | CR_RSTA, I2C_READ(I2CCR)));
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#endif
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/* send target address and read transfer direction */
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addr_byte |= 1;
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I2C_WRITE(I2CDR, addr_byte);
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error = motoi2c_busy_wait(sc, cr);
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if (error) {
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if (error == EIO)
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error = ENXIO;
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goto out;
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}
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}
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if (I2C_OP_READ_P(op)) {
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uint8_t *dataptr = databuf;
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cr &= ~CR_MTX; /* clear transmit flags */
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if (datalen <= 1)
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cr |= CR_TXAK;
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I2C_WRITE(I2CCR, cr);
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DELAY(10);
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(void)I2C_READ(I2CDR); /* dummy read */
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for (size_t i = 0; i < datalen; i++) {
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/*
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* If a master receiver wants to terminate a data
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* transfer, it must inform the slave transmitter by
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* not acknowledging the last byte of data (by setting
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* the transmit acknowledge bit (I2CCR[TXAK])) before
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* reading the next-to-last byte of data.
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*/
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error = motoi2c_busy_wait(sc, cr);
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if (error) {
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DPRINTF(("%s: error reading byte %zu: %d\n",
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__func__, i, error));
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goto out;
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}
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if (i == datalen - 2) {
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cr |= CR_TXAK;
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I2C_WRITE(I2CCR, cr);
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} else if (i == datalen - 1 && I2C_OP_STOP_P(op)) {
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cr = CR_MEN;
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I2C_WRITE(I2CCR, cr);
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}
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*dataptr++ = I2C_READ(I2CDR);
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}
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if (datalen == 0) {
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if (I2C_OP_STOP_P(op)) {
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cr = CR_MEN;
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I2C_WRITE(I2CCR, cr);
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}
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(void)I2C_READ(I2CDR); /* dummy read */
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error = motoi2c_busy_wait(sc, cr);
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if (error) {
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DPRINTF(("%s: error reading dummy last byte:"
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"%d\n", __func__, error));
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goto out;
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}
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}
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} else {
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const uint8_t *dataptr = databuf;
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for (size_t i = 0; i < datalen; i++) {
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I2C_WRITE(I2CDR, *dataptr++);
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error = motoi2c_busy_wait(sc, cr);
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if (error) {
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DPRINTF(("%s: error sending data byte %zu:"
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" %d\n", __func__, i, error));
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goto out;
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}
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}
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}
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out:
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/*
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* If we encountered an error condition or caller wants a STOP,
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* send a STOP.
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*/
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if (error || (cr & CR_TXAK) || ((cr & CR_MSTA) && I2C_OP_STOP_P(op))) {
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cr = CR_MEN;
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I2C_WRITE(I2CCR, cr);
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DPRINTF(("%s: stopping: cr=%#x/%#x\n", __func__,
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cr, I2C_READ(I2CCR)));
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}
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DPRINTF(("%s: exit sr=%#x cr=%#x: %d\n", __func__,
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I2C_READ(I2CSR), I2C_READ(I2CCR), error));
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return error;
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}
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