308 lines
9.1 KiB
C
308 lines
9.1 KiB
C
/* $NetBSD: siisata_pci.c,v 1.2 2008/12/16 02:46:47 jakllsch Exp $ */
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/* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp */
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/*
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* Copyright (c) 2006 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/*-
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* Copyright (c) 2007, 2008 Jonathan A. Kollasch.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/malloc.h>
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <uvm/uvm_extern.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/siisatavar.h>
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struct siisata_pci_softc {
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struct siisata_softc si_sc;
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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};
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static int siisata_pci_match(device_t, cfdata_t, void *);
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static void siisata_pci_attach(device_t, device_t, void *);
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static bool siisata_pci_resume(device_t PMF_FN_PROTO);
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static const struct siisata_pci_product {
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pci_vendor_id_t spp_vendor;
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pci_product_id_t spp_product;
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int spp_ports;
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int spp_chip;
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} siisata_pci_products[] = {
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{
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PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124,
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4, 3124
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},
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{
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PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3132,
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2, 3132
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},
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{
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PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3531,
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1, 3531
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},
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{
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0, 0,
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0, 0
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},
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};
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CFATTACH_DECL_NEW(siisata_pci, sizeof(struct siisata_pci_softc),
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siisata_pci_match, siisata_pci_attach, NULL, NULL);
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static const struct siisata_pci_product *
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siisata_pci_lookup(const struct pci_attach_args * pa)
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{
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const struct siisata_pci_product *spp;
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for (spp = siisata_pci_products; spp->spp_ports > 0; spp++) {
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if (PCI_VENDOR(pa->pa_id) == spp->spp_vendor &&
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PCI_PRODUCT(pa->pa_id) == spp->spp_product)
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return spp;
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}
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return NULL;
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}
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static int
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siisata_pci_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (siisata_pci_lookup(pa) != NULL)
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return 3;
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return 0;
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}
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static bool
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siisata_pci_resume(device_t dv PMF_FN_ARGS)
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{
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struct siisata_pci_softc *psc = device_private(dv);
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struct siisata_softc *sc = &psc->si_sc;
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int s;
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s = splbio();
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siisata_resume(sc);
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splx(s);
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return true;
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}
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static void
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siisata_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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struct siisata_pci_softc *psc = device_private(self);
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struct siisata_softc *sc = &psc->si_sc;
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char devinfo[256];
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const char *intrstr;
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pci_intr_handle_t intrhandle;
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pcireg_t csr, memtype;
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const struct siisata_pci_product *spp;
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void *ih;
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bus_space_tag_t memt;
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bus_space_handle_t memh;
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uint32_t gcreg;
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int memh_valid;
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bus_size_t grsize, prsize;
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sc->sc_atac.atac_dev = self;
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psc->sc_pc = pa->pa_pc;
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psc->sc_pcitag = pa->pa_tag;
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pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo, sizeof(devinfo));
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aprint_naive(": SATA-II HBA\n");
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aprint_normal(": %s\n", devinfo);
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/* map bar0 */
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#if 1
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR0);
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#else
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memtype = PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT;
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#endif
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switch (memtype) {
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case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
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memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR0,
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memtype, 0, &memt, &memh, NULL, &grsize) == 0);
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break;
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default:
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memh_valid = 0;
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}
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if (memh_valid) {
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sc->sc_grt = memt;
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sc->sc_grh = memh;
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} else {
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aprint_error("%s: unable to map device global registers\n",
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SIISATANAME(sc));
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return;
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}
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/* map bar1 */
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#if 1
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR1);
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#else
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memtype = PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT;
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#endif
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switch (memtype) {
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case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
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memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR1,
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memtype, 0, &memt, &memh, NULL, &prsize) == 0);
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break;
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default:
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memh_valid = 0;
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}
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if (memh_valid) {
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sc->sc_prt = memt;
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sc->sc_prh = memh;
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} else {
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bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
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aprint_error("%s: unable to map device port registers\n",
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SIISATANAME(sc));
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return;
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}
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if (pci_dma64_available(pa)) {
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sc->sc_dmat = pa->pa_dmat64;
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sc->sc_have_dma64 = 1;
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aprint_debug("64-bit PCI DMA available\n");
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} else {
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sc->sc_dmat = pa->pa_dmat;
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sc->sc_have_dma64 = 0;
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}
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/* map interrupt */
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if (pci_intr_map(pa, &intrhandle) != 0) {
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bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
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bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize);
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aprint_error("%s: couldn't map interrupt\n", SIISATANAME(sc));
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, intrhandle);
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ih = pci_intr_establish(pa->pa_pc, intrhandle,
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IPL_BIO, siisata_intr, sc);
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if (ih == NULL) {
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bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
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bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize);
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aprint_error("%s: couldn't establish interrupt"
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"at %s\n", SIISATANAME(sc), intrstr);
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return;
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}
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aprint_normal("%s: interrupting at %s\n", SIISATANAME(sc),
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intrstr ? intrstr : "unknown interrupt");
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/* fill in number of ports on this device */
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spp = siisata_pci_lookup(pa);
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if (spp != NULL) {
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sc->sc_atac.atac_nchannels = spp->spp_ports;
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sc->sc_chip = spp->spp_chip;
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} else
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/* _match() should prevent us from getting here */
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panic("siisata: the universe might be falling apart!\n");
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/* set the necessary bits in case the firmware didn't */
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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csr |= PCI_COMMAND_MASTER_ENABLE;
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csr |= PCI_COMMAND_MEM_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
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gcreg = GRREAD(sc, GR_GC);
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aprint_normal("%s: SiI%d on ", SIISATANAME(sc), sc->sc_chip);
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if (sc->sc_chip == 3124) {
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aprint_normal("%d-bit, ", (gcreg & GR_GC_REQ64) ? 64 : 32);
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switch (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) {
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case 0:
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aprint_normal("%d", (gcreg & GR_GC_M66EN) ? 66 : 33);
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break;
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case GR_GC_TRDY:
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aprint_normal("%d", 66);
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break;
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case GR_GC_STOP:
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aprint_normal("%d", 100);
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break;
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case GR_GC_STOP | GR_GC_TRDY:
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aprint_normal("%d", 133);
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break;
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default:
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break;
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}
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aprint_normal("MHz PCI%s bus.", (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) ? "-X" : "");
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} else {
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/* XXX - but only x1 devices so far */
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aprint_normal("PCI-Express x1 port.");
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}
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if (gcreg & GR_GC_3GBPS)
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aprint_normal(" 3.0Gb/s capable.\n");
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else
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aprint_normal("\n");
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siisata_attach(sc);
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if (!pmf_device_register(self, NULL, siisata_pci_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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}
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