54 lines
2.1 KiB
C
54 lines
2.1 KiB
C
/* $NetBSD: cy82c693reg.h,v 1.2 2008/04/28 20:23:54 martin Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_PCI_CY82C693REG_H_
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#define _DEV_PCI_CY82C693REG_H_
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/*
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* Register definitions for the Cypress 82c693 hyperCache(tm) Stand-Alone
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* PCI Peripheral Controller with USB.
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*/
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#define CYHC_CONFIG_ADDR 0x22 /* Chipset Configuration Address */
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#define CYHC_CONFIG_DATA 0x23 /* Chipset Configuration Data */
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#define CONFIG_PERIPH1 0x01 /* Peripheral Control #1 */
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#define CONFIG_PERIPH2 0x02 /* Peripheral Control #2 */
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#define CONFIG_ELCR1 0x03 /* Edge/Level Control #1 */
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#define CONFIG_ELCR2 0x04 /* Edge/Level Control #2 */
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#define CONFIG_RTC 0x05 /* RTC Configuration */
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#endif /* _DEV_PCI_CY82C693REG_H_ */
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