353 lines
8.1 KiB
C
353 lines
8.1 KiB
C
/* $NetBSD: ciss_pci.c,v 1.5 2008/04/10 19:13:36 cegger Exp $ */
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/* $OpenBSD: ciss_pci.c,v 1.9 2005/12/13 15:56:01 brad Exp $ */
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/*
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* Copyright (c) 2005 Michael Shalayeff
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* All rights reserved.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
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* AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
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* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ciss_pci.c,v 1.5 2008/04/10 19:13:36 cegger Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pcivar.h>
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#include <sys/bus.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsipi_disk.h>
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#include <dev/scsipi/scsipiconf.h>
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#include <dev/ic/cissreg.h>
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#include <dev/ic/cissvar.h>
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#define CISS_BAR 0x10
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int ciss_pci_match(struct device *, struct cfdata *, void *);
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void ciss_pci_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(ciss_pci, sizeof(struct ciss_softc),
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ciss_pci_match, ciss_pci_attach, NULL, NULL);
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const struct {
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int vendor;
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int product;
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const char *name;
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} ciss_pci_devices[] = {
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA532,
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"Compaq Smart Array 532"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA5300,
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"Compaq Smart Array 5300 V1"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA5300_2,
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"Compaq Smart Array 5300 V2"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA5312,
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"Compaq Smart Array 5312"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA5i,
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"Compaq Smart Array 5i"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA5i_2,
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"Compaq Smart Array 5i V2"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA6i,
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"Compaq Smart Array 6i"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA641,
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"Compaq Smart Array 641"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA642,
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"Compaq Smart Array 642"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA6400,
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"Compaq Smart Array 6400"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA6400EM,
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"Compaq Smart Array 6400EM"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA6422,
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"Compaq Smart Array 6422"
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},
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{
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PCI_VENDOR_COMPAQ,
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PCI_PRODUCT_COMPAQ_CSA64XX,
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"Compaq Smart Array 64XX"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAE200,
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"Smart Array E200"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAE200I_1,
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"HP Smart Array E200I-1"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAE200I_2,
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"HP Smart Array E200I-2"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAE200I_3,
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"HP Smart Array E200I-3"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAP600,
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"HP Smart Array P600"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAP800,
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"HP Smart Array P800"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSAV100,
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"HP Smart Array V100"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_1,
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"HP Smart Array 1"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_2,
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"HP Smart Array 2"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_3,
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"HP Smart Array 3"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_4,
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"HP Smart Array 4"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_5,
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"HP Smart Array 5"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_6,
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"HP Smart Array 6"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_7,
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"HP Smart Array 7"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_8,
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"HP Smart Array 8"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_9,
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"HP Smart Array 9"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_10,
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"HP Smart Array 10"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_11,
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"HP Smart Array 11"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_12,
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"HP Smart Array 12"
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},
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{
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PCI_VENDOR_HP,
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PCI_PRODUCT_HP_HPSA_13,
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"HP Smart Array 13"
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},
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{
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0,
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0,
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NULL
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}
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};
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int
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ciss_pci_match(struct device *parent, struct cfdata *match,
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void *aux)
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{
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struct pci_attach_args *pa = aux;
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pcireg_t reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
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int i;
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for (i = 0; ciss_pci_devices[i].vendor; i++)
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{
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if ((PCI_VENDOR(pa->pa_id) == ciss_pci_devices[i].vendor &&
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PCI_PRODUCT(pa->pa_id) == ciss_pci_devices[i].product) ||
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(PCI_VENDOR(reg) == ciss_pci_devices[i].vendor &&
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PCI_PRODUCT(reg) == ciss_pci_devices[i].product))
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return 1;
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}
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return 0;
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}
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void
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ciss_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct ciss_softc *sc = (struct ciss_softc *)self;
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struct pci_attach_args *pa = aux;
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bus_size_t size, cfgsz;
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pci_intr_handle_t ih;
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const char *intrstr;
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int cfg_bar, memtype;
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pcireg_t reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
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int i;
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for (i = 0; ciss_pci_devices[i].vendor; i++)
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{
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if ((PCI_VENDOR(pa->pa_id) == ciss_pci_devices[i].vendor &&
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PCI_PRODUCT(pa->pa_id) == ciss_pci_devices[i].product) ||
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(PCI_VENDOR(reg) == ciss_pci_devices[i].vendor &&
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PCI_PRODUCT(reg) == ciss_pci_devices[i].product))
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{
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printf(": %s\n", ciss_pci_devices[i].name);
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break;
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}
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}
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memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, CISS_BAR);
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if (memtype != (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT) &&
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memtype != (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT)) {
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printf(": wrong BAR type\n");
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return;
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}
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if (pci_mapreg_map(pa, CISS_BAR, memtype, 0,
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&sc->sc_iot, &sc->sc_ioh, NULL, &size)) {
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printf(": can't map controller i/o space\n");
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return;
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}
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sc->sc_dmat = pa->pa_dmat;
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sc->iem = CISS_READYENA;
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
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if (PCI_VENDOR(reg) == PCI_VENDOR_COMPAQ &&
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(PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5i ||
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PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA532 ||
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PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5312))
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sc->iem = CISS_READYENAB;
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cfg_bar = bus_space_read_2(sc->sc_iot, sc->sc_ioh, CISS_CFG_BAR);
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sc->cfgoff = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_CFG_OFF);
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if (cfg_bar != CISS_BAR) {
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if (pci_mapreg_map(pa, cfg_bar, PCI_MAPREG_TYPE_MEM, 0,
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NULL, &sc->cfg_ioh, NULL, &cfgsz)) {
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printf(": can't map controller config space\n");
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
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return;
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}
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} else {
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sc->cfg_ioh = sc->sc_ioh;
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cfgsz = size;
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}
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if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) {
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printf(": unfit config space\n");
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
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if (cfg_bar != CISS_BAR)
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bus_space_unmap(sc->sc_iot, sc->cfg_ioh, cfgsz);
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return;
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}
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/* disable interrupts until ready */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, CISS_IMR,
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IMR) | sc->iem);
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if (pci_intr_map(pa, &ih)) {
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printf(": can't map interrupt\n");
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
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if (cfg_bar != CISS_BAR)
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bus_space_unmap(sc->sc_iot, sc->cfg_ioh, cfgsz);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc);
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if (!sc->sc_ih) {
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aprint_error_dev(&sc->sc_dev, "can't establish interrupt");
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if (intrstr)
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printf(" at %s", intrstr);
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printf("\n");
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
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if (cfg_bar != CISS_BAR)
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bus_space_unmap(sc->sc_iot, sc->cfg_ioh, cfgsz);
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}
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printf("%s: interrupting at %s\n%s", device_xname(&sc->sc_dev), intrstr,
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device_xname(&sc->sc_dev));
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if (ciss_attach(sc)) {
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pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
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sc->sc_ih = NULL;
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bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
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if (cfg_bar != CISS_BAR)
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bus_space_unmap(sc->sc_iot, sc->cfg_ioh, cfgsz);
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return;
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}
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/* enable interrupts now */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, CISS_IMR,
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, CISS_IMR) & ~sc->iem);
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}
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